Automotive N- and P-Channel 40 V (D-S) 175 C MOSFET

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SQJ54EP Automotive N- and P-Channel 4 V (D-S) 75 C MOSFET 6.5 mm mm PowerPAK SO-8L Dual 5.3 mm D D 4 G 3 S G S FEATURES TrenchFET power MOSFET AEC-Q qualified % R g and UIS tested Material categorization: for definitions of compliance please see www.vishay.com/doc?999 D S Top View Bottom View PRODUCT SUMMARY N-CHANNEL P-CHANNEL V DS (V) 4-4 R DS(on) () at V GS = ± V.75.7 R DS(on) () at V GS = ± 4.5 V..3 I D (A) 3-3 Configuration N- and p-pair Package PowerPAK SO-8L Dual G G S D N-Channel MOSFET P-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (T C = 5 C, unless otherwise noted) PARAMETER SYMBOL N-CHANNEL P-CHANNEL UNIT Drain-source voltage V DS 4-4 Gate-source voltage V GS ± V Continuous drain current T C = 5 C 3 a -3 a I D T C = 5 C 9.3-9.5 Continuous source current (diode conduction) a I S 3-3 A Pulsed drain current b I DM 9-84 Single pulse avalanche current I AS 5-4 L = mh Single pulse avalanche Energy E AS 3. 8.8 mj Maximum power dissipation b T C = 5 C 34 34 P D T C = 5 C W Operating junction and storage temperature range T J, T stg -55 to +75 Soldering recommendations (peak temperature) d, e 6 C THERMAL RESISTANCE RATINGS PARAMETER SYMBOL N-CHANNEL P-CHANNEL UNIT Junction-to-ambient PCB mount c R thja 85 85 C/W Junction-to-case (drain) R thjc 4.3 4.3 Notes a. Package limited b. Pulse test; pulse width 3 μs, duty cycle % c. When mounted on " square PCB (FR4 material) d. See solder profile (www.vishay.com/doc?7357). The PowerPAK SO-8L is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components S8-3-Rev. A, 5-Jan-8 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP SPECIFICATIONS (T C = 5 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static V GS = V, I D = 5 μa N-Ch 4 - - Drain-source breakdown voltage V DS V GS = V, I D = -5 μa P-Ch -4 - - V DS = V GS, I D = 5 μa N-Ch.5.5 Gate-source threshold voltage V GS(th) V DS = V GS, I D = -5 μa P-Ch -.5 - -.5 Gate-source leakage I GSS V DS = V, V GS = ± V Zero gate voltage drain current On-state drain current a I DSS I D(on) N-Ch - - ± P-Ch - - ± V GS = V V DS = 4 V N-Ch - - V GS = V V DS = -4 V P-Ch - - - V GS = V V DS = 4 V, T J = 5 C N-Ch - - 5 V GS = V V DS = -4 V, T J = 5 C P-Ch - - -5 V GS = V V DS = 4 V, T J = 75 C N-Ch - - 5 V GS = V V DS = -4 V, T J = 75 C P-Ch - - -5 V GS = V V DS 5 V N-Ch - - V GS = - V V DS 5 V P-Ch - - - V GS = V I D = 8 A N-Ch -.6.75 V GS = - V I D = -8 A P-Ch -.38.7 V GS = V I D = 8 A, T J = 5 C N-Ch - -. Drain-source on-state resistance a R DS(on) V GS = - V I D = -8 A, T J = 5 C P-Ch - -.54 V GS = V I D = 8 A, T J = 75 C N-Ch - -.3 V GS = - V I D = -8 A, T J = 75 C P-Ch - -.34 V GS = 4.5 V I D = 5 A N-Ch -.88. V GS = -4.5 V I D = -5 A P-Ch -.86.3 V Forward transconductance b DS = 5 V, I D = 8 A N-Ch - 35 - g fs V DS = -5 V, I D = -8 A P-Ch - 3 - Dynamic b Input capacitance Output capacitance Reverse transfer capacitance Total gate charge c Gate-source charge c Gate-drain charge c C iss C oss C rss Gate resistance R g f = MHz Q g Q gs Q gd V GS = V V DS = 5 V, f = MHz N-Ch - 355 9 V GS = V V DS = -5 V, f = MHz P-Ch - 334 46 V GS = V V DS = 5 V, f = MHz N-Ch - 875 4 V GS = V V DS = -5 V, f = MHz P-Ch - 3 3 V GS = V V DS = 5 V, f = MHz N-Ch - 35 5 V GS = V V DS = -5 V, f = MHz P-Ch - 6 3 V GS = V V DS = V, I D = 5 A N-Ch - 8 3 V GS = - V V DS = - V, I D = -5 A P-Ch - 56 85 V GS = V V DS = V, I D = 5 A N-Ch - 3.5 - V GS = - V V DS = - V, I D = -5 A P-Ch - 8.5 - V GS = V V DS = V, I D = 5 A N-Ch -.6 - V GS = - V V DS = - V, I D = -5 A P-Ch - 9.9 - N-Ch.3.7. P-Ch.5.37 3.6 V na μa A S pf nc S8-3-Rev. A, 5-Jan-8 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP Notes a. Pulse test; pulse width 3 μs, duty cycle % b. Guaranteed by design, not subject to production testing c. Independent of operating temperature Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. SPECIFICATIONS (T C = 5 C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Turn-on delay time c t d(on) V DD = V, R L = 4, I D 5 A, V GEN = V, R g = V DD = - V, R L = 4, I D -5 A, V GEN = - V, R g = Rise time c t r I D 5 A, V GEN = V, R g = V DD = - V, R L = 4, V DD = V, R L = 4, I D -5 A, V GEN = - V, R g = Turn-off delay time c Fall time c t d(off) Source-Drain Diode Ratings and Characteristics b t f V DD = V, R L = 4, I D 5 A, V GEN = V, R g = V DD = - V, R L = 4, I D -5 A, V GEN = - V, R g = V DD = V, R L = 4, I D 5 A, V GEN = V, R g = V DD = - V, R L = 4, I D -5 A, V GEN = - V, R g = N-Ch - P-Ch - 5 5 N-Ch - 4 P-Ch - 6 N-Ch - 35 P-Ch - 45 7 N-Ch - 5 P-Ch - 7 Pulsed current a N-Ch - - 9 I SM P-Ch - - -84 I S = 8 A, V GS = V N-Ch -.83. Forward voltage V SD I S = -8 A, V GS = V P-Ch - -.79 -. I F = 5 A, di/dt = A/μs N-Ch - 48 Body diode reverse recovery time t rr I F = -5 A, di/dt = A/μs P-Ch - 6 55 I F = 5 A, di/dt = A/μs N-Ch - 54 Body diode reverse recovery charge Q rr I F = -5 A, di/dt = A/μs P-Ch - 45 I F = 5 A, di/dt = A/μs N-Ch - 5 - Reverse recovery fall time t a I F = -5 A, di/dt = A/μs P-Ch - 5 - I F = 5 A, di/dt = A/μs N-Ch - 3 - Reverse recovery rise time t b I F = -5 A, di/dt = A/μs P-Ch - - Body diode peak reverse recovery I F = 5 A, di/dt = A/μs N-Ch - -. - I current RM(REC) I F = -5 A, di/dt = A/μs P-Ch - -.7 - ns A V ns nc ns A S8-3-Rev. A, 5-Jan-8 3 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP N-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted) 8 6 64 V GS = V thru 4 V 48 48 3 6 V GS = 3 V 36 4 T C = 5 C T C = 5 C T C =-55 C 4 6 8 4 6 8 Output Characteristics Transfer Characteristics 8.5 g fs - Transconductance (S) 64 48 3 6 T C = 5 C T C =-55 C T C = 5 C R DS(on) - On-Resistance (Ω)..5..5 V GS = V V GS = 4.5 V 4 8 6 Transconductance. 6 3 48 64 8 On-Resistance vs. Drain Current 5 C - Capacitance (pf) 5 5 C rss C oss C iss 8 6 4 I D = 5 A V DS = V 8 6 4 3 4 4 8 6 Q g - Total Gate Charge (nc) Capacitance Gate Charge S8-3-Rev. A, 5-Jan-8 4 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP N-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted). R DS(on) - On-Resistance (Normalized).7.4..8 I D = 8 A V GS = V V GS = 4.5 V.5-5 -5 5 5 75 5 5 75 T J - Junction Temperature ( C) I S - Source Current (A).. T J = 5 C T J = 5 C..4.6.8.. V SD - Source-to-Drain Voltage (V) On-Resistance vs. Junction Temperature Source Drain Diode Forward Voltage.5.5 R DS(on) - On-Resistance (Ω).4.3.. T J = 5 C V GS(th) Variance (V). - -.4 -.7 I D = 5 μa I D = 5 ma. T J = 5 C 4 6 8 -. -5-5 5 5 75 5 5 75 T J - Temperature ( C) On-Resistance vs. Gate-to-Source Voltage Threshold Voltage 55 5 49 46 43 I D = ma I DM Limited Limited by R DS(on) * T C = 5 C Single Pulse I D Limited BVDSS Limited μs ms ms ms, s, s, DC 4-5 -5 5 5 75 5 5 75 T J - Junction Temperature ( C) Drain Source Breakdown vs. Junction Temperature.. V DS -Drain-to-Source Voltage (V) * V GS > minimum V GS at which R DS(on) is specified Safe Operating Area S8-3-Rev. A, 5-Jan-8 5 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP N-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted) Normalized Effective Transient Thermal Impedance Duty cycle =.5..5. Single pulse. -4-3 - - 6 Square Wave Pulse Duration (s) Notes: P DM t t t. Duty cycle, D = t. Per unit base = R thja = 85 C/W 3. T JM - T A = P DM Z (t) thja 4. Surface mounted Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance Duty Cycle =.5...5 Single Pulse. -4-3 - - Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Case Note The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (5 C) - Normalized Transient Thermal Impedance Junction-to-Case (5 C) are given for general guidelines only to enable the user to get a ball park indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size " x " x.6", double sided with oz. copper, % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions S8-3-Rev. A, 5-Jan-8 6 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP P-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted) 8 V GS = V thru 5 V 45 64 36 48 3 6 4 V 3 V 7 8 9 T C = 5 C T C = 5 C 4 6 8 T C =-55 C 4 6 8 Output Characteristics Transfer Characteristics 6 T C =-55 C.5 g fs - Transconductance (S) 48 36 4 T C = 5 C T C = 5 C R DS(on) - On-Resistance (Ω).4.3.. V GS = V V GS = 4.5 V 5 5 5. 4 36 48 6 Transconductance On-Resistance vs. Drain Current 45 C - Capacitance (pf) 36 7 8 9 C rss C oss C iss 8 6 4 I D = 5 A V DS = V 8 6 4 3 4 5 3 45 6 75 Q g - Total Gate Charge (nc) Capacitance Gate Charge S8-3-Rev. A, 5-Jan-8 7 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP P-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted). R DS(on) - On-Resistance (Normalized).7.4..8 I D = 8 A V GS = V V GS = 4.5 V.5-5 -5 5 5 75 5 5 75 T J - Junction Temperature ( C) I S - Source Current (A).. T J = 5 C T J = 5 C..4.6.8.. V SD - Source-to-Drain Voltage (V) Threshold Voltage Source Drain Diode Forward Voltage.. I D = 5 ma R DS(on) - On-Resistance (Ω).8.6.4. T J = 5 C V GS(th) Variance (V).7.4 -. I D = 5 μa. T J = 5 C 4 6 8 On-Resistance vs. Gate-to-Source Voltage -.5-5 -5 5 5 75 5 5 75 T J - Temperature ( C) Threshold Voltage -4-45 -48-5 -54 I D = ma I DM Limited Limited by R DS(on) * T C = 5 C Single Pulse I D Limited BVDSS Limited μs ms ms ms, s, s, DC -57-5 -5 5 5 75 5 5 75 T J - Junction Temperature ( C) Drain Source Breakdown vs. Junction Temperature.. V DS -Drain-to-Source Voltage (V) * V GS > minimum V GS at which R DS(on) is specified Safe Operating Area S8-3-Rev. A, 5-Jan-8 8 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

SQJ54EP P-CHANNEL TYPICAL CHARACTERISTICS (T A = 5 C, unless otherwise noted) Normalized Effective Transient Thermal Impedance Duty cycle =.5..5. Single pulse. 4. Surface mounted -4-3 - - 6 Square Wave Pulse Duration (s) Notes: P DM t t t. Duty cycle, D = t. Per unit base = R thja = 85 C/W 3. T JM - T A = P DM Z thja (t) Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance Duty Cycle =.5...5 Single Pulse. -4-3 - - Square Wave Pulse Duration (s) Normalized Thermal Transient Impedance, Junction-to-Case Note The characteristics shown in the two graphs - Normalized Transient Thermal Impedance Junction-to-Ambient (5 C) - Normalized Transient Thermal Impedance Junction-to-Case (5 C) are given for general guidelines only to enable the user to get a ball park indication of part capabilities. The data are extracted from single pulse transient thermal impedance characteristics which are developed from empirical measurements. The latter is valid for the part mounted on printed circuit board - FR4, size " x " x.6", double sided with oz. copper, % on both sides. The part capabilities can widely vary depending on actual application parameters and operating conditions maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package / tape drawings, part marking, and reliability data, see www.vishay.com/ppg?769. S8-3-Rev. A, 5-Jan-8 9 Document Number: 769 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9

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