APPLICATION TO TRANSIENT ANALYSIS OF ELECTRICAL CIRCUITS

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EECE 552 Numerical Circuit Analysis Chapter Nine APPLICATION TO TRANSIENT ANALYSIS OF ELECTRICAL CIRCUITS I. Hajj

Application to Electrical Circuits Method 1: Construct state equations = f(x, t) Method 2: Apply directly to Tableau Equations, which are mixed algebraic-differential equations: f(x,, t) = 0

Special Case for Constructing State Equations For circuits suitable for nodal analysis (no inductors, no current variables; if voltage sources exist, transform them into current sources using Norton equivalent circuit), and if there is a capacitive path from every node to ground, the nodal equations generate state equations.

Example

Linear Circuit ia = gava, ib = gbvb

State Equations More generally, the MNA equations of a circuit containing linear capacitors and inductors and linear and nonlinear resistors can be written in the form If C is nonsingular,

General Case: f(x,,t) = 0 apply or get

Tableau Equations of General Linear and Nonlinear Circuits Element Characteristics (a) Resistors (linear and nonlinear, including independent sources)

Capacitors

Inductors

memrisitve systems

memcapacitive systems

meminductive systems

Mem Devices: Memristors

Memcapacitors

Meminductors

Companion Models and Stamps No need to construct state equations. Apply integration formula to differential operator and derive a companion model. Derive a stamp to incorporate elements into the linearized circuit equations

Capacitor 'companion' models using lmf. Consider an implicit lmf: Apply to capacitor characteristic equations

Or

Nonlinear Capacitor Stamp Implicit lmf

Capacitor 'companion' model using B.E. = (x n - x n-1 )/h Linear Capacitor: q = Cv => i = dq/dt = Cdv/dt i n =

Linear Capacitor (B.E) MNA Stamp: v n = v i v j

Nonlinear Capacitor (voltage-controlled): B.E. (B.E) β 0 = 1, s c,n = f c (v c,n-1 )/h

Nonlinear Capacitor (voltage-controlled): B.E. β 0 = 1, s c,n = f c (v c,n-1 )/h (changes at every time point); a c,n and b c,n change at every iteration point at time point t n

Trapezoidal Rule

Linear Capacitor: T.R.

Linear Capacitor Stamp T.R. ; i 0 = 0

Nonlinear Capacitor: T.R.

Nonlinear Capacitor: T.R. β 0 = 1/2, s c,n = 2f c (v c,n-1 )/h + i c,n-1 (changes at every time point); a c,n and b c,n change at every iteration point at time point t n

2 nd Order Backward Differentiation Formula BDF Linear Capacitor: q = Cv, i = dq/dt

Linear Capacitor Stamp: BDF

Charge-Controlled Capacitor (1) (2)

Stamp of Two-Terminal Charge-Controlled Capacitor: B.E. and ENA

Charge-and-Voltage Controlled Capacitor

Stamp of Two-Terminal Charge-and-Voltage- Controlled Capacitor: B.E. and ENA

Inductor

Linear Inductor: B.E.

Stamp of Linear Inductor: B.E.

Linear Inductor: T.R.

Stamp of Linear Inductor: T.R.

Linear Inductor: 2 nd Order BDF

Nonlinear Current-Controlled Inductor Ф L = f L (i L ); v L = (dф L )/(d t ) Ф L,n = (1/h) Ф L,n - (1/h) Ф L,n-1 (B.E) = (1/h)f L (i L, n ) (1/h)f L (i L, n-l )

Stamp of Linearized Current-Controlled Inductor For B.E.: β 0 = 1, s L,n = f L (i L,n-1 )/h

Nonlinear Inductor: T.R.

Stamp of Linearized Current-Controlled Inductor: T.R. β 0 = 1/2, s L,n =2 f L (i L,n-1 )/h + v L,n-1

Flux-Controlled Inductor

Stamp of (Linearized) Flux-Controlled Inductor: B.E. (ENA)

Flux-and-Current Controlled Inductor

Stamp of (Linearized) Flux-and-Current Controlled Inductor: B.E. (ENA)

Current-Controlled Memrisitive System

Stamp of (Linearized) Current Controlled Memristive system: B.E. (ENA)

Charge-Controlled Memristor

Stamp of (Linearized) Current Controlled Memristive system: B.E. (ENA)

Transient Analysis Flowchart

Example t = 0

At t = 0 - => put C = 0, L = 0

Example (nonlinear circuit)

Given: Assume B.E. is used:

Suppose Newton's method is applied to find the solution at time tn; and Taylor series is used to linearize all nonlinear elements at Newton iteration point at tn.

Vc = V3 Linearization

(1) How to estimate LTE in practice Use Finite Difference Interpolation:

Note: LTE decreases with h, but when h decreases, round-off error increases.

(2) The timestep h is determined from the LTE estimate

(3) Specify two bounds: Upper bound B u Lower bound B l (i) If B l < LTE < B u, keep same h (ii) If LTE > B u > reject x n, decrease h and re-compute x n (iii) If LTE < B 1, accept x n, increase next h

(4) Decrease or increase h so that

(5) B u and B 1 can be either constants, or variables as functions of x (t) (6) Use voltage across each capacitor and current in each inductor to estimate LTE. Choose the largest one to determine h.

(7) Specify minimum time step h min, based on computer word length do not choose h < h min even if LTE is still too large. (8) At time t = 0, after initial conditions are found, start with one-step formula (B.E. or T.R.) and with h min for at least two steps before computing LTE and increasing h. After that, h can change and multistep formulas can be used.

(9) If the time response at any point in the circuit becomes discontinuous in t or its time derivative becomes discontinuous, restart with one-step formula and h min after that time point. (10) In solving for x n at t n using Newton's method, x n-1 is usually chosen as an initial guess. However, another initial guess can be used, such as obtained (or predicted) by an explicit formula:

Companion models using explicit formulas Explicit Formulas:

is available, then x n = x n-1 + h f(x n-1, t n-1 ) can be computed explicitly at time t n in terms of previous solutions and time step h. If state equations are not available, apply formula to capacitor and inductor equations to derive "explicit" companion models as follows.

Linear Cap

Nonlinear Cap

Nonlinear Cap (cont.)

Linear Inductor

Nonlinear Inductor

Nonlinear Inductor (cont.)

Example

Loops of Capacitors (and voltage sources)

Last three rows are dependent.

Cutset of Inductors (and current sources)

The last two rows are dependent.

TIME DOMAIN SENSITIVITY

Linear Case

i-th equation:

Nonlinear Case