Power MOSFET FEATURES. IRFP31N50LPbF SiHFP31N50L-E3 IRFP31N50L SiHFP31N50L

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1 Power MOFET IRFP3N50L, ihfp3n50l PRODUCT UMMRY V D (V) 500 R D(on) ( ) V G = V 0.5 Q g (Max.) (nc) 2 Q gs (nc) 58 Q gd (nc) 0 Configuration ingle D TO-27C FETURE uper Fast Body Diode Eliminates the Need for External Diodes in ZV pplications Lower Gate Charge Results in impler Drive Requirements vailable RoH* COMPLINT Enhanced dv/dt Capabilities Offer Improved Ruggedness Higher Gate Voltage Threshold Offers Improved Noise Immunity Compliant to RoH Directive 2002/95/EC G D ORDERING INFORMTION Package Lead (Pb)-free npb G N-Channel MOFET PPLICTION Zero Voltage witching MP Telecom and erver Power upplies Uninterruptible Power upplies Motor Control pplications TO-27C IRFP3N50LPbF ihfp3n50l-e3 IRFP3N50L ihfp3n50l BOLUTE MXIMUM RTING (T C = 25 C, unless otherwise noted) PRMETER YMBOL LIMIT UNIT Drain-ource Voltage V D 500 V Gate-ource Voltage V G ± 30 Continuous Drain Current V G at V T C = 25 C 3 I D T C = 0 C 20 Pulsed Drain Current a I DM 2 Linear Derating Factor 3.7 W/ C ingle Pulse valanche Energy b E 60 mj Repetitive valanche Current a I R 3 Repetitive valanche Energy a E R 6 mj Maximum Power Dissipation T C = 25 C P D 60 W Peak Diode Recovery dv/dt c dv/dt 9 V/ns Operating Junction and torage Temperature Range T J, T stg - 55 to 50 oldering Recommendations (Peak Temperature) for s 300 d C Mounting Torque 6-32 or M3 screw Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. tarting T J = 25 C, L = mh, R g = 25, I = 3 (see fig. 2). c. I D 3, di/dt 22 /μs, V DD V D, T J 50 C. d..6 mm from case. lbf in. N m * Pb containing terminations are not RoH compliant, exemptions may apply Document Number: Rev. C, 2-Mar- THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

2 IRFP3N50L, ihfp3n50l THERML REITNCE RTING PRMETER YMBOL TYP. MX. UNIT Maximum Junction-to-mbient R thj - 0 Case-to-ink, Flat, Greased urface R thc C/W Maximum Junction-to-Case (Drain) R thjc PECIFICTION (T J = 25 C, unless otherwise noted) PRMETER YMBOL TET CONDITION MIN. TYP. MX. UNIT tatic Drain-ource Breakdown Voltage V D V G = 0 V, I D = 250 μ V V D Temperature Coefficient V D /T J Reference to 25 C, I D = m V/ C Gate-ource Threshold Voltage V G(th) V D = V G, I D = 250 μ V Gate-ource Leakage I G V G = ± 30 V - - ± 0 n V D = 500 V, V G = 0 V μ Zero Gate Voltage Drain Current I D V D = 00 V, V G = 0 V, T J = 25 C m Drain-ource On-tate Resistance R D(on) V G = V I D = 9 b Forward Transconductance g fs V D = 50 V, I D = 9 b Dynamic Input Capacitance C iss VG = 0 V, Output Capacitance C oss V D = 25 V, Reverse Transfer Capacitance C rss f =.0 MHz, see fig V D =.0 V, f =.0 MHz pf Output Capacitance C oss V D = 00 V, f =.0 MHz V G = 0 V Effective Output Capacitance C oss eff Effective Output Capacitance C oss eff. (ER) V D = 0 V to 00 V c Total Gate Charge Q g Gate-ource Charge Q gs I V G = V D = 3, V D = 00 V, see fig. 7 and 3 b nc Gate-Drain Charge Q gd Internal Gate Resistance R g f = MHz, open drain -. - Turn-On Delay Time t d(on) Rise Time t r V DD = 250 V, I D = 3, Turn-Off Delay Time t d(off) R g =.3, see fig. b ns Fall Time t f Drain-ource Body Diode Characteristics Continuous ource-drain Diode Current I MOFET symbol D showing the integral reverse G Pulsed Diode Forward Current a I M p - n junction diode Body Diode Voltage V D T J = 25 C, I = 3, V G = 0 V b V T J = 25 C, I F = Body Diode Reverse Recovery Time t rr ns T J = 25 C, di/dt = 0 /μs b T J = 25 C, I = 3, V G = 0 V b nc Body Diode Reverse Recovery Charge Q rr T J = 25 C, di/dt = 0 /μs b μc Reverse Recovery Current I RRM T J = 25 C Forward Turn-On Time t on Intrinsic turn-on time is negligible (turn-on is dominated by L and L D ) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. ). b. Pulse width 300 μs; duty cycle 2 %. c. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V D is rising from 0 % to 80 % V D. C oss eff. (ER) is a fixed capacitance that stores the same energy as C oss while V D is rising from 0 % to 80 % V D. Document Number: Rev. C, 2-Mar- THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

3 IRFP3N50L, ihfp3n50l TYPICL CHRCTERITIC (25 C, unless otherwise noted) I D, Drain-to-ource Current () Top Bottom VG 5 V 2 V V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 5.0 V I D, Drain-to-ource Current () 00 0 T J = 50 C T J = 25 C 20 μs PULE WIDTH T 0.0 J = 25 C 0. 0 V D, Drain-to-ource Voltage (V) 0. V D = 50 V 20 μs PULE WIDTH V G, Gate-to-ource Voltage (V) Fig. - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics I D, Drain-to-ource Current () Top Bottom VG 5 V 2 V V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 5.0 V 20 μs PULE WIDTH T J = 50 C 0. 0 V D, Drain-to-ource Voltage (V) R D(on), Drain-to-ource On Resistance (Normalized) I D = V G = V T J, Junction Temperature Fig. 2 - Typical Output Characteristics Fig. - Normalized On-Resistance vs. Temperature Document Number: Rev. C, 2-Mar- 3 THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

4 IRFP3N50L, ihfp3n50l C, Capacitance (pf) V G = 0 V, C iss = C gs C gd, C ds C rss = C gd C oss = C ds C gd C iss C oss f = MHz HORTED V G, Gate-to-ource Voltage (V) I D = 3 V D = 00 V V D = 250 V V D = 0 V C rss 0 00 V D, Drain-to-ource Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-ource Voltage Q G, Total Gate Charge (nc) Fig. 7 - Typical Gate Charge vs. Gate-to-ource Voltage Energy (µs) 20 5 I D, Reverse Drain Current () 0 T J = 50 C T J = 25 C V D, Drain-to-ource Voltage (V) Fig. 6 - Output Capacitance tored Energy vs. V D 0. V G = 0 V V D, ource-to-drain Voltage (V) Fig. 8 - Typical ource Drain Diode Forward Voltage Document Number: Rev. C, 2-Mar- THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

5 IRFP3N50L, ihfp3n50l R D 35 V D 30 R G V G D.U.T. - V DD I D, Drain Current () V Pulse width µs Duty factor 0. % Fig. a - witching Time Test Circuit V D 90 % T C, Case Temperature ( C) % V G t d(on) t r t d(off) t f Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. b - witching Time Waveforms Thermal Response (Z thjc ) D = P DM INGLE PULE (THERML REPONE) t t t, Rectangular Pulse Duration (sec) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc T C Fig. - Maximum Effective Transient Thermal Impedance, Junction-to-Case 5 V t p V D V D L Driver R G 20 V t p D.U.T I 0.0 Ω - V DD I Fig. 2a - Unclamped Inductive Test Circuit Fig. 2b - Unclamped Inductive Waveforms Document Number: Rev. C, 2-Mar- 5 THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

6 IRFP3N50L, ihfp3n50l I D, Drain Current () 00 0 OPERTION IN THI RE LIMITED BY RD(on) us 0us ms T C = 25 C T J = 50 C ingle Pulse ms 0 00 V D, Drain-to-ource Voltage (V) Fig. 2c - Maximum valanche Energy vs. Drain Current E, ingle Pulse valanche Energy (mj) tarting T J, Junction Temperature( C) Fig. 2d - Gate Charge Test Circuit ID TOP 20 BOTTOM 30 Current regulator ame type as D.U.T. Q G 50 kω V G 2 V 0.2 µf 0.3 µf Q G Q GD D.U.T. V - D V G V G Charge Fig. 3a - Maximum afe Operating rea 3 m Fig. 3b - Basic Gate Charge Waveform I G I D Current sampling resistors Document Number: Rev. C, 2-Mar- THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

7 IRFP3N50L, ihfp3n50l Peak Diode Recovery dv/dt Test Circuit D.U.T. - Circuit layout considerations Low stray inductance Ground plane Low leakage inductance current transformer - - R g dv/dt controlled by R g Driver same type as D.U.T. I D controlled by duty factor D D.U.T. - device under test - V DD Driver gate drive P.W. Period D = P.W. Period V G = V a D.U.T. l D waveform Reverse recovery current Body diode forward current di/dt D.U.T. V D waveform Diode recovery dv/dt V DD Re-applied voltage Inductor current Body diode forward drop Ripple 5 % I D Note a. V G = 5 V for logic level devices Fig. - For N-Channel maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for ilicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see Document Number: Rev. C, 2-Mar- 7 THE PRODUCT DECRIBED HEREIN ND THI DTHEET RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

8 TO-27C (High Voltage) Package Information 3 B R/2 Q E E/2 2 7 ØP (Datum B) Ø k M D B M ØP D2 2 x R (2) D D 2 3 D Thermal pad 5 L C 2 x b2 3 x b 0. M C M b Lead ssignments. Gate 2. Drain 3. ource. Drain 2 x e L ee view B C DDE (b, b2, b) () ection C - C, D - D, E - E MILLIMETER INCHE MILLIMETER INCHE DIM. MIN. MX. MIN. MX. DIM. MIN. MX. MIN. MX D E E b e 5.6 BC 0.25 BC b Ø k b L b L b N 7.62 BC BC b Ø P c Ø P c Q D R D BC 0.27 BC ECN: X3-03-Rev. D, 0-Jul-3 DWG: 597 Notes. Dimensioning and tolerancing per ME Y.5M Contour of slot optional. 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.27 mm (0.005") per side. These dimensions are measured at the outermost extremes of the plastic body.. Thermal pad contour optional with dimensions D and E. 5. Lead finish uncontrolled in L. 6. Ø P to have a maximum draft angle of.5 to the top of the part with a maximum hole diameter of 3.9 mm (0.5"). 7. Outline conforms to JEDEC outline TO-27 with exception of dimension c. 8. Xian and Mingxin actually photo. E View B C C Planting (c) E 0.0 M D B M View - (b, b3, b5) Base metal c Revision: 0-Jul-3 Document Number: 9360 For technical questions, contact: hvm@vishay.com THI DOCUMENT I UBJECT TO CHNGE WITHOUT NOTICE. THE PRODUCT DECRIBED HEREIN ND THI DOCUMENT RE UBJECT TO PECIFIC DICLIMER, ET FORTH T

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