Application Note OA-29 Low-Sensitivity, Highpass Filter Design With Parasitic Compensation. Kumen Blake
|
|
- Annabella Cunningham
- 5 years ago
- Views:
Transcription
1 N Application Note OA-9 Low-Sensitivity, Highpass Filte Design With Paasitic Compensation Kumen Blake Octobe 996 Intoduction This Application Note coves the design of a Sallen-Key highpass biquad. This design gives low component and op amp sensitivities. It also shows how to compensate fo the op amp s bandwidth (pe-distotion) and paasitic capacitances. A design example illustates this method. These biquads ae also called KRC o VCVS [voltagecontolled, voltage-souce]. Changes in component values ove pocess, envionment and time affect the pefomance of a filte. To achieve a geate poduction yield, the filte needs to be insensitive to these changes. This Application Note pesents a design algoithm that esults in low sensitivity to component vaiation. See [6] fo infomation on evaluating the sensitivity pefomance of you filte. To achieve the best poduction yield, the nominal filte design must also compensate fo component and boad paasitics. The components ae pe-distoted [5] to compensate fo the op amp bandwidth. This Application Note expands the pe-distotion method in [5] to include compensation fo paasitic capacitances. This method is valid fo eithe voltage-feedback o cuent-feedback op amps. Paasitic Compensation To pe-distot you filte components and compensate fo paasitic capacitances:. Use the method in [5] to include the op amp s effect on the filte esponse. The esult is a tansfe function of the same ode whose coefficients include the op amp goup delay (τ oa ) evaluated at the passband edge fequency (f c ).. Fo all paasitic capacitances in paallel with capacitos: Add the capacitos togethe Simplify the esulting coefficients Use the sum of time constants fom fo the coefficients when possible 3. Fo all paasitic capacitances in paallel with esistos: Replace the esisto R x in the filte tansfe function with the paallel equivalent of R x and C p : Rx Rx R C s,s j ( + x p ) Alte this impedance to a convenient fom and simplify: Do not ceate new tems (a coefficient times a new powe of s) in the tansfe function afte simplifying The most useful appoximations ae: RCs x p Re x These appoximations ae valid when: Convet (+ R x C p s) to the exponential fom (a pue time delay) when it multiplies, o divides, the entie tansfe function Do not change the gain at p in allpass sections When simplifying, discad any tems that ae poducts of the eo tems (Kτ oa and R x C p ); they ae negligible Use the sum of time constants fom fo the coefficients when possible 4. Use an op amp with adequate bandwidth (f 3dB ) and slew ate (SR): f 3dB 0f H SR > 5f H V peak whee f H is the highest fequency in the passband of the filte, and V peak is the lagest peak voltage. This inceases the accuacy of the pe-distotion algoithm. It also educes the filte s sensitivity to op amp pefomance changes ove tempeatue and pocess. Make sue the op amp is stable at a gain of A v K. KRC Highpass Biquad Design The biquad shown in Figue is a Sallen-Key highpass biquad. V in needs to be a voltage souce with low output impedance. The tansfe function is: Rx Rx RxCps ( + RxCps) ( ) Vo Vin + << RC x p H s p s + pq p p s 996 National Semiconducto Copoation Pinted in the U.S.A.
2 whee: K + R f Rg H K R5C R5C3 R4C3 K ( pqp) + ( ) R R C C p Figue : Highpass Biquad To achieve low sensitivities, use this design algoithm:. Patition the gain fo good Q p sensitivity and dynamic ange pefomance: Use a low noise amplifie befoe this biquad if you need a lage gain Select K with this empiical fomula:, 0. Qp. K. Qp 0.9 Q 0.,. < Q p < 5 p + These values also educe the op amp band width s impact on the filte esponse. This biquad s sensitivities ae too high when Q p 5. Select an op amp with adequate bandwidth (f 3dB ) and slew ate (SR): f 3dB f H f 3dB 0f c SR > 5f H V peak whee f H is the highest signal fequency, fc is the cone fequency of the filte, and V peak is the lagest peak voltage. Make sue the op amp is stable at a gain of A v K. 3. Fo cuent-feedback op amps, use the ecommended value of R f fo a gain of A v K. Fo voltage-feedback op amps, select R f fo noise and distotion pefomance. Then set R g fo the coect gain: R Rg f K 4. Initialize the esistance level R R 4 R 5. Inceasing R will: Incease the output noise Reduce the distotion Impove the isolation between the op amp outputs and C and C 3 Make the paasitic capacitances a lage faction of C and C 3 5. Initialize the capacitance level ( C C C 3 ), and the component atios C c 3 C and 3 R5 R : 4 c ( pr) c Recalculate c and initialize the capacitos: 9. Calculate the esistos: + + 4Q c K p + max 0.0, Qp ( + c ) c Qp c + + 4Qp K C C c C3 cc 7. Set C and C 3 to the neaest standad values. 8. Recalculate C, c, R and : C CC 3 C c 3 C R pc 4Q c K p Qp ( + c ) c R R4 R5 R The component sensitivity fomulas ae in the table below. The sensitivities to α i K ae a measue of this biquad s sensitivity to the op amp goup delay [5]. To evaluate this biquadís sensitivity pefomance, use the method in [6].
3 H Q p αi Sα Sα Sα C 0 Q p c C3 0 Q p c R4 0 K Q c p R5 0 K Q c p Rf Rf K K K K i i 0 K Q KRC Highpass Biquad Paasitic Compensation To pe-distot this biquad, and compensate fo the [paasitic] non-inveting input capacitance of the op amp (C ni ), do the following (see Appendix A fo the deivation of the fomulas):. Stat the iteations by ignoing the paasitics: τ 0 τ 4 0. Estimate the pe-distoted values of p and Q p ( p(pd) and Q p(pd) ) that will compensate fo τ oa and C ni : whee p(nom) and Q p(nom) ae the nominal values of p and Q p 3. Recalculate the esistos and capacitos using p(pd) and Q p(pd) : The Design Example accomplishes this by ecalculating R and, then R 4 and R 5 : p + + p 0 ( K ) Q c p K 0 K Q c p p(pd) p(nom) τ4 p(nom) Qp(pd) Qp(nom) p(pd) Qp(nom) τp(pd) p(nom) c R R C C p(pd) R5C R5C3 R4C3 ( K ) p(pd) Qp(pd) + R p(pd) C + + 4Q c K p(pd) + Qp(pd) ( + c ) c R4 R R5 R 4. Calculate the esulting paasitic coection factos: 5. Calculate the esulting filte esponse paametes p and Q p : 6. Repeat steps -5 until: τ R4Cni τ4 KτoaR4C3 + R4R5 ( C + C3) Cni p p(pd) + τ4 p(pd) Qp(pd) Qp p + Qp(pd) τp p(pd) p p(nom) Qp Qp(nom) 7. Estimate the high fequency gain: H K + τ4p(pd) If this educes the gain too much, then epatition the gain. Design Example The cicuit shown in Figue is a 3d-ode Buttewoth highpass filte. Section A is a buffeed single pole section, and Section B is a highpass biquad. Use a voltage souce with low output impedance, such as the CLC buffe, fo V in. The nominal filte specifications ae: f c 50MHz (passband edge fequency) f s 0MHz (stopband edge fequency) f H 00MHz (highest signal fequency) A p 3.0dB (maximum passband ipple) A s 40dB (minimum stopband attenuation) H 0dB (passband voltage gain) 3
4 Figue : Highpass Filte The 3d-ode Buttewoth filte [-4] meets ou specifications. The pole fequencies and quality factos ae: Section A B p /π [MHz] Q p [ ].000 Oveall Design:. Restict the esisto and capacito atios to: 0. c, 0. Use % esistos (chip metal film, 06 SMD) 3. Use 5% capacitos (ceamic chip, 06 SMD) 4. Use standad esisto and capacito values Section A Design and Pe-distotion:. Use the CLC. This is a closed-loop buffe. f 3dB 800MHz > f H 00MHz f 3dB 800MHz > 0f c 500MHz SR 3500V/µs, while a 00MHz, V pp sinusoid equies moe than 000V/µs τ oa 0.8ns at 0MHz C ni().3pf (input capacitance). Select R A fo noise, distotion and to popely isolate the CLC s output and C A. The pedistoted value of R A, that also compensates fo C ni(), is [5]: RA p τ oa CA + Cni() The esults ae in the table below: The Initial Value column shows ideal values that ignoe any paasitic effects The Adjusted Value column shows the component values that compensate fo C ni() and CLCís goup delay (τ oa ) The Standad Value column shows the neaest standad % esistos and 5% capacitos Component Initial Value Adjusted Standad C A 30pF 30pF 30pF R A 06Ω 9.8Ω 93.Ω C ni().3pf.3pf Section B Design:. Since Q p.000, set K B to.00. Use the CLC446. This is a cuent-feedback op amp f 3dB 400MHz > f H 00MHz f 3dB < 0f c 500MHz; the design will be sensitive to the op amp goup delay SR 000V/µs > 000V/µs (see Item # in Section A Design ) τ oa 0.56ns at 0MHz C ni(446).0pf (input capacitance) 3. Use the CLC446 s ecommended R f at A v.0: R fb 453Ω Then leave R gb open so that K B Initialize the esisto level: R 00Ω 5. Initialize the capacito level, and the component atios: C 3.83pF π( 50.00MHz) ( 00Ω) c max 0.0, { } 6. Recalculate c and initialize the capacitos: c 0.7 C B 89.3pF C 3B.3pF 7. Set the capacitos to the neaest standad values: C B 9pF C 3B pf 8. Recalculate the capacito level and atio, and the esisto level and atio: 9. Calculate the esistos: R 4B 34Ω R 3B 3.Ω 0. The sensitivities fo this design ae: C ( 9pF) ( pf) 3.64pF pf c 0.09 ( 9pF) R π ( 50.00MHz) ( 3.64pF) 00.6Ω H αi Sα Sα i C B C 3B R 4B R 5B R fb R gb K i p Q Sα p 4
5 Section B Pe-distotion:. The design gives these values: p(nom) π(50.00mhz) Q p(nom).000 K B.00 C B 9pF C 3B pf. Iteation shows the initial design esults. Iteations -4 pe-distot R 4B and R 5B to compensate fo the CLC446 s goup delay, and fo C ni(446) : Iteation # 3 4 p(pd) π [MHz] Q p(pd) [ ] R [Ω] [Ω] R 4B [Ω] R 5B [Ω] τ [ns] τ 4 [ns] p π [MHz] Q p [ ] The midband gain estimate is: H [V/V]. Iteation [V/V]. Iteation 4 The simulations gave a lowe value fo H. Inceasing K could help ovecome this loss, but would also incease the sensitivities. 3. The esulting components ae: Component Initial Value Adjusted Standad C B 9pF 9pF 9pF C 3B pf pf pf C ni(446).0pf.0pf R 4B 34Ω 68Ω 67Ω R 5B 3.Ω 8.5Ω 8.7Ω R fb 453Ω 453Ω 453Ω R gb Figues 3 and 4 show simulated gains. The cuve numbes ae:. Ideal (Initial Design Values, τ oa 0, C ni 0). Without pe-distotion (Initial Design Values, τ oa 0, C ni 0) 3. With pe-distotion (Pe-distoted Values, τ oa 0, C ni 0) Figue 3: Simulated Filte Magnitude Response Figue 4: Simulated Filte Magnitude Response SPICE Models SPICE models ae available fo most of Comlinea s amplifies. These models suppot nominal DC, AC, AC noise and tansient simulations at oom tempeatue. We ecommend simulating with Comlinea s SPICE models to: Pedict the op amp s influence on filte esponse Suppot quicke design cycles Include boad and component paasitic models to obtain a moe accuate pediction of the filte s esponse. To veify you simulations, we ecommend bead-boading you cicuit. Summay This Application Note contains an easy to use design algoithm fo a low sensitivity, Sallen-Key highpass biquad. Designing fo low p and Q p sensitivities gives: Reduced filte vaiation ove pocess, tempeatue and time Highe manufactuing yield Lowe component cost A low sensitivity design is not enough to poduce high manufactuing yields. This Application Note shows how to compensate fo the op amp bandwidth, and fo the [paasitic] input capacitance of the op amp. This method also applies to any othe component o boad paasitics. The components must also have low enough toleance and tempeatue coefficients. 5
6 Appendix A Deivation of Pe-distotion and Paasitic Capacitance Compensation Fomulas To pe-distot this filte, and compensate fo the [paasitic] input capacitance of the op amp (C ni ):. Use the method in [5] to include the op amp s effect on the filte esponse. The esult is: Vo Vin + H s p τ e s s + pq p p whee the op amp goup delay (τ oa ) is evaluated at the passband edge fequency (f c ), and: R5C R5C3 R4C3 K ( pqp) + ( ) R R C C K R C p τoa 4 3 K + R f Rg H K. Since C ni is in paallel with R 4, eplace R 4 with the paallel equivalent of R 4 and C ni : R4 R4 + R4Cnis oa s H R 4 C 3 R 5 C + K τoa τ oas s e V + R C s o 4 ni Vin R4C3 ( K) + + R5( C + C3) s + R4Cnis R4C3( R5C + Ktoa ) + + R4Cnis s 3. Afte simplifying, we obtain: Vo Vin + whee : t t ( pqp) + H s p τ e s s + pq p p τ R5C + R5C3 R4C3 K τ R4Cni p τ3 + τ 4 τ3 R4R5CC 3 oa τ4 KτoaR4C3 + R4R5 C + C3 Cni K + R f Rg H K ( τ3) τ3 + τ4 s Appendix B Bibliogaphy. R. Schaumann, M. Ghausi and K. Lake, Design of Analog Filtes: Passive, Active RC, and Switched Capacito. New Jesey: Pentice Hall, A. Zveev, Handbook of FILTER SYNTHESIS. John Wiley & Sons, A. Williams and F. Taylo, Electonic Filte Design Handbook. McGaw Hill, S. Nataajan, Theoy and Design of Linea Active Netwoks. Macmillan, K. Blake, Component Pe-distotion fo Sallen-Key Filtes, Comlinea Application Note, OA-, Rev. B, July K. Blake, Low-Sensitivity, Lowpass Filte Design, Comlinea Application Note, OA-7, July K. Blake, Low-Sensitivity, Bandpass Filte Design With Tuning Method, Comlinea Application Note, OA-8, Oct
7 This page intentionally left blank. 7
8 Custome Design Applications Suppot National Semiconducto is committed to design excellence. Fo sales, liteatue and technical suppot, call the National Semiconducto Custome Response Goup at o fax Life Suppot Policy National s poducts ae not authoized fo use as citical components in life suppot devices o systems without the expess witten appoval of the pesident of National Semiconducto Copoation. As used heein:. Life suppot devices o systems ae devices o systems which, a) ae intended fo sugical implant into the body, o b) suppot o sustain life, and whose failue to pefom, when popely used in accodance with instuctions fo use povided in the labeling, can be easonably expected to esult in a significant injuy to the use.. A citical component is any component of a life suppot device o system whose failue to pefom can be easonably expected to cause the failue of the life suppot device o system, o to affect its safety o effectiveness. N National Semiconducto National Semiconducto National Semiconducto National Semiconducto Copoation Euope Hong Kong Ltd. Japan Ltd. West Badin Road Fax: (+49) th Floo, Staight Block Tel: Alington, TX euope.suppot@nsc.com Ocean Cente, 5 Canton Road Fax: Tel: (800) Deutsch Tel: (+49) Tsimshatsui, Kowloon Fax: (800) English Tel: (+49) Hong Kong Fancais Tel: (+49) Tel: (85) Italiano Tel: (+49) Fax: (85) National does not assume any esponsibility fo use of any cicuity descibed, no cicuit patent licenses ae implied and National eseves the ight at any time without notice to change said cicuity and specifications. 8 Lit #
Low-Sensitivity, Highpass Filter Design with Parasitic Compensation
Low-Sensitivity, Highpass Filter Design with Parasitic Compensation Introduction This Application Note covers the design of a Sallen-Key highpass biquad. This design gives low component and op amp sensitivities.
More informationME 3600 Control Systems Frequency Domain Analysis
ME 3600 Contol Systems Fequency Domain Analysis The fequency esponse of a system is defined as the steady-state esponse of the system to a sinusoidal (hamonic) input. Fo linea systems, the esulting steady-state
More informationLC transfer of energy between the driving source and the circuit will be a maximum.
The Q of oscillatos efeences: L.. Fotney Pinciples of Electonics: Analog and Digital, Hacout Bace Jovanovich 987, Chapte (AC Cicuits) H. J. Pain The Physics of Vibations and Waves, 5 th edition, Wiley
More informationRESONANCE SERIES RESONANT CIRCUITS. 5/2007 Enzo Paterno 1
ESONANCE SEIES ESONANT CICUITS 5/007 Enzo Pateno ESONANT CICUITS A vey impotant cicuit, used in a wide vaiety o electical and electonic systems today (i.e. adio & television tunes), is called the esonant
More informationConventional Paper-I (a) Explain the concept of gradient. Determine the gradient of the given field: ( )
EE-Conventional Pape-I IES-013 www.gatefoum.com Conventional Pape-I-013 1. (a) Eplain the concept of gadient. Detemine the gadient of the given field: V ρzsin φ+ z cos φ+ρ What is polaization? In a dielectic
More informationAbsolute Specifications: A typical absolute specification of a lowpass filter is shown in figure 1 where:
FIR FILTER DESIGN The design of an digital filte is caied out in thee steps: ) Specification: Befoe we can design a filte we must have some specifications. These ae detemined by the application. ) Appoximations
More informationPower efficiency and optimum load formulas on RF rectifiers featuring flow-angle equations
LETTE IEICE Electonics Expess, Vol.10, No.11, 1 9 Powe efficiency and optimum load fomulas on F ectifies featuing flow-angle equations Takashi Ohia a) Toyohashi Univesity of Technology, 1 1 Hibaigaoka,
More informationBasic Bridge Circuits
AN7 Datafoth Copoation Page of 6 DID YOU KNOW? Samuel Hunte Chistie (784-865) was bon in London the son of James Chistie, who founded Chistie's Fine At Auctionees. Samuel studied mathematics at Tinity
More informationExperiment I Voltage Variation and Control
ELE303 Electicity Netwoks Expeiment I oltage aiation and ontol Objective To demonstate that the voltage diffeence between the sending end of a tansmission line and the load o eceiving end depends mainly
More informationImprovement in Accuracy for Design of Multidielectric Layers Microstrip Patch Antenna
498 Impovement in Accuacy fo Design of Multidielectic Layes Micostip Patch Antenna Sami Dev Gupta*, Anvesh Gag and Anuag P. Saan Jaypee Institute of Infomation Technology Univesity Noida, Utta Padesh,
More informationEKT 345 MICROWAVE ENGINEERING CHAPTER 2: PLANAR TRANSMISSION LINES
EKT 345 MICROWAVE ENGINEERING CHAPTER : PLANAR TRANSMISSION LINES 1 Tansmission Lines A device used to tansfe enegy fom one point to anothe point efficiently Efficiently minimum loss, eflection and close
More informationSchool of Electrical and Computer Engineering, Cornell University. ECE 303: Electromagnetic Fields and Waves. Fall 2007
School of Electical and Compute Engineeing, Conell Univesity ECE 303: Electomagnetic Fields and Waves Fall 007 Homewok 8 Due on Oct. 19, 007 by 5:00 PM Reading Assignments: i) Review the lectue notes.
More information4/18/2005. Statistical Learning Theory
Statistical Leaning Theoy Statistical Leaning Theoy A model of supevised leaning consists of: a Envionment - Supplying a vecto x with a fixed but unknown pdf F x (x b Teache. It povides a desied esponse
More informationPulse Neutron Neutron (PNN) tool logging for porosity Some theoretical aspects
Pulse Neuton Neuton (PNN) tool logging fo poosity Some theoetical aspects Intoduction Pehaps the most citicism of Pulse Neuton Neuon (PNN) logging methods has been chage that PNN is to sensitive to the
More informationChem 453/544 Fall /08/03. Exam #1 Solutions
Chem 453/544 Fall 3 /8/3 Exam # Solutions. ( points) Use the genealized compessibility diagam povided on the last page to estimate ove what ange of pessues A at oom tempeatue confoms to the ideal gas law
More informationLight Time Delay and Apparent Position
Light Time Delay and ppaent Position nalytical Gaphics, Inc. www.agi.com info@agi.com 610.981.8000 800.220.4785 Contents Intoduction... 3 Computing Light Time Delay... 3 Tansmission fom to... 4 Reception
More informationDual N-Channel 20 V (D-S) MOSFET
Si988DH Dual NChannel V (DS) MOSFET PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (A) a Q g (Typ.). at V GS =. V. a.6 nc 8 at V GS =. V. a. at V GS =.8 V. a SOT6 SC7 (6LEADS) FEATURES Halogenfee Accoding to
More informationContact impedance of grounded and capacitive electrodes
Abstact Contact impedance of gounded and capacitive electodes Andeas Hödt Institut fü Geophysik und extateestische Physik, TU Baunschweig The contact impedance of electodes detemines how much cuent can
More informationCurrent, Resistance and
Cuent, Resistance and Electomotive Foce Chapte 25 Octobe 2, 2012 Octobe 2, 2012 Physics 208 1 Leaning Goals The meaning of electic cuent, and how chages move in a conducto. What is meant by esistivity
More informationEKT 356 MICROWAVE COMMUNICATIONS CHAPTER 2: PLANAR TRANSMISSION LINES
EKT 356 MICROWAVE COMMUNICATIONS CHAPTER : PLANAR TRANSMISSION LINES 1 Tansmission Lines A device used to tansfe enegy fom one point to anothe point efficiently Efficiently minimum loss, eflection and
More informationPhysics 107 TUTORIAL ASSIGNMENT #8
Physics 07 TUTORIAL ASSIGNMENT #8 Cutnell & Johnson, 7 th edition Chapte 8: Poblems 5,, 3, 39, 76 Chapte 9: Poblems 9, 0, 4, 5, 6 Chapte 8 5 Inteactive Solution 8.5 povides a model fo solving this type
More informationUniversity of Illinois at Chicago Department of Physics. Electricity & Magnetism Qualifying Examination
E&M poblems Univesity of Illinois at Chicago Depatment of Physics Electicity & Magnetism Qualifying Examination Januay 3, 6 9. am : pm Full cedit can be achieved fom completely coect answes to 4 questions.
More informationDynamic Performances of Self-Excited Induction Generator Feeding Different Static Loads
SERBIAN JOURNAL OF ELECTRICAL ENGINEERING Vol. 3, No. 1, June 2006, 63-76 Dynamic Pefomances of Self-Excited Induction Geneato Feeding Diffeent Static Loads Ali Nesba 1, Rachid Ibtiouen 2, Oma Touhami
More informationAnalysis of high speed machining center spindle dynamic unit structure performance Yuan guowei
Intenational Confeence on Intelligent Systems Reseach and Mechatonics Engineeing (ISRME 0) Analysis of high speed machining cente spindle dynamic unit stuctue pefomance Yuan guowei Liaoning jidian polytechnic,dan
More informationIs Now Part of To learn more about ON Semiconductor, please visit our website at
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC
More information55:041 Electronic Circuits
55:041 Electonic icuits BJT eview Sections in hapte 5 & 6 in Textbook A. Kuge BJT eview, Page- 1 npn Output Family of uves A. Kuge BJT eview, Page- 2 npn BJT dc Equivalent evese biased Fowad biased i B
More informatione = 1.60 x 10 ε 0 = 8.85 x C 2 / Nm 2 V i...) F a = m Power =
Equations: 1 1 Constants: q q v v F = k F = qe e = 1.6 x 1-19 C q 1 q 1 9 E = k = k = = 9 1 Nm / C 4πε 4 πε Φ = E da Φ V Total v v q = E da = = V f V i = W q enclosed ε = E ds U e V = q q V V V V = k E
More informationCapacitors and Capacitance
Capacitos and Capacitance Capacitos ae devices that can stoe a chage Q at some voltage V. The geate the capacitance, the moe chage that can be stoed. The equation fo capacitance, C, is vey simple: C Q
More informationPearson s Chi-Square Test Modifications for Comparison of Unweighted and Weighted Histograms and Two Weighted Histograms
Peason s Chi-Squae Test Modifications fo Compaison of Unweighted and Weighted Histogams and Two Weighted Histogams Univesity of Akueyi, Bogi, v/noduslód, IS-6 Akueyi, Iceland E-mail: nikolai@unak.is Two
More informationSAMPLE PAPER I. Time Allowed : 3 hours Maximum Marks : 70
SAMPL PAPR I Time Allowed : 3 hous Maximum Maks : 70 Note : Attempt All questions. Maks allotted to each question ae indicated against it. 1. The magnetic field lines fom closed cuves. Why? 1 2. What is
More informationSensors and Actuators Introduction to sensors
Sensos an ctuatos Intouction to sensos Sane Stuijk (s.stuijk@tue.nl) Depatment of Electical Engineeing Electonic Systems PITIE SENSORS (hapte 3., 7., 9.,.6, 3., 3.) 3 Senso classification type / quantity
More informationModule 12: Current and Resistance 1
Module 12: Cuent and Resistance 1 Table of Contents 6.1 Electic Cuent... 6-2 6.1.1 Cuent Density... 6-2 6.2 Ohm s Law... 6-4 6.3 Electical Enegy and Powe... 6-7 6.4 Summay... 6-8 6.5 Solved Poblems...
More information2 x 8 2 x 2 SKILLS Determine whether the given value is a solution of the. equation. (a) x 2 (b) x 4. (a) x 2 (b) x 4 (a) x 4 (b) x 8
5 CHAPTER Fundamentals When solving equations that involve absolute values, we usually take cases. EXAMPLE An Absolute Value Equation Solve the equation 0 x 5 0 3. SOLUTION By the definition of absolute
More informationBetween any two masses, there exists a mutual attractive force.
YEAR 12 PHYSICS: GRAVITATION PAST EXAM QUESTIONS Name: QUESTION 1 (1995 EXAM) (a) State Newton s Univesal Law of Gavitation in wods Between any two masses, thee exists a mutual attactive foce. This foce
More informationDetermining solar characteristics using planetary data
Detemining sola chaacteistics using planetay data Intoduction The Sun is a G-type main sequence sta at the cente of the Sola System aound which the planets, including ou Eath, obit. In this investigation
More informationSwissmetro: design methods for ironless linear transformer
Swissmeto: design methods fo ionless linea tansfome Nicolas Macabey GESTE Engineeing SA Scientific Pak PSE-C, CH-05 Lausanne, Switzeland Tel (+4) 2 693 83 60, Fax. (+4) 2 693 83 6, nicolas.macabey@geste.ch
More informationExam 3, vers Physics Spring, 2003
1 of 9 Exam 3, ves. 0001 - Physics 1120 - Sping, 2003 NAME Signatue Student ID # TA s Name(Cicle one): Michael Scheffestein, Chis Kelle, Paisa Seelungsawat Stating time of you Tues ecitation (wite time
More informationTransverse Wakefield in a Dielectric Tube with Frequency Dependent Dielectric Constant
ARDB-378 Bob Siemann & Alex Chao /4/5 Page of 8 Tansvese Wakefield in a Dielectic Tube with Fequency Dependent Dielectic Constant This note is a continuation of ARDB-368 that is now extended to the tansvese
More informationUNIT # 08 CURRENT ELECTRICITY
XS UNT # 8 UNT LTTY. j uent density n hage density j nev d v d j v d n e, n n n v d n n : v n n d. j nev d n j n e 9. Node-6\:\ata\\Kota\J-dvanced\SMP\Phy\Solution\Unit-7 & 8\-uent lecticity.p65 d nev
More informationStanford University CS259Q: Quantum Computing Handout 8 Luca Trevisan October 18, 2012
Stanfod Univesity CS59Q: Quantum Computing Handout 8 Luca Tevisan Octobe 8, 0 Lectue 8 In which we use the quantum Fouie tansfom to solve the peiod-finding poblem. The Peiod Finding Poblem Let f : {0,...,
More informationGeneral Railgun Function
Geneal ailgun Function An electomagnetic ail gun uses a lage Loentz foce to fie a pojectile. The classic configuation uses two conducting ails with amatue that fits between and closes the cicuit between
More informationCentripetal Force OBJECTIVE INTRODUCTION APPARATUS THEORY
Centipetal Foce OBJECTIVE To veify that a mass moving in cicula motion expeiences a foce diected towad the cente of its cicula path. To detemine how the mass, velocity, and adius affect a paticle's centipetal
More informationFeatures. Y Wide supply voltage range 3 0V to 15V. Y Guaranteed noise margin 1 0V. Y High noise immunity 0 45 VCC (typ )
MM70C95 MM80C95 MM70C97 MM80C97 TRI-STATE Hex Buffers MM70C96 MM80C96 MM70C98 MM80C98 TRI-STATE Hex Inverters General Description These gates are monolithic complementary MOS (CMOS) integrated circuits
More informationMM54C14 MM74C14 Hex Schmitt Trigger
MM54C14 MM74C14 Hex Schmitt Trigger General Description The MM54C14 MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement
More informationModeling Fermi Level Effects in Atomistic Simulations
Mat. Res. Soc. Symp. Poc. Vol. 717 Mateials Reseach Society Modeling Femi Level Effects in Atomistic Simulations Zudian Qin and Scott T. Dunham Depatment of Electical Engineeing, Univesity of Washington,
More informationV G. In this class, we will look at a possible hypothesis for way the time dependence is t
ECE65R : Reliability Physics of anoelectonic Devices Lectue : CI Time Exponents Date : Dec. 4, 6 Classnote : Saakshi Gangwal Review : Lutfe A Siddiqui. Review We have spent seveal weeks discussing discussing
More informationChapter 5 Force and Motion
Chapte 5 Foce and Motion In Chaptes 2 and 4 we have studied kinematics, i.e., we descibed the motion of objects using paametes such as the position vecto, velocity, and acceleation without any insights
More informationTHE INFLUENCE OF THE MAGNETIC NON-LINEARITY ON THE MAGNETOSTATIC SHIELDS DESIGN
THE INFLUENCE OF THE MAGNETIC NON-LINEARITY ON THE MAGNETOSTATIC SHIELDS DESIGN LIVIU NEAMŢ 1, ALINA NEAMŢ, MIRCEA HORGOŞ 1 Key wods: Magnetostatic shields, Magnetic non-lineaity, Finite element method.
More informationChapter 5 Force and Motion
Chapte 5 Foce and Motion In chaptes 2 and 4 we have studied kinematics i.e. descibed the motion of objects using paametes such as the position vecto, velocity and acceleation without any insights as to
More informationPhysics 2A Chapter 10 - Moment of Inertia Fall 2018
Physics Chapte 0 - oment of netia Fall 08 The moment of inetia of a otating object is a measue of its otational inetia in the same way that the mass of an object is a measue of its inetia fo linea motion.
More informationAppraisal of Logistics Enterprise Competitiveness on the Basis of Fuzzy Analysis Algorithm
Appaisal of Logistics Entepise Competitiveness on the Basis of Fuzzy Analysis Algoithm Yan Zhao, Fengge Yao, Minming She Habin Univesity of Commece, Habin, Heilongjiang 150028, China, zhaoyan2000@yahoo.com.cn
More informationIN SITU SOUND ABSORPTION COEFFICIENT MEASUREMENT OF VARIOUS SURFACES
IN SITU SOUND ABSORPTION COEFFICIENT MEASUREMENT OF VARIOUS SURFACES PACS REFERENCES : 43.20.El, 43.20.Ye, 43.55.Ev, 43.58.Bh Michel Béengie 1 ; Massimo Gaai 2 1 Laboatoie Cental des Ponts et Chaussées
More informationA DETAILED STUDY OF THE HIGH ORDER SERIAL RESONANT INVERTER FOR INDUCTION HEATING
ELECTRONICS 005 1 3 Septembe, Sozopol, BULGARIA A DETAILED STUDY OF THE HIGH ORDER SERIAL RESONANT INVERTER FOR INDUCTION HEATING Evgeniy Ivanov Popov, Liliya Ivanova Pindeva, Elisaveta Histova Mileva,
More informationECE Spring Prof. David R. Jackson ECE Dept. Notes 5
ECE 6345 Sping 15 Pof. David R. Jackson ECE Dept. Notes 5 1 Oveview This set of notes discusses impoved models of the pobe inductance of a coaxially-fed patch (accuate fo thicke substates). A paallel-plate
More informationImpedance-based Biosensors. Pittsburgh, PA 15213, U.S.A.
Impedance-based Biosensos X. Huang, 1 D.W. Geve, 1 I. Nausieda, 1 D. Nguyen, 2 and M.M. Domach 2 1 Depatment of Electical and Compute Engineeing, Canegie Mellon Univesity, Pittsbugh, PA 15213, U.S.A. 2
More information54153 DM54153 DM74153 Dual 4-Line to 1-Line Data Selectors Multiplexers
54153 DM54153 DM74153 Dual 4-Line to 1-Line Data Selectors Multiplexers General Description Each of these data selectors multiplexers contains inverters and drivers to supply fully complementary on-chip
More informationChapter 3: Theory of Modular Arithmetic 38
Chapte 3: Theoy of Modula Aithmetic 38 Section D Chinese Remainde Theoem By the end of this section you will be able to pove the Chinese Remainde Theoem apply this theoem to solve simultaneous linea conguences
More informationEEO 401 Digital Signal Processing Prof. Mark Fowler
EEO 41 Digital Signal Pocessing Pof. Mak Fowle Note Set #31 Linea Phase FIR Design Optimum Equiipple (Paks-McClellan) Reading: Sect. 1.2.4 1.2.6 of Poakis & Manolakis 1/2 Motivation The window method and
More informationDM54LS450 DM74LS Multiplexer
DM54LS450 DM74LS450 16 1 Multiplexer General Description The 16 1 Mux selects one of sixteen inputs E0 through E15 specified by four binary select inputs A B C and D The true data is output on Y and the
More informationA Deep Convolutional Neural Network Based on Nested Residue Number System
A Deep Convolutional Neual Netwok Based on Nested Residue Numbe System Hioki Nakahaa Ehime Univesity, Japan Tsutomu Sasao Meiji Univesity, Japan Abstact A pe-tained deep convolutional neual netwok (DCNN)
More informationDo Managers Do Good With Other People s Money? Online Appendix
Do Manages Do Good With Othe People s Money? Online Appendix Ing-Haw Cheng Haison Hong Kelly Shue Abstact This is the Online Appendix fo Cheng, Hong and Shue 2013) containing details of the model. Datmouth
More informationHigh precision computer simulation of cyclotrons KARAMYSHEVA T., AMIRKHANOV I. MALININ V., POPOV D.
High pecision compute simulation of cyclotons KARAMYSHEVA T., AMIRKHANOV I. MALININ V., POPOV D. Abstact Effective and accuate compute simulations ae highly impotant in acceleatos design and poduction.
More informationASTR415: Problem Set #6
ASTR45: Poblem Set #6 Cuan D. Muhlbege Univesity of Mayland (Dated: May 7, 27) Using existing implementations of the leapfog and Runge-Kutta methods fo solving coupled odinay diffeential equations, seveal
More informationAQI: Advanced Quantum Information Lecture 2 (Module 4): Order finding and factoring algorithms February 20, 2013
AQI: Advanced Quantum Infomation Lectue 2 (Module 4): Ode finding and factoing algoithms Febuay 20, 203 Lectue: D. Mak Tame (email: m.tame@impeial.ac.uk) Intoduction In the last lectue we looked at the
More informationFields and Waves I Spring 2005 Homework 4. Due 8 March 2005
Homewok 4 Due 8 Mach 005. Inceasing the Beakdown Voltage: This fist question is a mini design poject. You fist step is to find a commecial cable (coaxial o two wie line) fo which you have the following
More information3.6 Applied Optimization
.6 Applied Optimization Section.6 Notes Page In this section we will be looking at wod poblems whee it asks us to maimize o minimize something. Fo all the poblems in this section you will be taking the
More informationMM54HC148 MM74HC Line Priority Encoder
MM54HC148 MM74HC148 8-3 Line Priority Encoder General Description This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption typical of
More informationFeatures. Y Wide supply voltage range 3V to 15V. Y Guaranteed noise margin 1V. Y High noise immunity 0 45 VCC (typ )
MM54C00 MM74C00 Quad 2-Input NAND Gate MM54C02 MM74C02 Quad 2-Input NOR Gate Hex Inverter MM54C10 MM74C10 Triple 3-Input NAND Gate MM54C20 MM74C20 Dual 4-Input NAND Gate General Description These logic
More informationPhysics 2B Chapter 22 Notes - Magnetic Field Spring 2018
Physics B Chapte Notes - Magnetic Field Sping 018 Magnetic Field fom a Long Staight Cuent-Caying Wie In Chapte 11 we looked at Isaac Newton s Law of Gavitation, which established that a gavitational field
More informationMM54C221 MM74C221 Dual Monostable Multivibrator
MM54C221 MM74C221 Dual Monostable Multivibrator General Description The MM54C221 MM74C221 dual monostable multivibrator is a monolithic complementary MOS integrated circuit Each multivibrator features
More informationRetrieval of three-dimensional distribution of rainfall parameters for rain attenuation correction using multi-parameter radar
Retieval of thee-dimensional distibution of ainfall paametes fo ain attenuation coection using multi-paamete ada Dong-Soon Kim 1, Dong-In Lee 1, Masayuki Maki 2 and Ji-Young Gu 1 1 Depatment of Envionmental
More information54LS352 DM74LS352 Dual 4-Line to 1-Line Data Selectors Multiplexers
54LS352 DM74LS352 Dual 4-Line to 1-Line Data Selectors Multiplexers General Description Each of these data selectors multiplexers contains inverters and drivers to supply fully complementary on-chip binary
More informationDesign of CMOS Analog Integrated Circuits. Basic Building Block
Desin of CMOS Analo Inteated Cicuits Fanco Malobeti Basic Buildin Block F. Malobeti : Desin of CMOS Analo Inteated Cicuits - Basic Buildin Block INERTER WITH ACTIE LOAD The simplest fom of ain stae, the
More informationRevision of Lecture Eight
Revision of Lectue Eight Baseband equivalent system and equiements of optimal tansmit and eceive filteing: (1) achieve zeo ISI, and () maximise the eceive SNR Thee detection schemes: Theshold detection
More informationCD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger
CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger General Description The CD4093B consists of four Schmitt-trigger circuits Each circuit functions as a 2-input NAND gate with Schmitt-trigger action on
More informationIntroduction to Arrays
Intoduction to Aays Page 1 Intoduction to Aays The antennas we have studied so fa have vey low diectivity / gain. While this is good fo boadcast applications (whee we want unifom coveage), thee ae cases
More informationLab 10: Newton s Second Law in Rotation
Lab 10: Newton s Second Law in Rotation We can descibe the motion of objects that otate (i.e. spin on an axis, like a popelle o a doo) using the same definitions, adapted fo otational motion, that we have
More informationCD4013BM CD4013BC Dual D Flip-Flop
CD4013BM CD4013BC Dual D Flip-Flop General Description The CD4013B dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors
More information54LS20 DM54LS20 DM74LS20 Dual 4-Input NAND Gates
June 1989 54LS20 DM54LS20 DM74LS20 Dual 4-Input NAND Gates General Description This device contains two independent gates each of which performs the logic NAND function Connection Diagram Function Table
More informationPulse Neutron Neutron (PNN) tool logging for porosity
Pulse Neuton Neuton (PNN) tool logging fo poosity Some theoetical aspects Hotwell Handelsges.m.b.H Oedenbuge Stasse 6 7013 Klingenbach, AUSTRIA Tel.: +43 (0) 687-48058 Fax: +43 (0) 687 48059 office@hotwell.at
More information2018 Physics. Advanced Higher. Finalised Marking Instructions
National Qualifications 018 018 Physics Advanced Highe Finalised Making Instuctions Scottish Qualifications Authoity 018 The infomation in this publication may be epoduced to suppot SQA qualifications
More information54LS00 DM54LS00 DM74LS00 Quad 2-Input NAND Gates
54LS00 DM54LS00 DM74LS00 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function Connection Diagram Features Y Dual-In-Line
More informationChapter 3 Optical Systems with Annular Pupils
Chapte 3 Optical Systems with Annula Pupils 3 INTRODUCTION In this chapte, we discuss the imaging popeties of a system with an annula pupil in a manne simila to those fo a system with a cicula pupil The
More informationDM54LS73A DM74LS73A Dual Negative-Edge-Triggered
June 1989 DM54LS73A DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered
More informationTruncated Squarers with Constant and Variable Correction
Please veify that ) all pages ae pesent, 2) all figues ae acceptable, 3) all fonts and special chaactes ae coect, and ) all text and figues fit within the Tuncated Squaes with Constant and Vaiable Coection
More information54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops
54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered J-K
More informationMM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear
MM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear General Description This high speed D-TYPE FLIP-FLOP with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise
More informationCD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch
CD4723BM CD4723BC Dual 4-Bit Addressable Latch CD4724BM CD4724BC 8-Bit Addressable Latch General Description The CD4723B is a dual 4-bit addressable latch with common control inputs including two address
More information4. Electrodynamic fields
4. Electodynamic fields D. Rakhesh Singh Kshetimayum 1 4.1 Intoduction Electodynamics Faaday s law Maxwell s equations Wave equations Lenz s law Integal fom Diffeential fom Phaso fom Bounday conditions
More information[2007] IEEE. Reprinted, with permission, from [Jiaxin Chen, Jianguo Zhu, Youguang Guo, A 2-D nonlinear FEA tool embedded in Matlab/Simulink
[2007] IEEE. Repinted, with pemission, fom [Jiaxin Chen, Jianguo Zhu, Youguang Guo, A 2-D nonlinea FEA tool embedded in Matlab/Simulin suounding fo application of electomagnetic field analysis in powe
More informationCoupled Electromagnetic and Heat Transfer Simulations for RF Applicator Design for Efficient Heating of Materials
Coupled Electomagnetic and Heat Tansfe Simulations fo RF Applicato Design fo Efficient Heating of Mateials Jeni Anto 1 and Raj C Thiagaajan 2 * 1 Reseache, Anna Univesity, Chennai, 2 ATOA Scientific Technologies
More information54AC 74AC11 Triple 3-Input AND Gate
54AC 74AC11 Triple 3-Input AND Gate General Description The AC11 contains three 3-input AND gates Logic Symbol IEEE IEC Features Pin Assignment for DIP Flatpak and SOIC Y ICC reduced by 50% Y Outputs source
More informationC/CS/Phys C191 Shor s order (period) finding algorithm and factoring 11/12/14 Fall 2014 Lecture 22
C/CS/Phys C9 Sho s ode (peiod) finding algoithm and factoing /2/4 Fall 204 Lectue 22 With a fast algoithm fo the uantum Fouie Tansfom in hand, it is clea that many useful applications should be possible.
More informationSTUDY ON 2-D SHOCK WAVE PRESSURE MODEL IN MICRO SCALE LASER SHOCK PEENING
Study Rev. Adv. on -D Mate. shock Sci. wave 33 (13) pessue 111-118 model in mico scale lase shock peening 111 STUDY ON -D SHOCK WAVE PRESSURE MODEL IN MICRO SCALE LASER SHOCK PEENING Y.J. Fan 1, J.Z. Zhou,
More informationCD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide power supply operating
More informationCOMP Parallel Computing SMM (3) OpenMP Case Study: The Barnes-Hut N-body Algorithm
COMP 633 - Paallel Computing Lectue 8 Septembe 14, 2017 SMM (3) OpenMP Case Study: The Banes-Hut N-body Algoithm Topics Case study: the Banes-Hut algoithm Study an impotant algoithm in scientific computing»
More informationCD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and
More informationLecture 2 Date:
Lectue 2 Date: 5.1.217 Definition of Some TL Paametes Examples of Tansmission Lines Tansmission Lines (contd.) Fo a lossless tansmission line the second ode diffeential equation fo phasos ae: LC 2 d I
More informationCHAPTER 3. Section 1. Modeling Population Growth
CHAPTER 3 Section 1. Modeling Population Gowth 1.1. The equation of the Malthusian model is Pt) = Ce t. Apply the initial condition P) = 1. Then 1 = Ce,oC = 1. Next apply the condition P1) = 3. Then 3
More informationAP Physics C: Electricity and Magnetism 2003 Scoring Guidelines
AP Physics C: Electicity and Magnetism 3 Scoing Guidelines The mateials included in these files ae intended fo use by AP teaches fo couse and exam pepaation; pemission fo any othe use must be sought fom
More information