APPLICATION NOTE. What Is This Application Note Trying To Accomplish? Basic Physics Laws, Circuit Theorems and Analysis. Ohm s and Kirchoff s Laws

Transcription

1 APPLICATION NOTE Basic Analog for Digital Designers AN9510 ev..00 Oct 19, 014 What Is This Application Note Trying To Accomplish? There is a long gap between engineering college and mid career in a nonengineering position, but technology marches on so a simple method of keeping abreast with the latest developments is required. This application note starts with an overview of the basic laws of physics, progresses through circuits 1 and, and explains op amp operation through the use of feedback principles. Math is the foundation of circuit design, but it is kept to the simplest level possible in this application note. For more advanced op amp topics please refer to the technical papers listed in references 1 and. Basic Physics Laws, Circuit Theorems and Analysis ood news and bad news. The bad news is that it takes a certain amount of dog work, like relearning physics and circuit theorems, before proficiency becomes second nature. The good news is that if you just hang in for a few pages you will experience the joy of analyzing circuits like an expert. You will gain ten years experience in a few hours. You will be able to write op amp equations like a design engineer. You might think this is a worthless effort, but imagine the look on the analog engineer s face, the one who thinks nonanalog engineers are as dumb as a box of rocks, when you write your own op amp circuit equations. Ohm s and Kirchoff s Laws Ohm s law states that there is a relationship between the current in a circuit and the voltage potential across a circuit. This relationship is a function of a constant called the resistance. I 1 = 0 or = 1 + voltage sources = voltage drops 1 FIUE. ILLUSTATION OF KICHOFF S OLTAE LAW Kirchoff s current law states that the algebraic sum of all the currents leaving a node equals zero. The sum includes independent current sources, dependent current sources, and component currents. I + I = I + I 4 + I I I 4 = 0 currents into a junction = 0 FIUE. ILLUSTATION OF KICHOFF S CUENT LAW oltage and Current Dividers I (EQ. ) (EQ. ) (EQ. 4) (EQ. 5) (EQ. 6) oltage dividers are seen often in circuit design because they are useful for generating a reference voltage, for biasing active devices, and acting as feedback elements. Current dividers are seen less often, but they are still important so we will develop the equations for them. The voltage divider equations, which assume that the load does not draw any current, are developed in Figure 4. I 4 = I FIUE 1. ILLUSTATION OF OHM S LAW (EQ.1) I I D Kirchoff s voltage law states that the algebraic sum of the voltages around any closed loop equals zero. The sum includes independent voltage sources, dependent voltage sources and voltage drops across resistors (called I drops). = I + I = I 1 + I = + (EQ. 7) (EQ. 8) (EQ. 9) D = I + = = + FIUE 4. DEIATION OF THE OLTAE DIIDE ULE AN9510 ev..00 Page 1 of 7 Oct 19, 014

2 The current divider equations, assuming that the only load is, is given in Figure 5. I The circuit to the left of Y is now replaced by the Thevenin equivalents. Z th I th 0 I = + I (EQ. 10) = = I (EQ. 11) = I (EQ. 1) + I = + I = I + I = I I + = I 1 1 (EQ. 1) Then: I = I + FIUE 5. DEIATION OF THE CUENT DIIDE ULE Thevenin s and Norton s Theorems There are situations where it is simpler to concentrate on one component rather than write equations for the complete circuit. When the input source is a voltage source, Thevenin s theorem is used to isolate the component of interest, but if the input source is a current source, Norton s theorem is used to isolate the component of interest. To apply Thevenin s theorem one must look back into the terminals of the component being replaced. Now calculate the open circuit voltage seen at these terminals, and during this calculation consider that there is no load current so the voltage divider rule can be used. Next short independent voltage sources and open independent current sources; now calculate the impedance seen looking into the terminals. The final step is to replace the original circuit with the Thevenin equivalent voltage, th, and Thevenin equivalent impedance, Z th. Thevenin s theorem is illustrated in Figure 6. FIUE 6. THE OIINAL CICUIT (EQ. 14) The open circuit voltage is calculated by looking into the terminals Y, and then calculating the open circuit voltage with the voltage divider rule. th = (EQ. 15) + The impedance looking back into the terminals Y with the independent source,, shorted is given below. Z th = Z x y = + Y 0 (EQ. 16) 0 = th (EQ. 17) Z th + + = FIUE 7. THE THEENIN EQUIALENT CICUIT The loop equations are worked out below. Notice that not only is the derivation of the equations more laborious, but the labor will get out of hand with the addition of another loop. This is why Thevenin s theorem is preferred over loop equations. = + I I + + = FIUE 8. LOOP EQUATION ANALYSIS OF THE SAME CICUIT The Norton equivalent circuit is seldom used in circuit design, so it s derivation [] and illustration will be left to the serious student. Superposition I 0 (EQ. 18) (EQ. 19) + + = I (EQ. 0) + + I + I (EQ. 1) I = (EQ. ) 0 = I (EQ. ) 0 = (EQ. 4) The principle of superposition states that the equation for each independent source can be calculated separately, and then the equations (or results) can be added to give the total result. When implementing superposition the equation for AN9510 ev..00 Page of 7 Oct 19, 014

3 each source is calculated with the other independent voltage sources short circuited and the independent current sources open circuited. The equations for all the sources are added together to obtain the final answer = 0 FIUE 9. SUPEPOSITION EAMPLE 0 = + 1 = = 0 + (EQ. 5) 1 th + 0 = th + = + (EQ. 9) Notice that the Thevenin method used twice as many equations to describe the circuit as were required to arrive at the same result with superposition. Also, the form of the final equation arrived at by superposition is much easier to analyze. Feedback Principles This discussion of feedback principles is simple because they are easy to understand. The application of the principles can be very complicated for the design engineer, but we can grasp the principles without understanding all of the nuances. If this material creates a thirst it may be slaked by reading references and = + = + + (EQ. 6 IN E A Analysis Tools Why Do We Need More Than One? Each one of the analysis tools shown has a place where it is optimal. Later during the op amp analysis the tools will be employed to relieve the burden of detailed calculation. Figures 10 and 11 illustrate an example of the extra calculations caused by using the less optimal tool to perform the analysis. 1 0 th = + th = 1 (EQ. 7) FIUE 10. SUPEPOSITION EAMPLE EDAW th I = th + 0 = I (EQ. 8) th th FIUE 11. THEENIN EQUIALENT CICUIT MODEL 0 FIUE 1. FEEDBACK BLOCK DIAAM = EA (EQ. 0) E = IN A = IN 1+ A (EQ. 1) (EQ. ) Equations 0 and 1 are written on the block diagram, and Equation is obtained by combining them to eliminate the error, E. If = 1 in Equation = IN, or the feedback circuit has turned into a unity gain buffer. If = 0 in Equation = A IN, or there is no feedback. Notice that the direct gain, A, does not control the feedback circuit closed loop gain; rather, the feedback factor,, controls the closed loop gain in a feedback circuit. This is the essence of a feedback circuit; now the closed loop gain is a function of the feedback factor which is comprised of passive components. The closed loop gain error, stability and drift are now dependent on stable, accurate, and inexpensive passive components. The closed loop gain assumption is valid as long as A>>1, also E 0 if this assumption is valid. If A = 1 then Equation becomes / IN = 1/0, or it is indeterminate. If the energy in the circuit was unlimited the circuit would consume the world, but luckily it is limited, so the circuit oscillates from positive to negative saturation. This is an oscillator, thus the definition of an oscillator is that the gain be 1 while the phase shift equals 180 degrees. Now we conclude that the feedback factor controls the closed loop gain, and the direct gain/feedback factor combination determines if the circuit will be stable or will be an oscillator. AN9510 ev..00 Page of 7 Oct 19, 014

4 The Op Amp Symbol It is important to understand the op amp symbol shown in Figure 1. The input,, is the inverting input, and the +input, +, is the noninverting input. The point of the triangle is the op amp output, and the op amp multiplies the differential voltage, (+ ), by a large gain, a. The Inverting Op Amp Three assumptions are made in the calculation of the inverting op amp circuit equations. First, the current into the op amp inputs, I B in Figure 1, is assumed to be zero; this is a valid assumption because the bias currents are usually much lower than signal currents. The second assumption is that the op amp gain, a, is extremely high, and this is a valid assumption in most situations where the op amp s bandwidth is much greater than the signal bandwidth. The third assumption, which is that the error voltage, E, equals zero, is a result of assuming an extremely high op amp gain. When a is very large, can assume any value required to drive the inverting input voltage to the noninverting input voltage, so E will always be forced to zero. I IN I F B E OUT I B FIUE 1. INETIN OP AMP CICUIT Assume I B = 0, E = 0, a = Then: IN = = I = (EQ. ) F IN = (EQ. 4) = IN (EQ. 5) Equation is written by applying Kirchoff s current law to the inverting node. Equation 5 is obtained through algebraic manipulation of Equations and 4. Note that the ideal closed loop gain, Equation, does not contain the op amp gain, so it is independent of the op amp gain so long as the assumptions are valid. The inverting op amp can be configured as an inverting adder as shown in Figure 14. The analysis is similar to that shown for the inverting amplifier, but it is easier to understand if the concept of a virtual ground is understood. irtual is defined as existing or resulting in effect though not in actual fact. The inverting node acts as a real ground because no voltage is developed across it, but the current path is restricted to the PC traces attached to the node. The noninverting input of the op amp is connected to ground, thus if the error voltage is to be zero as was assumed, the inverting input functions as though it were tied to ground. Considering the virtual ground, the three currents flowing through 1,, and can be calculated separately. Now superposition can be applied to the circuit; Equation 6 calculates the gain for each independent source, and Equation 7 recombines the separate gains. 1 1 If / = 1 Then; = FIUE 14. THE INETIN ADDE The NonInverting Op Amp eferring to Figure 15, because E is equal to zero the voltage at point is equal to IN. There is voltage divider formed by the feedback resistor,, and the gain setting resistor,, and the voltage divider input voltage is the output voltage of the op amp. Equation 9 is written using the voltage divider rule, and Equation 40 is obtained through algebraic manipulation. Notice that the ideal closed loop gain is again independent of the op amp gain. FIUE 15. NONINETIN OP AMP The Differential Amplifier 01 = 1, 0 =, 1 0 = (EQ. 6) = = 1 1 (EQ. 7) IN E IN The differential amplifier schematic is given in Figure 16, and the analysis will be done in two parts because we will use superposition. Two output voltages, one corresponding to each input voltage source, will be calculated separately and added together. The output from 1 is calculated in Equation 4; + is first calculated with the voltage divider rule, and then it is substituted into the noninverting gain equation yielding Equation 4. The output from is calculated from the inverting gain equation in Equation 44. The I (EQ. 8) IN = + (EQ. 9) + = IN (EQ. 40) AN9510 ev..00 Page 4 of 7 Oct 19, 014

5 results of Equations 4 and 44 are added in Equation 45 to obtain the complete circuit equation. Notice that the output is a function of the difference between the two input voltages, this accounts for the name differential amplifier. If a small signal is riding on a large signal, say 10m, 0.001Hz riding on 5 DC, the DC can be stripped off by putting the combined signal into the noninverting input, and putting 5 DC into the inverting input. The 5 DC becomes a common mode signal (a signal which is common to both inputs), so it is rejected by the differential amplifier if =, and =. Thevenin equivalent voltage and resistance, then redraw the circuit as shown in Figure 18. Now the inverting gain can be calculated in the normal manner using the algebraic simplification shown in Equation 48. IN Y 4 FIUE 17. T NETWOK IN THE FEEDBACK PATH 1 + IN th th 1 = 1 FIUE 16. THE DIFFEENTIAL AMPLIFIE = 1 + (EQ. 41) 1 1 = = + (EQ. 4) + + This effect could be accomplished through the use of a coupling capacitor, but because the frequency of the signal is so low the capacitor value and size would be too big. The differential amplifier also rejects AC common mode signals. Data transmission schemes often use twisted pairs for the interconnections so that any noise coupled on the lines will be common mode. Differential amplifiers are used as receivers in this data transmission scheme because they reject the common mode noise while amplifying the signal. T Networks in the Feedback Path (EQ. 4) = (EQ. 44) = 1 If = and = + + (EQ. 45) 1 = (EQ. 46) Putting a T network in the feedback path as shown in Figure 17 complicates the analysis, but offers the advantage of high closed loop gain coupled with low value feedback resistors. This configuration is also useful for some filter configurations. Thevenin s theorem is applied as shown in Figure 18. Look into from, Y and calculate the FIUE 18. THEENIN ANALYSIS OF T NETWOKS IN THE FEEDBACK PATH 0 th + th th = + th = = 4 IN (EQ. 47) 1 + th IN + = = = ideo Amplifiers (EQ. 48) Until now we have implicitly assumed that all op amps are the same. This is not true, but because the ideal closed loop equations are identical, it is a workable assumption. The two big classifications of op amps are voltage feedback and current feedback. The type of feedback is not the only difference between these op amps. The internal circuit configurations are dramatically different, so much so that recommended reference #1 dwells on voltage feedback while reference # dwells on current feedback. Whenever an op amp is used in a high frequency circuit such as a video amp there is a strong likelihood that it will be a current feedback op amp. Again, because the closed loop ideal gain equations are identical for voltage and current feedback op amps we will not distinguish between them. In Figure 19, IN is usually the terminating resistance for the input cable, and it is usually 50 or 75. M is the matching resistance for the cable being driven, and T is the terminating resistance for the driven cable. T is often shown here for gain calculations while it is physically placed at the cable end. Using Equation 49, we see that when = and M = T, the overall circuit gain is one. AN9510 ev..00 Page 5 of 7 Oct 19, 014

6 IN M T C F IN FIUE 1. LOW PASS FILTE + = IN AC Theory FIUE 19. A TYPICAL IDEO AMPLIFIE T M + (EQ.49) T The emphasis here is on capacitors because they are responsible for the vast majority of AC effects. The capacitor has an impedance and a phase shift both of which are a function of frequency. Although it is paramount in stability calculations, we will neglect the phase shift because you can obtain a reasonable understanding of circuit performance by just considering the impedance. eferring to Equation 50 it is apparent that when the frequency is very high, s = j is very high, so the capacitor impedance, C, is very low. The converse happens when the frequency is very low. The key to this section of AC theory is that high frequency means low capacitive impedance, and low frequency means high capacitive impedance. At F =, C =, and at F = 0, C =. At intermediate values of frequency the capacitive impedance must be calculated with the assistance of Equation 50. C FIUE 0. CAPACITO IMPEDANCE 1 1 C = = where S = jw and j = 1 SC jc (EQ.50) Op Amp Circuits Containing Capacitors eferring to Figure 1, when F = 0, C = so the gain, = /. When F =, C = 0 then = 0. The gain starts off high and decreases to zero at very high frequencies. ery often C F is an unwanted stray capacitor which yields an undesirable effect; namely, the circuit loses high frequency performance. C A high pass filter is shown in Figure. At F = 0 the gain is ( + )/, and at very high frequencies the gain tries to approach the op amp gain, a. Sometimes the stray input capacitance forms this circuit, and the result is unwanted peaking or overshoot because the capacitor phase shift tends to make the circuit unstable. FIUE. HIH PASS FILTE This general method is useful for analyzing the performance of op amp circuits which have capacitors. Depending on where they are connected the capacitors can stabilize or destabilize the op amp, but they always shape the transfer function in the frequency domain. Conclusion Some algebra, the basic laws of physics, and the basic circuit laws are adequate to gain an understanding of op amp circuits. By applying these tools to various circuit configurations it is possible to predict performance. Further indepth knowledge is required to do op amp design, and there are many sources where this knowledge can be obtained. Don t hesitate to try some of these tricks on your local circuit design engineer, but be aware that it may result in a long lecture about circuit design. eferences IN C [1] Intersil Corporation, Application Note [] Intersil Corporation, Application Note 940. [] an alkenberg, N.E., Network Analysis, PrenticeHall, AN9510 ev..00 Page 6 of 7 Oct 19, 014

7 Notice 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation or any other use of the circuits, software, and information in the design of your product or system. enesas Electronics disclaims any and all liability for any losses and damages incurred by you or third parties arising from the use of these circuits, software, or information.. enesas Electronics hereby expressly disclaims any warranties against and liability for infringement or any other claims involving patents, copyrights, or other intellectual property rights of third parties, by or arising from the use of enesas Electronics products or technical information described in this document, including but not limited to, the product data, drawings, charts, programs, algorithms, and application examples.. No license, express, implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of enesas Electronics or others. 4. You shall not alter, modify, copy, or reverse engineer any enesas Electronics product, whether in whole or in part. enesas Electronics disclaims any and all liability for any losses or damages incurred by you or third parties arising from such alteration, modification, copying or reverse engineering. 5. enesas Electronics products are classified according to the following two quality grades: Standard and High Quality. The intended applications for each enesas Electronics product depends on the product s quality grade, as indicated below. "Standard": Computers; office equipment; communications equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; industrial robots; etc. "High Quality": Transportation equipment (automobiles, trains, ships, etc.); traffic control (traffic lights); largescale communication equipment; key financial terminal systems; safety control equipment; etc. Unless expressly designated as a high reliability product or a product for harsh environments in a enesas Electronics data sheet or other enesas Electronics document, enesas Electronics products are not intended or authorized for use in products or systems that may pose a direct threat to human life or bodily injury (artificial life support devices or systems; surgical implantations; etc.), or may cause serious property damage (space system; undersea repeaters; nuclear power control systems; aircraft control systems; key plant systems; military equipment; etc.). enesas Electronics disclaims any and all liability for any damages or losses incurred by you or any third parties arising from the use of any enesas Electronics product that is inconsistent with any enesas Electronics data sheet, user s manual or other enesas Electronics document. 6. When using enesas Electronics products, refer to the latest product information (data sheets, user s manuals, application notes, eneral Notes for Handling and Using Semiconductor Devices in the reliability handbook, etc.), and ensure that usage conditions are within the ranges specified by enesas Electronics with respect to maximum ratings, operating power supply voltage range, heat dissipation characteristics, installation, etc. enesas Electronics disclaims any and all liability for any malfunctions, failure or accident arising out of the use of enesas Electronics products outside of such specified ranges. 7. Although enesas Electronics endeavors to improve the quality and reliability of enesas Electronics products, semiconductor products have specific characteristics, such as the occurrence of failure at a certain rate and malfunctions under certain use conditions. Unless designated as a high reliability product or a product for harsh environments in a enesas Electronics data sheet or other enesas Electronics document, enesas Electronics products are not subject to radiation resistance design. You are responsible for implementing safety measures to guard against the possibility of bodily injury, injury or damage caused by fire, and/or danger to the public in the event of a failure or malfunction of enesas Electronics products, such as safety design for hardware and software, including but not limited to redundancy, fire control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of microcomputer software alone is very difficult and impractical, you are responsible for evaluating the safety of the final products or systems manufactured by you. 8. Please contact a enesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each enesas Electronics product. You are responsible for carefully and sufficiently investigating applicable laws and regulations that regulate the inclusion or use of controlled substances, including without limitation, the EU ohs Directive, and using enesas Electronics products in compliance with all these applicable laws and regulations. enesas Electronics disclaims any and all liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations. 9. enesas Electronics products and technologies shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations. You shall comply with any applicable export control laws and regulations promulgated and administered by the governments of any countries asserting jurisdiction over the parties or transactions. 10. It is the responsibility of the buyer or distributor of enesas Electronics products, or any other party who distributes, disposes of, or otherwise sells or transfers the product to a third party, to notify such third party in advance of the contents and conditions set forth in this document. 11. This document shall not be reprinted, reproduced or duplicated in any form, in whole or in part, without prior written consent of enesas Electronics. 1. Please contact a enesas Electronics sales office if you have any questions regarding the information contained in this document or enesas Electronics products. (Note 1) enesas Electronics as used in this document means enesas Electronics Corporation and also includes its directly or indirectly controlled subsidiaries. (Note ) enesas Electronics product(s) means any product developed or manufactured by or for enesas Electronics. (ev.4.01 November 017) SALES OFFICES efer to " for the latest and detailed information. enesas Electronics America Inc Murphy anch oad, Milpitas, CA 9505, U.S.A. Tel: , Fax: enesas Electronics Canada Limited 951 Yonge Street, Suite 809 ichmond Hill, Ontario Canada L4C 9T Tel: enesas Electronics Europe Limited Dukes Meadow, Millboard oad, Bourne End, Buckinghamshire, SL8 5FH, U.K Tel: , Fax: enesas Electronics Europe mbh Arcadiastrasse 10, 4047 Düsseldorf, ermany Tel: , Fax: enesas Electronics (China) Co., Ltd. oom 1709 Quantum Plaza, No.7 ZhichunLu, Haidian District, Beijing, P.. China Tel: , Fax: enesas Electronics (Shanghai) Co., Ltd. Unit 01, Tower A, Central Towers, 555 Langao oad, Putuo District, Shanghai, 00 P.. China Tel: , Fax: enesas Electronics Hong Kong Limited Unit , 16/F., Tower, rand Century Place, 19 Prince Edward oad West, Mongkok, Kowloon, Hong Kong Tel: , Fax: enesas Electronics Taiwan Co., Ltd. 1F, No. 6, Fu Shing North oad, Taipei 1054, Taiwan Tel: , Fax: enesas Electronics Singapore Pte. Ltd. 80 Bendemeer oad, Unit #060 Hyflux Innovation Centre, Singapore 9949 Tel: , Fax: enesas Electronics Malaysia Sdn.Bhd. Unit 107, Block B, Menara Amcorp, Amcorp Trade Centre, No. 18, Jln Persiaran Barat, Petaling Jaya, Selangor Darul Ehsan, Malaysia Tel: , Fax: enesas Electronics India Pvt. Ltd. No.777C, 100 Feet oad, HAL nd Stage, Indiranagar, Bangalore , India Tel: , Fax: enesas Electronics Korea Co., Ltd. 17F, KAMCO Yangjae Tower, 6, angnamdaero, angnamgu, Seoul, 0665 Korea Tel: , Fax: enesas Electronics Corporation. All rights reserved. Colophon 7.0