AP Scalable Pads. Valid for Microcontrollers: TC1766, TC1767, TC1796, TC1797. Microcontrollers

Transcription

1 Application Note, V1.1, September 26 AP32111 Scalable Pads Electrical Specification of Scalable Output Drivers in 13nm CMOS Technology Valid for Microcontrollers: TC1766, TC1767, TC1796, TC1797 Microcontrollers Never stop thinking.

2 Edition 21-6 Published by Infineon Technologies AG München, Germany Infineon Technologies AG 26. All Rights Reserved. LEGAL DISCLAIMER THE INFORMATION GIVEN IN THIS APPLICATION NOTE IS GIVEN AS A HINT FOR THE IMPLEMENTATION OF THE INFINEON TECHNOLOGIES COMPONENT ONLY AND SHALL NOT BE REGARDED AS ANY DESCRIPTION OR WARRANTY OF A CERTAIN FUNCTIONALITY, CONDITION OR QUALITY OF THE INFINEON TECHNOLOGIES COMPONENT. THE RECIPIENT OF THIS APPLICATION NOTE MUST VERIFY ANY FUNCTION DESCRIBED HEREIN IN THE REAL APPLICATION. INFINEON TECHNOLOGIES HEREBY DISCLAIMS ANY AND ALL WARRANTIES AND LIABILITIES OF ANY KIND (INCLUDING WITHOUT LIMITATION WARRANTIES OF NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS OF ANY THIRD PARTY) WITH RESPECT TO ANY AND ALL INFORMATION GIVEN IN THIS APPLICATION NOTE. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ( Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Application Note AP V1.1, 21-6

3 Revision History: 21-6 V1.1 Previous Version: none - Page Subjects (major changes since last revision) all Added TC1767 & TC1797 to scope of appnote; valid for Audo-NG & Audo-Future We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com Application Note AP V1.1, 21-6

4 Table of Contents Page 1 Preface... 2 Introduction Pad driver scaling in detail Driver characteristics Edge Characteristics Physical basics Load charging Signal integrity Power integrity / Electromagnetic emission Measured Timings Load conditions and ambient temperatures Measurement conditions used in this document Measured rise and fall times Measured Rise/ Fall Time Waveforms Simulated Timings Simulated timings on selected PCB trace structures Description of structures Rise/fall time diagrams Rise/fall times of driver/load settings, sorted by layout structures Influence of layout structures on rise/fall times Rise/fall waveforms Measured Electromagnetic Emission Description of test equipment Conducted emission test configuration Radiated emission test configuration Instruments and software for emission data recognition Emission measurement results Simulated Electromagnetic Emission Recommended settings for signal categories General Decision Tables and Graphs Measured values for Class A2 drivers operated at 3.3V supply Simulated values for Class A2 drivers operated at 3.3V supply Simulated values for Class B2 drivers operated at 3.3V supply Simulated values for Class B2 drivers operated at 2.V supply Glossary Application Note AP V1.1, 21-6

5 1 Preface Output driver scaling, also referred to as slew rate control, is an effective technique to reduce the electromagnetic emission of an integrated circuit by reducing the driver strength and/or smoothing the rising and falling edges of one or more pad output drivers. Output driver scaling makes sense only when a certain margin regarding signal frequency and/or capacitive output load is available. Any driver scaling must maintain proper signal integrity. This application note presents a huge set of output driver characterization data which shall enable the system designers to select proper driver settings to reduce the electromagnetic emission caused by the driver switching while maintaining the desired signal integrity. Parameters under consideration are switching frequency, capacitive output load and ambient temperature. Chapter 2 introduces physical basics behind the scaling. Chapter 3 provides a set of measured rise/fall times under various conditions. Chapter 4 documents rise/fall time simulations performed on PCB models of different signal routing structures. Chapter shows a set of measured electromagnetic emission under various conditions. Chapter 6 shows a set of simulated electromagnetic emission under various conditions. Chapter 7 recommends useful settings for the drivers by introducing signal categories and giving lots of decision tables and graphs. The application note ends with a glossary. The information given in this application note is valid for Infineon Audo-NG and Audo-Future microcontrollers of the TriCore family, fabricated in 13nm CMOS technology. All measurement data are derived from a center lot device of the TC1796-BD step, using the same pad library as all other Audo-NG and Audo-Future microcontrollers. Please note that all numbers given in this application note are no specification values. They are guaranteed by design without being monitored during the IC fabrication process. The numbers are based on timing measurements performed on center lot devices. Thus all values are subject to ca. 1% offset depending on parameter variations like fabrication process and pad supply voltages different from nominal conditions. The final selection of driver settings in system applications should consider this offset. General note: Whenever Class B2 drivers are referenced, the same data is valid for Class B1 drivers. Reason is that the physical designs of Class B1 and Class B2 drivers are similar. Application Note AP32111 V1.1, 21-6

6 2 Introduction Output driver scaling, also referred to as slew rate control, is an effective technique to reduce the electromagnetic emission of an integrated circuit by smoothing the rising and falling edges of one or more pad output drivers. This scaling is introduced by setting corresponding control bits in registers. Fig. 1 shows an example of a pad driver control register, taken from the XC161 specification. While the location and function of the control bits may differ among the available Infineon microcontrollers, the electrical effects caused by these bits remain similar for a given technology. 2.1 Pad driver scaling in detail Driver characteristics Basically, we distinguish between driver control and edge control. Driver control bits set the general DC driving capability of the respective driver. Reducing the driver strength increases the output s internal resistance which attenuates noise that is imported/exported via the output line. For a given external load, charging and discharging time varies with the driver strength, thus the rise/fall times will change accordingly. For driving LEDs or power transistors, however, a stable high output current may still be required independent of low toggle rates which would normally allow to decide for weak drivers due to their low transitions and thus low noise emission. The controllable output drivers of the microcontroller pins feature three differently sized transistors (strong, medium, and weak) for each direction (push and pull). The time of activating/deactivating these transistors determines the output characteristics of the respective port driver. Figure 1: Pad output driver schematic The strength of the driver can be selected to adapt the driver characteristics to the application s requirements: In Strong Driver Mode, the medium and strong transistors are activated. In this mode the driver provides maximum output current even after the target signal level is reached. Strong drivers are only implemented in the Class A2/B2 drivers. Class A1 drivers offer only medium and weak drivers. In Medium Driver Mode, only the medium transistor is activated while the other transistors remain off. In Weak Driver Mode, only the weak transistor is activated while the other transistors remain off. This results in smooth transitions with low current peaks (and reduced susceptibility for noise) on the cost of increased transition times, i.e. slower edges, depending on the capacitive load, and low static current Edge Characteristics This defines the rise/fall time for the respective output, i.e. the output transition time. Soft edges reduce the peak currents that are drawn when changing the voltage Figure 2: Port output control bit settings Application Note AP V1.1, 21-6

7 level of an external capacitive load. For a bus interface, however, sharp edges may still be required. Edge characteristic effects the pre-driver which controls the final output driver stage. The Port Output Control registers Px_PDR provide the corresponding control bits. A 4-bit control field configures the driver strength and the edge shape. Word ports consume four control nibbles each, byte ports consume two control nibbles each, where each control nibble controls 4 pins of the respective port. Fig. 2 shows the allocation of control bit fields and port pins. Fig. 3 gives an example of a Px_PDR register. In this guideline, the scaling effects of Figure 3: Control register example for Port output drivers fabricated in 13nm CMOS technology is described. It serves as a reference addendum to the respective microcontroller product specifications where the individual bit settings can be found. 2.2 Physical basics Two main constraints have to be met when deciding for a certain clock driver setting: signal integrity and power integrity. Both issues will be discussed after a general introduction to capacitive load charging Load charging Generally, a switching transistor output stage delivers charge to its corresponding load capacitor during rising edge and draws charge from its load capacitor during falling edge. Timing diagrams normally show the signal s voltage over time characteristics. However, the resulting timing is a result of the electrical charge transfer described above. Charge is transferred by flowing current. A bigger pad driver means a smaller resistance in the loading path of the external load. Fig. 4 shows the load current and voltage of two examples of pad drivers connected to a load of C=4pF. The strong driver has on output resistance of 2Ω, the weak driver Ω. For times t<, the output voltage is V. At t=, the load capacitor C is connected to the target output voltage U=3.3V via the respective driver pullup transistor. As a reaction, the load current steps Voltage [V] 4 3, 3 2, 2 1, 1, Charging Voltage and Current at 4pF Load -2,E-9,E+ 2,E-9 4,E-9 6,E-9 8,E-9 1,E-8 Time [s] Voltage R=Ohm Current R=Ohm Voltage R=2Ohm Current R=2Ohm Figure 4: Current-/voltage charging curves for different driver strengths immediately to the value I=U/R. I is bigger for smaller values of R. This means that the strong driver generates a bigger current jump and charges the load capacitor in a shorter time. In time domain this leads to bigger reflections for not adapted driver impedances. Since typical trace impedances range from 6 to 12Ω, a strong driver with Z=1Ω is poorly adapted and may cause,14,12,1,8,6,4,2 Current [A] Application Note AP V1.1, 21-6

8 big voltage over- and undershoots. A weak driver with Z=1Ω may fit perfectly and generate a clean voltage switching signal without over- or undershoots. These effects are discussed in chapter In frequency domain, the current peak which is resulting from the charging of the load capacitor and from the over- or undershoots, causes significant RF energy and thus electromagnetic emission on the pad power supply. These effects are discussed in chapter Not only the pad driver impedance, but also the connected capacitive load determines the electromagnetic emission amplitudes. Fig. illustrates the differences in charging current and voltage between a capacitive load of 4pF and one of 2pF. In both cases, the driver impedance is set to Ω. As expected, the charging voltage increases faster for a smaller load. However, the starting value of the charging current is only determined by the driver impedance and is thus load-independent. The load affects only the speed of load current decrease. It decreases faster if the load is smaller. This means on the other hand a bigger di/dt for smaller loads, resulting in higer emission for smaller loads. This disadvantage can be compensated by chosing a smaller pad driver, i.e. a weaker driver setting, causing bigger driver impedance and thus smaller di/dt for the charging current. The selection of a weaker driver setting slows down the pad switching time, so care must be taken to maintain the required signal integrity Signal integrity Voltage [V] 4 3, 3 2, 2 1, 1, Charging Voltage and Current at Ohm Driver Impedance -2,E-9,E+ 2,E-9 4,E-9 6,E-9 8,E-9 1,E-8 Time [s] Voltage Cload=4pF Current Cload=4pF Voltage Cload=2pF Current Cload=2pF Figure : Current-/voltage charging curves for different capacitive loads,14,12,1,8,6,4,2 Current [A] Maintaining signal integrity means to select the rise/fall times such that all signal handshaking and data communication timing and levels are ensured for proper system operation. This means the data interchange between the microcontroller and external ICs like Flash memory, line drivers, receivers and transmitters etc. runs properly. Therefore, it has to be taken into account that CMOS transistors become slower with rising temperature. Thus the timing of a critical signal has to be matched for proper operation at highest ambient temperature. Depending on the application, common temperature ranges are up to 8 C or up to 12 C. Several automotive control units specify an ambient temperature range from Figure 6: Signal over- and undershoots Application Note AP V1.1, 21-6

9 -4 C up to 12 C. The die temperature may reach values up to 1 C during operation. Rules: Choose driver characteristics to meet the DC driving requirements. Make sure that the DC current provided by the microcontroller s pad drivers is sufficient to drive actuators into the desired logic state. Choose edge settings to meet system timing constraints at the highest system temperature. Avoid selection of driver settings which are too strong for the signal timing and load capacitance. Otherwise unnecessarily fast signal edges would result, causing two disadvantages regarding electromagnetic emission: (1) The slopes are too fast and cause undesired high emission energy at higher frequencies; (2) Over- and undershoot appears with the danger of power/ground bounce affecting the accuracy of analog modules. If system timing requires short signal rise/fall times, series termination is recommended to avoid over-/undershoot at signal transitions, see Fig.. The value of the termination resistor has to be chosen identical to the signal line impedance Power integrity / Electromagnetic emission Any switching between low and high voltage levels generates RF noise. This happens whenever the switching voltage or the switching current has no sinusoidal shape. Switching currents are mainly responsible for electromagnetic emission because of the voltage drop across line inductances such as bond wires and lead frames. Any shapes other than sinusoidal are composed by the overlay of multiple frequencies, also known as harmonics. To reach a significantly steep edge of a trapezoidal voltage of a clock signal, short current pulses during the edges are required. These switching currents are outlined as nearly triangular peaks which are composed from the base frequency and a set of odd and even harmonics, depending Figure 7: Spectrum envelope for different clocks and edges on the exact pulse shape. The steeper a switching pulse is, the higher frequencies are required to form the rising and falling edges. A rise time of 1ns leads to a spectrum composed from harmonics up to at least MHz. A typical clock signal consists of 1% rise time, 4% high level, 1% fall time and 4% low level. Operating at 1MHz equal to 1ns period time this clock signal already generates at least harmonics up to MHz. Unfortunately not the clock frequency, but the rise/fall times determine the resulting RF spectrum. Even if a clock driver operates at a relatively low toggle rate, it may generate the same RF spectrum as if it would operate at a significantly higher toggle rate as long as its rise/fall times are not adjusted to the lower toggle rate by slowing down the transitions. For example, if the mentioned 1MHz clock driver operates at only 1 MHz, its rise/fall times should be extended from 1 ns to 1 ns, still maintaining the 1% ratio relatively to the clock period time. Fig. 6 illustrates that behaviour. Rule: Choose driver and edge characteristics to result in lowest electromagnetic emission while meeting all system timing requirements at highest system temperature. Application Note AP V1.1, 21-6

10 3 Measured Timings 3.1 Load conditions and ambient temperatures The Audo-NG and Audo-Future microcontrollers use several classes of pad drivers: Class A drivers are operated at VDDP=3.3V (nominal) and Class B drivers are operated at VDDE (EBU) in the range between 2.V and 3.3V (nominal) Measurement conditions used in this document A temperature range from T A =-4 C to T A =12 C is covered for the timings. Timings were measured at temperatures -4 C, C, 3 C, 8 C, 11 C and 12 C. Please note that even if signal integrity looks fine at higher temperature, over- or undershoot resulting from improper impedance matching between pad drivers and external load may increase at lower temperature. If the user is interested in rise/fall time values at other temperatures, a linear interpolation can be done. Electromagnetic emission is always measured at T A =2 C. The supply voltage for Class A pad drivers is 3.3V for measurements at T A =3 C. The supply voltage for Class A pad drivers is 3.13V for measurements at T A >3 C to match worst-case conditions. The supply voltage for Class A pad drivers is 3.47V for measurements at T A <3 C. Class B pad driver timings have not been measured, but only simulated. Load capacitors are selected in a way that together with the measurement probe capacitance of 8pF total capacitance values of 18pF up to pf are reached. Table 1 shows the reference between real loads and numbers given in the result diagrams. For easy reading, these capacitances are referred to as 2, 3, 4 and pf in the result diagrams. Probe capacitance SMD load capacitor Resulting physical capacitance Referred capacitance 8 pf 1 pf 18 pf 2 pf 8 pf 22 pf 3 pf 3 pf 8 pf 33 pf 41 pf 4 pf 8 pf 47 pf pf pf Table 1: Overview of capacitive loads used for timing measurements The result diagrams show the simulated rising and falling edge timing using an oscilloscope probe of 8pF 1MΩ. The reference points are 1% and 9% as indicated in Fig. 8 for Class A2 pads (VDDP = 3.3V). For measurements at T A =3 C, the pad supply voltage VDDP has been set to 3.3V (nominal VDDP). Thus the voltage levels references for timing measurements at T A =3 C are:.33v (low reference) and 2.97V (high reference). For measurements at T A >3 C, the pad supply Figure 8: Voltage level references for Class A timing measurements Application Note AP V1.1, 21-6

11 voltage VDDP has been decreased to 3.13V (nominal VDDP minus %). Thus the voltage levels references for timing measurements at T A >3 C are:.31v (low reference) and 2.82V (high reference). For measurements at T A <3 C, the pad supply voltage VDDP has been increased to 3.47V (nominal VDDP plus %). Thus the voltage levels references for timing measurements at T A <3 C are:.3v (low reference) and 3.12V (high reference). The probing point for timing measurements is connected to the pin under test via a straight 3 cm long Ohm trace without via contacts Measured rise and fall times Fig show the measured 1-9% rise times and 9-1% fall times of all Class A2 driver strengths at T A =-4 C, C, 3 C, 8 C, 11 C and 12 C. The physically connected load capacitor values are according the Referred capacitances listed in Table 1. The abbreviations used for driver strength and load description are listed in Table 2. The respective load capacitor is connected close to the driver pin. It is connected from the pin to GND. GPIO measurements have been done at Port 2.2 of the TC1796 and are valid for all other Class A2 pins of the Audo-NG and Audo-Future microcontrollers fabricated in.13µm CMOS technology. Table 3 lists the measured rise and fall times for all Class A2 driver settings at various ambient temperatures for two different capacitive loads. Fig show the waveforms of these measured rise and fall times. Fig present the rise and fall times as a function of driver settings for ambient temperatures of 3 C and 12 C. Fig present the rise and fall times as a function of ambient temperature for every driver setting with various capacitive loads. Abbreviation Driver strength Resulting physical capacitance SSH-2pF Strong-sharp 18 pf SSH-3pF Strong-sharp 3 pf SSH-4pF Strong-sharp 41 pf SSH-pF Strong-sharp pf SME-2pF Strong-medium 18 pf SME-3pF Strong-medium 3 pf SME-4pF Strong-medium 41 pf SME-pF Strong-medium pf SSO-2pF Strong-soft 18 pf SSO-3pF Strong-soft 3 pf SSO-4pF Strong-soft 41 pf SSO-pF Strong-soft pf MED-2pF Medium 18 pf MED-3pF Medium 3 pf MED-4pF Medium 41 pf MED-pF Medium pf WEA-2pF Weak 18 pf WEA-3pF Weak 3 pf WEA-4pF Weak 41 pf WEA-pF Weak pf Table 2: Abbreviations used in the timing result diagrams Application Note AP V1.1, 21-6

12 2pF Load 4pF Load Strong-Sharp Strong-Sharp Temperature( C) Rise Time(ns) Fall Time(ns) Temperature( C) Rise Time(ns) Fall Time(ns) Strong-Medium Strong-Medium Temperature( C) Rise Time(ns) Fall Time(ns) Temperature( C) Rise Time(ns) Fall Time(ns) Strong-Soft Strong-Soft Temperature( C) Rise Time(ns) Fall Time(ns) Temperature( C) Rise Time(ns) Fall Time(ns) Medium Medium Temperature( C) Rise Time(ns) Fall Time(ns) Temperature( C) Rise Time(ns) Fall Time(ns) Weak Weak Temperature( C) Rise Time(ns) Fall Time(ns) Temperature( C) Rise Time(ns) Fall Time(ns) Table 3: Measured rise and fall times for 2pF and 4pF capacitive load Application Note AP V1.1, 21-6

13 3.1.3 Measured Rise/ Fall Time Waveforms Figure 9: Waveforms Class A2 Strong-Sharp at -4 C ambient temperature Figure 1: Waveforms Class A2 Strong-Medium at -4 C ambient temperature Figure 11: Waveforms Class A2 Strong-Soft at -4 C ambient temperature Figure 12: Waveforms Class A2 Medium at -4 C ambient temperature Figure 13: Waveforms Class A2 Weak at -4 C ambient temperature Application Note AP V1.1, 21-6

14 Figure 14: Waveforms Class A2 Strong-Sharp at C ambient temperature Figure 1: Waveforms Class A2 Strong-Medium at C ambient temperature Figure 16: Waveforms Class A2 Strong-Soft at C ambient temperature Figure 17: Waveforms Class A2 Medium at C ambient temperature Figure 18: Waveforms Class A2 Weak at C ambient temperature Application Note AP V1.1, 21-6

15 Figure 19: Waveforms Class A2 Strong-Sharp at 3 C ambient temperature Figure 2: Waveforms Class A2 Strong-Medium at 3 C ambient temperature Figure 21: Waveforms Class A2 Strong-Soft at 3 C ambient temperature Figure 22: Waveforms Class A2 Medium at 3 C ambient temperature Figure 23: Waveforms Class A2 Weak at 3 C ambient temperature Application Note AP V1.1, 21-6

16 Figure 24: Waveforms Class A2 Strong-Sharp at 8 C ambient temperature Figure 2: Waveforms Class A2 Strong-Medium at 8 C ambient temperature Figure 26: Waveforms Class A2 Strong-Soft at 8 C ambient temperature Figure 27: Waveforms Class A2 Medium at 8 C ambient temperature Figure 28: Waveforms Class A2 Weak at 8 C ambient temperature Application Note AP V1.1, 21-6

17 Figure 29: Waveforms Class A2 Strong-Sharp at 11 C ambient temperature Figure 3: Waveforms Class A2 Strong-Medium at 11 C ambient temperature Figure 31: Waveforms Class A2 Strong-Soft at 11 C ambient temperature Figure 32: Waveforms Class A2 Medium at 11 C ambient temperature Figure 33: Waveforms Class A2 Weak at 11 C ambient temperature Application Note AP V1.1, 21-6

18 Figure 34: Waveforms Class A2 Strong-Sharp at 12 C ambient temperature Figure 3: Waveforms Class A2 Strong-Medium at 12 C ambient temperature Figure 36: Waveforms Class A2 Strong-Soft at 12 C ambient temperature Figure 37: Waveforms Class A2 Medium at 12 C ambient temperature Figure 38: Waveforms Class A2 Weak at 12 C ambient temperature Application Note AP V1.1, 21-6

19 Class A2 1-9% Edges for all Driver Settings SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] Rise Time 3 C [ns] Fall Time 3 C [ns] Rise Time 12 C [ns] Fall Time 12 C [ns] SSH-pF SME-2pF SSH-2pF SSH-3pF SSH-4pF Trise, Tfall [ns] Figure 39: Timings Class A2 for all driver settings Application Note AP V1.1, 21-6

20 Class A2 1-9% Edges for "Strong" & "Medium" Drivers SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF Mode [Driver-Load] Rise Time 3 C [ns] Fall Time 3 C [ns] Rise Time 12 C [ns] Fall Time 12 C [ns] SSH-3pF SSH-2pF Trise, T fall [ns] Figure 4: Zoomed timings Class A2 for strong and medium driver settings Application Note AP V1.1, 21-6

21 3 2, 2 1, 1, Class A2 "Strong-Sharp" Rise/Fall Times over Temperature Ambient Temperature [ C] SSH-2pF Rise Time SSH-2pF Fall Time SSH-3pF Rise Time SSH-3pF Fall Time SSH-4pF Rise Time SSH-4pF Fall Time SSH-pF Rise Time SSH-pF Fall Time Trise, Tfall [ns] Figure 41: Class A2 strong-sharp driver rise/fall times over full ambient temperature range Application Note AP V1.1, 21-6

22 Class A2 "Strong-Medium" Rise/Fall Times over Temperature SME-2pF Rise Time SME-2pF Fall Time SME-3pF Rise Time SME-3pF Fall Time SME-4pF Rise Time SME-4pF Fall Time SME-pF Rise Time SME-pF Fall Time Ambient Temperature [ C] Trise, Tfall [ns] Figure 42: Class A2 strong-med driver rise/fall times over full ambient temperature range Application Note AP V1.1, 21-6

23 Class A2 "Strong Soft" Rise/Fall Times over Temperature Ambient Temperature [ C] SSO-2pF Rise Time SSO-2pF Fall Time SSO-3pF Rise Time SSO-3pF Fall Time SSO-4pF Rise Time SSO-4pF Fall Time SSO-pF Rise Time SSO-pF Fall Time Trise, Tfall [ns] Figure 43: Class A2 strong-soft driver rise/fall times over full ambient temperature range Application Note AP V1.1, 21-6

24 Class A2 "Medium" Rise/Fall Times over Temperature Ambient Temperature [ C] MED-2pF Rise Time MED-2pF Fall Time MED-3pF Rise Time MED-3pF Fall Time MED-4pF Rise Time MED-4pF Fall Time MED-pF Rise Time MED-pF Fall Time Trise, Tfall [ns] Figure 44: Class A2 Medium driver rise/fall times over full ambient temperature range Application Note AP V1.1, 21-6

25 Class A2 "Weak" Rise/Fall Times over Temperature Ambient Temperature [ C] WEA-2pF Rise Time WEA-2pF Fall Time WEA-3pF Rise Time WEA-3pF Fall Time WEA-4pF Rise Time WEA-4pF Fall Time WEA-pF Rise Time WEA-pF Fall Time Trise, Tfall [ns] Figure 4: Class A2 Weak driver rise/fall times over full ambient temperature range Application Note AP V1.1, 21-6

26 4 Simulated Timings 4.1 Simulated timings on selected PCB trace structures Description of structures A temperature range from T A =2 C to T A =1 C is covered for the timings. Please note that in addition to the measured timings, which use discrete load capacitors, it is interesting to compare timing waveforms for various PCB structures. This overview provides a good guess on the impact of serial termination, the use of via contacts, and the shape of trace structures connected to a pad driver. We use 4 different structures, shown in Fig. 46: (a) Point-to-Point, (b) Bus, (c) Star, (d) Tree. Each of the structures was drawn in 4 versions and simulated with Sigrity Speed2. The 4 versions are: (1) no vias, no series termination, (2) no vias, series termination at transmitter, (3) vias, no series termination, (4) vias, series termination. In case of no vias, all traces are routed on the top PCB layer where transmitter and receivers are soldered. In case of vias, the red traces in Fig. 46 are routed on the bottom PCB layer. In case of series termination, a 1Ω resistor R t is connected directly at the Figure 46: Set of PCB trace structures transmitter output in the data line. The layer stack of the printed circuit board model is shown in Fig. 47. It consists of 4 layers in standard FR4 material in the order signal-gnd-vcc-signal. 3µm trace width results in a 7Ω trace impedance. The capacitance per unit length is 1pF/cm. An input capacitance of pf per CMOS receiver input is assumed. The driver is represented by the IBIS model listed in Appendix A. The driver strength can be selected to be strongsharp, strong-medium, strong-soft, medium and weak. Figure 47: PCB layer stack Application Note AP V1.1, 21-6

27 The length of each trace piece marked l in Fig. 46 has been dimensioned such that the resulting total trace capacitance plus the receiver gate capacitances are 2pF, 3pF, 4pF and pf. Table 4 lists the resulting trace lengths. The via contacts connect signals on the top layer with signals on the bottom layer. Fig. -11 show the simulated rise and fall times as a function of PCB structures with different capacitive loads. In each diagram, the measured timings and the simulated timings with ideal capacitive load are given for reference. To keep a better overview, one diagram contains only the curves for one structure operating at one temperature. The parameters varied in one diagram are the load capacitance and the driver settings. The abbreviations are as defined in Table 2. Structure Load Length l Width w Point-to- 2 pf.1 cm 3 µm Point 3 pf 8. cm 3 µm 4pF 11.9 cm 3 µm pf 1.3 cm 3 µm Bus 2 pf 4.4 cm 3 µm 3 pf 7.9 cm 3 µm 4 pf 12. cm 3 µm pf 16.8 cm 3 µm Star 2 pf 4.2 cm 3 µm 3 pf 8.1 cm 3 µm 4 pf 12.2 cm 3 µm pf 16.9 cm 3 µm Tree 2 pf.9 cm 3 µm 3 pf 11.4 cm 3 µm 4 pf 17.2 cm 3 µm pf 21.3 cm 3 µm Table 4: Dimensions of PCB structures Rise/fall time diagrams All rise/fall times refer to the 1-9% rising edge and to the 9-1% falling edge of the transmitter output voltage. Details are identical to the measured timings and levels described in chapter Weak driver strength has not been simulated because of the very low rise and fall times. Main purpose is to show the influence of via contacts which are placed on the traces, and series termination resistors placed at the driver outputs. The 4 via/termination combinations are marked in the diagrams as follows: Vias No Term No = no via contacts, no termination resistor Vias Yes Term No = via contacts, but no termination resistor Vias No Term Yes = no via contacts, but termination resistor Vias Yes Term Yes = via contacts and termination resistor Application Note AP V1.1, 21-6

28 The result diagrams show the simulated rising and falling edge timing using an oscilloscope probe of 8pF 1MΩ. The reference points are 1% and 9% as indicated in Fig. 7 for Class A2 pads (VDDP = 3.3V) and in Fig. 8 for Class B2 pads (VDDE = 2.V). For simulations at T A =1 C, the pad supply voltage VDDP has been decreased to 3.13V (nominal VDDP minus %). Thus the voltage levels references for timing simulations at T A =1 C are:.31v (low reference) and 2.82V (high reference). For simulations at T A =1 C, the EBU supply voltage VDDE has been decreased to 2.38V (nominal VDDE minus %). Thus the voltage levels references for timing simulations at T A =1 C are:.24v (low reference) and 2.14V (high reference). Figure 48: Voltage level references for Class A timing measurements Figure 49: Voltage level references for Class B timing measurements Rise/fall times of driver/load settings, sorted by layout structures Fig show the rise/fall times 1/9% margins as described above for selected driver/load combinations as listed in Table 2, for the four layout structures under investigation. One diagram contains the results for the four vias/termination combinations explained above plus the measured values. The diagram title indicates the structure under investigation, the driver class (A2 or B2) and in case of class B2 the supply voltage (2.V or 3.3V). Note that Class B1 drivers are similar to the Class B2 drivers. Thus all timings given for Class B2 are also valid for Class B1. All diagrams for class A2 drivers assume 3.3V supply voltage. At high temperature (1 C ambient temperature), the supply voltages have been decreased by 1%. Numbers are given in the paragraph above. Application Note AP V1.1, 21-6

29 Class B2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 2 C 2.V Measurement Point to Point Vias No Term No Point to Point Vias Yes Term No Point to Point Vias No Term Yes Point to Point Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure : Class B2 rise times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

30 Class B2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 2 C 2.V Measurement Point to Point Vias No Term No Point to Point Vias Yes Term No Point to Point Vias No Term Yes Point to Point Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 1: Class B2 fall times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

31 Class B2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 1 C 2.V Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 2: Class B2 rise times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

32 Class B2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 1 C 2.V Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 3: Class B2 fall times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

33 Class B2 1-9% Rising Edges for PCB "Star" Structures at 2 C 2.V SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Trise [ns] Figure 4: Class B2 rise times for Star layout at 2 C Application Note AP V1.1, 21-6

34 Class B2 9-1% Falling Edges for PCB "Star" Structures at 2 C 2.V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure : Class B2 fall times for Star layout at 2 C Application Note AP V1.1, 21-6

35 Class B2 1-9% Rising Edges for PCB "Star" Structures at 1 C 2.V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 6: Class B2 rise times for Star layout at 1 C Application Note AP V1.1, 21-6

36 Class B2 9-1% Falling Edges for PCB "Star" Structures at 1 C 2.V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 7: Class B2 fall times for Star layout at 1 C Application Note AP V1.1, 21-6

37 Class B2 1-9% Rising Edges for PCB "Tree" Structures at 2 C 2.V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 8: Class B2 rise times for Tree layout at 2 C Application Note AP V1.1, 21-6

38 Class B2 9-1% Falling Edges for PCB "Tree" Structures at 2 C 2.V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 9: Class B2 fall times for Tree layout at 2 C Application Note AP V1.1, 21-6

39 Class B2 1-9% Rising Edges for PCB "Tree" Structures at 1 C 2.V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 6: Class B2 rise times for Tree layout at 1 C Application Note AP V1.1, 21-6

40 Class B2 9-1% Falling Edges for PCB "Tree" Structures at 1 C 2.V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 61: Class B2 fall times for Tree layout at 1 C Application Note AP V1.1, 21-6

41 Class B2 1-9% Rising Edges for PCB "Bus" Structures at 2 C 2.V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 62: Class B2 rise times for Bus layout at 2 C Application Note AP V1.1, 21-6

42 Class B2 9-1% Falling Edges for PCB "Bus" Structures at 2 C 2.V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 63: Class B2 fall times for Bus layout at 2 C Application Note AP V1.1, 21-6

43 Class B2 1-9% Rising Edges for PCB "Bus" Structures at 1 C 2.V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 64: Class B2 rise times for Bus layout at 1 C Application Note AP V1.1, 21-6

44 Class B2 9-1% Falling Edges for PCB "Bus" Structures at 1 C 2.V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 6: Class B2 fall times for Bus layout at 1 C Application Note AP V1.1, 21-6

45 Class B2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 2 C 3.3V Measurement Point to Point Vias No Term No Point to Point Vias Yes Term No Point to Point Vias No Term Yes Point to Point Vias Yes Term Yes SSH- 2pF SSH- 3pF SSH- 4pF SSH- pf SME- 2pF Mode [Driver-Load] SME- 3pF SME- 4pF SME- pf Trise [ns] Figure 66: Class B2 rise times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

46 Class B2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 2 C 3.3V Measurement Point to Point Vias No Term No Point to Point Vias Yes Term No Point to Point Vias No Term Yes Point to Point Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 67: Class B2 fall times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

47 Class B2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 1 C 3.3V SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes Trise [ns] Figure 68: Class B2 rise times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

48 Class B2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 1 C 3.3V Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 69: Class B2 fall times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

49 Class B2 1-9% Rising Edges for PCB "Star" Structures at 2 C 3.3V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 7: Class B2 rise times for Star layout at 2 C Application Note AP V1.1, 21-6

50 Class B2 9-1% Falling Edges for PCB "Star" Structures at 2 C 3.3V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 71: Class B2 fall times for Star layout at 2 C Application Note AP32111 V1.1, 21-6

51 Class B2 1-9% Rising Edges for PCB "Star" Structures at 1 C 3.3V Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term No Star Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 72: Class B2 rise times for Star layout at 1 C Application Note AP V1.1, 21-6

52 Class B2 9-1% Falling Edges for PCB "Star" Structures at 1 C 3.3V SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Trise [ns] Figure 73: Class B2 fall times for Star layout at 1 C Application Note AP V1.1, 21-6

53 Class B2 1-9% Rising Edges for PCB "Tree" Structures at 2 C 3.3V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 74: Class B2 rise times for Tree layout at 2 C Application Note AP V1.1, 21-6

54 Class B2 9-1% Falling Edges for PCB "Tree" Structures at 2 C 3.3V Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 7: Class B2 rise times for Tree layout at 2 C Application Note AP V1.1, 21-6

55 Class B2 1-9% Rising Edges for PCB "Tree" Structures at 1 C 3.3V SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes Trise [ns] Figure 76: Class B2 rise times for Tree layout at 1 C Application Note AP32111 V1.1, 21-6

56 Class B2 9-1% Falling Edges for PCB "Tree" Structures at 1 C 3.3V SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes Trise [ns] Figure 77: Class B2 fall times for Tree layout at 1 C Application Note AP V1.1, 21-6

57 Class B2 1-9% Rising Edges for PCB "Bus" Structures at 2 C 3.3V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 78: Class B2 rise times for Bus layout at 2 C Application Note AP V1.1, 21-6

58 Class B2 9-1% Falling Edges for PCB "Bus" Structures at 2 C 3.3V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Tfall [ns] Figure 79: Class B2 fall times for Tree layout at 2 C Application Note AP V1.1, 21-6

59 Class B2 1-9% Rising Edges for PCB "Bus" Structures at 1 C 3.3V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 8: Class B2 rise times for Bus layout at 1 C Application Note AP V1.1, 21-6

60 Class B2 9-1% Falling Edges for PCB "Bus" Structures at 1 C 3.3V Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-2pF SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF Mode [Driver-Load] Trise [ns] Figure 81: Class B2 rise times for Bus layout at 1 C Application Note AP V1.1, 21-6

61 Class A2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 2 C Measurement Point-to-Point Vias No Term No Point-to-Point Vias Yes Term No Point-to-Point Vias No Term Yes SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF Trise [ns] Figure 82: Class A2 rise times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

62 Class A2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 2 C Measurement Point to Point Vias No Term No Point to Point Vias Yes Term No Point to Point Vias No Term Yes Point to Point Vias Yes Term Yes SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF SSH-2pF SSH-3pF SSH-4pF Mode [Driver-Load] Tfall [ns] Figure 83: Class A2 fall times for Point-to-Point layout at 2 C Application Note AP V1.1, 21-6

63 Class A2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 1 C Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF Trise [ns] Figure 84: Class A2 rise times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

64 Class A2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 1 C Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF SSH-2pF Mode [Driver-Load] Tfall [ns] Figure 8: Class A2 fall times for Point-to-Point layout at 1 C Application Note AP V1.1, 21-6

65 SSH- 2pF Class A2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 2 C "Strong" Drivers Measurement Point-to-Point Vias No Term No Point-to-Point Vias Yes Term No Point-to-Point Vias No Term Yes Point-to-Point Vias Yes TermYes SSH- 3pF SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Trise [ns] Figure 86: Zoomed rise times Class A2- Point-to-Point layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

66 SSH- 2pF Class A2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 2 C "Strong" Drivers Measurement Point-to-Point Vias No Term No Point-to-Point Vias Yes Term No Point-to-Point Vias No Term Yes Point-to-Point Vias Yes Term Yes SSH- 3pF SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 87: Zoomed fall times Class A2- Point-to-Point layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

67 SSH- 2pF Class A2 1-9% Rising Edges for PCB "Point-to-Point" Structures at 1 C "Strong" Drivers Measurement Point-to-Point Vias No Term No Point-to-Point Vias Yes Term No Point-to-Point Vias No Term Yes Point-to-Point Vias Yes Term Yes SSH- 3pF SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Trise [ns] Figure 88: Zoomed rise times Class A2- P2P layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

68 Class A2 9-1% Falling Edges for PCB "Point-to-Point" Structures at 1 C "Strong" Drivers Measurement P2P Vias No Term No P2P Vias Yes Term No P2P Vias No Term Yes P2P Vias Yes Term Yes SSH- 2pF SSH- 3pF SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 89: Zoomed fall times Class A2- P2P layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

69 Class A2 1-9% Rising Edges for PCB "Star" Structures at 2 C Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF SSH-4pF Trise [ns] Figure 9: Class A2 rise times for Star layout at 2 C Application Note AP V1.1, 21-6

70 Class A2 9-1% Falling Edges for PCB "Star" Structures at 2 C Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF SSH-2pF SSH-3pF SSH-4pF SSH-pF Figure 91: Class A2 fall times for Star layout at 2 C Application Note AP V1.1, 21-6

71 Class A2 1-9% Rising Edges for PCB "Star" Structures at 1 C Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF Trise [ns] Figure 92: Class A2 rise times for Star layout at 1 C Application Note AP V1.1, 21-6

72 Class A2 9-1% Falling Edges for PCB "Star" Structures at 1 C Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF SSH-3pF Mode [Driver-Load] SSH-2pF Trise [ns] Figure 93: Class A2 fall times for Star layout at 1 C Application Note AP V1.1, 21-6

73 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Star" Structures at 2 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF Mode [Driver-Load] SME- pf SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Trise [ns] Figure 94: Zoomed rise times Class A2- Star layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

74 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB "Star" Structures at 2 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF Mode [Driver-Load] SME- pf SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Tfall [ns] Figure 9: Zoomed fall times Class A2- Star layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

75 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Star" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Trise [ns] Figure 96: Zoomed rise times Class A2- Star layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

76 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB "Star" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Star Vias No Term No Star Vias Yes Term No Star Vias No Term Yes Star Vias Yes Term Yes Tfall [ns] Figure 97: Zoomed fall times Class A2- Star layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

77 Class A2 1-9% Rising Edges for PCB "Tree" Structures at 2 C Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF Trise [ns] Figure 98: Class A2 rise times for Tree layout at 2 C Application Note AP V1.1, 21-6

78 Class A2 9-1% Falling Edges for PCB "Tree" Structures at 2 C Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF Tfall [ns] Figure 99: Class A2 fall times for Tree layout at 2 C Application Note AP V1.1, 21-6

79 Class A2 1-9% Rising Edges for PCB "Tree" Structures at 1 C SSH-3pF SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-2pF Trise [ns] Figure 1: Class A2 rise times for Tree layout at 1 C Application Note AP V1.1, 21-6

80 Class A2 9-1% Falling Edges for PCB "Tree" Structures at 1 C Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF Trise [ns] Figure 11: Class A2 fall times for Tree layout at 1 C Application Note AP V1.1, 21-6

81 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Tree" Structures at 2 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF Mode [Driver-Load] SME- pf SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes Trise [ns] Figure 12: Zoomed rise times Class A2-Tree layout for Strong Driver Settings at 2 C Application Note AP V1.1, 21-6

82 SSH- 2pF Class A2 9-1% Falling Edges for PCB "Tree" Structures at 2 C "Strong" Drivers Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes SSH- 3pF SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 13: Zoomed fall times Class A2- Tree layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

83 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Tree" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes Trise [ns] Figure 14: Zoomed rise times Class A2 Tree layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

84 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB "Tree" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Tree Vias No Term No Tree Vias Yes Term No Tree Vias No Term Yes Tree Vias Yes Term Yes Tfall [ns] Figure 1: Zoomed fall times Class A2 Tree layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

85 Class A2 1-9% Rising Edges for PCB "Bus" Structures at 2 C Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF SSH-2pF SSH-3pF Mode [Driver-Load] Trise [ns] Figure 16: Class A2 rise times for Bus layout at 2 C Application Note AP V1.1, 21-6

86 Class A2 9-1% Falling Edges for PCB "Bus" Structures at 2 C Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF SSH-4pF Tfall [ns] Figure 17: Class A2 fall times for Bus layout at 2 C Application Note AP V1.1, 21-6

87 Class A2 1-9% Rising Edges for PCB "Bus" Structures at 1 C Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF SSH-4pF Trise [ns] Figure 18: Class A2 rise times for Bus layout at 1 C Application Note AP V1.1, 21-6

88 Class A2 9-1% Falling Edges for PCB "Bus" Structures at 1 C Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes SSH-4pF SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF Trise [ns] Figure 19: Class A2 fall times for Bus layout at 1 C Application Note AP V1.1, 21-6

89 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Bus" Structures at 2 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF Mode [Driver-Load] SME- pf SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes Trise [ns] Figure 11: Zoomed rise times Class A2-Bus layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

90 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB "Bus" Structures at 2 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes Tfall [ns] Figure 111: Zoomed fall times Class A2-Bus layout for strong driver settings at 2 C Application Note AP V1.1, 21-6

91 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB "Bus" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes Trise [ns] Figure 112: Zoomed rise times Class A2-Bus layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

92 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB "Bus" Structures at 1 C "Strong" Drivers SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Measurement Bus Vias No Term No Bus Vias Yes Term No Bus Vias No Term Yes Bus Vias Yes Term Yes Tfall [ns] Figure 113: Zoomed fall times Class A2-Bus layout for strong driver settings at 1 C Application Note AP V1.1, 21-6

93 Influence of layout structures on rise/fall times Fig indicate that the different structures lead to quite similar timing results. Any considerations of layout structures are only suggested when assessing time-critical signals using strong driver modes, see figures and Application Note AP V1.1, 21-6

94 Class A2 1-9% Rising Edges for PCB Structures at 2 C Point to Point Vias Yes Term No Star Vias Yes Term No Tree Vias Yes Term No Bus Vias Yes Term No SSH-pF SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF SSH-4pF Trise [ns] Figure 114: Class A2 rise times for all PCB structures at 2 C Application Note AP V1.1, 21-6

95 Class A2 9-1% Falling Edges for PCB Structures at 2 C Point to Point Vias Yes Term No Star Vias Yes Term No Tree Vias Yes Term No Bus Vias Yes Term No SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-4pF SSH-pF SSH-2pF SSH-3pF Tfall [ns] Figure 11: Class A2 fall times for all PCB structures at 2 C Application Note AP V1.1, 21-6

96 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB Structures at 2 C "Strong" Drivers Point-to-Point Vias Yes Term No Star Vias Yes Term No Tree Vias Yes Term No Bus Vias Yes Term No SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Trise [ns] Figure 116: Zoomed rise times Class A2- all PCB structures for strong driver settings at 2 C Application Note AP V1.1, 21-6

97 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB Structures at 2 C "Strong" Drivers Point-to-Point Vias Yes Term No Star Vias Yes Term No Tree Vias Yes Term No Bus Vias Yes Term No SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 117: Zoomed fall times Class A2- all PCB structures for strong driver settings at 2 C Application Note AP V1.1, 21-6

98 Class A2 1-9% Rising Edges for PCB Structures at 2 C Point-to-Point Vias Yes Term Yes Star Vias Yes Term Yes Tree Vias Yes Term Yes Bus Vias Yes Term Yes SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-2pF SSH-3pF SSH-4pF SSH-pF Trise [ns] Figure 118: Class A2 rise times for all PCB structures at 2 C Application Note AP V1.1, 21-6

99 Class A2 9-1% Falling Edges for PCB Structures at 2 C Point-to-Point Vias Yes Term Yes Star Vias Yes Term Yes Tree Vias Yes Term Yes Bus Vias Yes Term Yes SME-2pF SME-3pF SME-4pF SME-pF SSO-2pF SSO-3pF SSO-4pF SSO-pF MED-2pF MED-3pF MED-4pF MED-pF WEA-2pF WEA-3pF WEA-4pF WEA-pF Mode [Driver-Load] SSH-4pF SSH-pF SSH-2pF SSH-3pF Tfall [ns] Figure 119: Class A2 fall times for all PCB structures at 2 C Application Note AP V1.1, 21-6

100 SSH- 2pF SSH- 3pF Class A2 1-9% Rising Edges for PCB Structures at 2 C "Strong" Drivers Point-to-Point Vias Yes Term Yes Star Vias Yes Term Yes Tree Vias Yes Term Yes Bus Vias Yes Term Yes SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 12: Zoomed rise times Class A2- all PCB structures for strong driver settings at 2 C Application Note AP V1.1, 21-6

101 SSH- 2pF SSH- 3pF Class A2 9-1% Falling Edges for PCB Structures at 2 C "Strong" Drivers Point-to-Point Vias Yes Term Yes Star Vias Yes Term Yes Tree Vias Yes Term Yes Bus Vias Yes Term Yes SSH- 4pF SSH- pf SME- 2pF SME- 3pF SME- 4pF SME- pf Mode [Driver-Load] SSO- 2pF SSO- 3pF SSO- 4pF SSO- pf Tfall [ns] Figure 121: Zoomed fall times Class A2- all PCB structures for strong driver settings at 2 C Application Note AP V1.1, 21-6

102 4.1.3 Rise/fall waveforms The following waveforms result from Speed2 timing simulations of the PCB structures described in chapter Since the waveforms of the different structures are very similar, only point-to-point and bus structures are presented here with loads of 2pF and 4pF. However, the influence of via contacts and termination resistors is visible from the waveforms. Each of Fig contains 4 waveforms for a given pad type (Class A or Class B), a given ambient temperature (2 C or 1 C) and a given driver strength. Depending on these settings, certain clock frequencies can be driven or not. The waveforms show one of the frequencies: 8MHz, 4MHz, 2MHz, 1MHz or 1MHz whatever is the highest frequency for a given setting which shows an acceptable signal integrity (i.e. high and low voltage levels are reached during switching). Note the different high voltage levels for Class A and Class B pads: Since Class B pads are implemented for the EBU interface drivers, the Class B simulations use 2.V high level, whereas the Class A simulations use 3.3V high level. The 4 configurations shown in one figure are distributed as follows: 2pF Capacitive Load No Termination Resistor 4pF Capacitive Load No Termination Resistor 2pF Capacitive Load 1Ω Termination Resistor 4pF Capacitive Load 1Ω Termination Resistor Figure 122: General grouping of waveform configurations Application Note AP V1.1, 21-6

103 Class B2 2 C P2P w/ Vias w/o Term 2pF Strong-Sharp 2.V Class B2 2 C P2P w/ Vias w/o Term 4pF Strong-Sharp 2.V,V 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 2 C P2P w/ Vias w/ Term 2pF Strong-Sharp 2.V 3,V 2,V 1,V,V,V -,V Class B2 2 C P2P w/ Vias w/ Term 4pF Strong-Sharp 2.V 3,V 2,V 1,V,V,V -,V -1,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 123: Waveforms Class B2 8 MHz Strong-Sharp / Point-to-Point at 2 C ambient temperature Class B2 2 C Bus w/ Vias w/o Term 2pF Strong-Sharp 2.V Class B2 2 C Bus w/ Vias w/o Term 4pF Strong-Sharp 2.V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 2 C Bus w/ Vias w/ Term 2pF Strong-Sharp 2.V 3,V 2,V 1,V,V,V -,V Class B2 2 C Bus w/ Vias w/ Term 4pF Strong-Sharp 2.V 3,V 2,V 1,V,V,V -,V -1,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 124: Waveforms Class B2 8 MHz Strong-Sharp / Bus at 2 C ambient temperature Application Note AP V1.1, 21-6

104 Class B2 1 C P2P w/ Vias w/o Term 2pF Strong-Sharp VDDEmin Class B2 1 C P2P w/ Vias w/o Term 4pF Strong-Sharp VDDEmin 3,V 4,V 3,V 2,V 2,V 1,V 1,V,V,V,V -,V -1,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 1 C P2P w/ Vias w/ Term 2pF Strong-Sharp VDDEmin Class B2 1 C P2P w/ Vias w/ Term 4pF Strong-Sharp VDDEmin 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 12:Waveforms Class B2 8 MHz Strong-Sharp / Point-to-Point at 1 C ambient temperature Class B2 1 C Bus w/ Vias w/o Term 2pF Strong-Sharp VDDEmin Class B2 1 C Bus w/ Vias w/o Term 4pF Strong-Sharp VDDEmin 3,V 4,V 3,V 2,V 2,V 1,V 1,V,V,V,V -,V -1,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 1 C Bus w/ Vias w/ Term 2pF Strong-Sharp VDDEmin Class B2 1 C Bus w/ Vias w/ Term 4pF Strong-Sharp VDDEmin 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 126: Waveforms Class B2 8 MHz Strong-Sharp / Bus at 1 C ambient temperature Application Note AP V1.1, 21-6

105 Class B2 2 C P2P w/ Vias w/o Term 2pF Strong-Medium 2.V Class B2 2 C P2P w/ Vias w/o Term 4pF Strong-Medium 2.V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 2 C P2P w/ Vias w/ Term 2pF Strong-Medium 2.V Class B2 2 C Bus w/ Vias w/ Term 4pF Strong-Medium VDDEmax 3,V 2,V 1,V,V,V 3,V 2,V 1,V,V,V -,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 127: Waveforms Class B2 4 MHz Strong-Med / Point-to-Point at 2 C ambient temperature Class B2 2 C Bus w/ Vias w/o Term 2pF Strong-Medium 2.V Class B2 2 C Bus w/ Vias w/o Term 4pF Strong-Medium 2.V 3,V,V 2,V 1,V,V,V -,V 4,V 3,V 2,V 1,V,V -1,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 2 C Bus w/ Vias w/ Term 2pF Strong-Medium 2.V Class B2 2 C Bus w/ Vias w/ Term 4pF Strong-Medium 2.V 3,V 2,V 1,V,V,V -,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 128: Waveforms Class B2 4 MHz Strong-Med / Bus at 2 C ambient temperature Application Note AP V1.1, 21-6

106 Class B2 1 C P2P w/ Vias w/o Term 2pF Strong-Medium VDDEmin Class B2 1 C P2P w/ Vias w/o Term 4pF Strong-Medium VDDEmin 3,V 2,V 1,V,V,V 2,V 1,V,V,V -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Class B2 1 C P2P w/ Vias w/ Term 2pF Strong-Medium VDDEmin Class B2 1 C P2P w/ Vias w/o Term 4pF Strong-Medium VDDEmin 3,V 3,V 2,V 1,V,V,V -,V 2,V 1,V,V,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Figure 129: Waveforms Class B2 4 MHz Strong-Med / Point-to-Point at 1 C ambient temperature Class B2 1 C Bus w/ Vias w/o Term 2pF Strong-Medium VDDEmin Class B2 1 C Bus w/ Vias w/o Term 4pF Strong-Medium VDDEmin 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 1 C Bus w/ Vias w/ Term 2pF Strong-Medium VDDEmin Class B2 1 C Bus w/ Vias w/ Term 4pF Strong-Medium VDDEmin 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 13: Waveforms Class B2 4 MHz Strong-Med / Bus at 1 C ambient temperature Application Note AP V1.1, 21-6

107 Class B2 3.3V:- Class B2 2 C P2P w/ Vias w/o Term 2pF Strong-Sharp VDDEmax Class B2 2 C P2P w/ Vias w/o Term 4pF Strong-Sharp VDDEmax,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 6,V,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V -4,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 2 C P2P w/ Vias w/ Term 2pF Strong-Sharp VDDEmax Class B2 2 C P2P w/ Vias w/ Term 4pF Strong-Sharp VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 131: Waveforms Class B2 8 MHz Strong-Sharp / P2P at 2 C ambient temperature Class B2 2 C Bus w/ Vias w/o Term 2pF Strong-Sharp VDDEmax Class B2 2 C Bus w/ Vias w/o Term 4pF Strong-Sharp VDDEmax,V 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 6,V,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 2 C Bus w/ Vias w/ Term 2pF Strong-Sharp VDDEmax Class B2 2 C Bus w/ Vias w/ Term 4pF Strong-Sharp VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 132: Waveforms Class B2 8 MHz Strong-Sharp / Bus at 2 C ambient temperature Application Note AP V1.1, 21-6

108 Class B2 1 C P2P w/ Vias w/o Term 2pF Strong-Sharp VDDEmin Class B2 1 C P2P w/ Vias w/o Term 4pF Strong-Sharp VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 1 C P2P w/ Vias w/ Term 2pF Strong-Sharp VDDEmin Class B2 1 C P2P w/ Vias w/ Term 4pF Strong-Sharp VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 133: Waveforms Class B2 8 MHz Strong-Sharp / P2P at 1 C ambient temperature Class B2 1 C Bus w/ Vias w/o Term 2pF Strong-Sharp VDDEmin Class B2 1 C Bus w/ Vias w/o Term 4pF Strong-Sharp VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Class B2 1 C Bus w/ Vias w/ Term 2pF Strong-Sharp VDDEmin Class B2 1 C Bus w/ Vias w/ Term 4pF Strong-Sharp VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 3,E-9s Figure 134: Waveforms Class B2 8 MHz Strong-Sharp / Bus at 1 C ambient temperature Application Note AP V1.1, 21-6

109 Class B2 2 C P2P w/ Vias w/o Term 2pF Strong-Medium VDDEmax Class B2 2 C P2P w/ Vias w/o Term 4pF Strong-Medium VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s,V 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 2 C P2P w/ Vias w/ Term 2pF Strong-Medium VDDEmax Class B2 2 C P2P w/ Vias w/ Term 4pF Strong-Medium VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 13: Waveforms Class B2 4 MHz Strong-Medium / P2P at 2 C ambient temperature Class B2 2 C Bus w/ Vias w/o Term 2pF Strong-Medium VDDEmax Class B2 2 C Bus w/ Vias w/o Term 4pF Strong-Medium VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 7,V 6,V,V 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 2 C Bus w/ Vias w/ Term 2pF Strong-Medium VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 2 C Bus w/ Vias w/ Term 4pF Strong-Medium VDDEmax 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 136: Waveforms Class B2 4 MHz Strong-Medium / Bus at 2 C ambient temperature Application Note AP V1.1, 21-6

110 Class B2 1 C P2P w/ Vias w/o Term 2pF Strong-Medium VDDEmin Class B2 1 C P2P w/ Vias w/o Term 4pF Strong-Medium VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 1 C P2P w/ Vias w/ Term 2pF Strong-Medium VDDEmin Class B2 1 C P2P w/ Vias w/ Term 4pF Strong-Medium VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 137: Waveforms Class B2 4 MHz Strong-Medium / P2P at 1 C ambient temperature Class B2 1 C Bus w/ Vias w/o Term 2pF Strong-Medium VDDEmin Class B2 1 C Bus w/ Vias w/o Term 4pF Strong-Medium VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class B2 1 C Bus w/ Vias w/ Term 2pF Strong-Medium VDDEmin Class B2 1 C Bus w/ Vias w/ Term 4pF Strong-Medium VDDEmin 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 138: Waveforms Class B2 4 MHz Strong-Medium / Bus at 1 C ambient temperature Application Note AP V1.1, 21-6

111 Class A2 2 C P2P w/ Vias w/o Term 2pF Strong-Sharp Class A2 2 C P2P w/ Vias w/o Term 4pF Strong-Sharp 6,V,V 4,V 3,V 2,V 1,V,V -1,V -2,V -3,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,V 6,V 4,V 2,V,V -2,V -4,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class A2 2 C P2P w/ Vias w/ Term 2pF Strong-Sharp Class A2 2 C P2P w/ Vias w/ Term 4pF Strong-Sharp 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 139: Waveforms Class A2 4 MHz Strong-Sharp / Point-to-Point at 2 C ambient temper. Class A2 2 C Bus w/ Vias w/o Term 2pF Strong-Sharp Class A2 2 C Bus w/ Vias w/o Term 4pF Strong-Sharp 6,V 7,V,V,V 4,V 3,V 3,V 2,V 1,V 1,V -1,V,V -1,V -3,V -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Class A2 2 C Bus w/ Vias w/ Term 2pF Strong-Sharp Class A2 2 C Bus w/ Vias w/ Term 4pF Strong-Sharp 4,V,V 4,V 3,V 2,V 1,V,V,V 4,V 3,V 2,V 1,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Figure 14: Waveforms Class A2 4 MHz Strong-Sharp / Bus at 2 C ambient temperature Application Note AP V1.1, 21-6

112 Class A2 1 C P2P w/ Vias w/o Term 2pF Strong-Sharp Class A2 1 C P2P w/ Vias w/o Term 4pF Strong-Sharp,V,V 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V -1,V -1,V -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class A2 1 C P2P w/ Vias w/ Term 2pF Strong-Sharp Class A2 1 C P2P w/ Vias w/ Term 4pF Strong-Sharp 4,V 3,V 2,V 1,V,V,V -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Figure 141: Waveforms Class A2 4 MHz Strong-Sharp / Point-to-Point at 1 C ambient temper. Class A2 1 C Bus w/ Vias w/o Term 2pF Strong-Sharp Class A2 1 C Bus w/ Vias w/o Term 4pF Strong-Sharp,V,V 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V -1,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Class A2 1 C Bus w/ Vias w/ Term 2pF Strong-Sharp Class A2 1 C Bus w/ Vias w/ Term 4pF Strong-Sharp 4,V 3,V 2,V 1,V,V,V -,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s 8,E-9s Figure 142: Waveforms Class A2 4 MHz Strong-Sharp / Bus at 1 C ambient temper. Application Note AP V1.1, 21-6

113 Class A2 2 C P2P w/ Vias w/o Term 2pF Strong-Medium Class A2 2 C P2P w/ Vias w/o Term 4pF Strong-Medium,V 6,V 4,V,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V -1,V -1,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s -2,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s Class A2 2 C P2P w/ Vias w/ Term 2pF Strong-Medium Class A2 2 C P2P w/ Vias w/ Term 4pF Strong-Medium 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s Figure 143: Waveforms Class A2 2 MHz Strong-Medium / Point-to-Point at 2 C ambient temper. Class A2 2 C Bus w/ Vias w/o Term 2pF Strong-Medium Class A2 2 C Bus w/ Vias w/o Term 4pF Strong-Medium 4,V 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s Class A2 2 C Bus w/ Vias w/ Term 2pF Strong-Medium 4,V 3,V 2,V 6,V,V 4,V 3,V 2,V 1,V,V -1,V -2,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s Class A2 2 C Bus w/ Vias w/ Term 4pF Strong-Medium 4,V 3,V 2,V 1,V 1,V,V,V,V,V -,V -,V -1,V,E+ 2,E-8 4,E-8 6,E-8 8,E-8 1,E-7 1,2E-7 1,4E-7 1,6E-7,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s Figure 144: Waveforms Class A2 2 MHz Strong-Medium / Bus at 2 C ambient temper. Application Note AP V1.1, 21-6

114 Class A2 1 C P2P w/ Vias w/o Term 2pF Strong-Medium Class A2 1 C P2P w/ Vias w/o Term 4pF Strong-Medium 4,V 3,V 2,V 1,V,V,V -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s Class A2 1 C P2P w/ Vias w/ Term 2pF Strong-Medium Class A2 1 C P2P w/ Vias w/ Term 4pF Strong-Medium 4,V 3,V 2,V 1,V,V,V -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s Figure 14: Waveforms Class A2 2 MHz Strong-Medium / Point-to-Point at 1 C ambient temper. Class A2 1 C Bus w/ Vias w/o Term 2pF Strong-Medium Class A2 1 C Bus w/ Vias w/o Term 4pF Strong-Medium 4,V 3,V 2,V,V 4,V 3,V 2,V 1,V,V,V -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s 1,V,V -1,V -2,V,E+s 1,E-9s 2,E-9s 3,E-9s 4,E-9s,E-9s 6,E-9s 7,E-9s Class A2 1 C Bus w/ Vias w/ Term 2pF Strong-Medium Class A2 1 C Bus w/ Vias w/ Term 4pF Strong-Medium 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s -,V,E+s 2,E-9s 4,E-9s 6,E-9s 8,E-9s 1,E-9s 12,E-9s 14,E-9s 16,E-9s Figure 146: Waveforms Class A2 2 MHz Strong-Medium / Bus at 1 C ambient temper. Application Note AP V1.1, 21-6

115 Class A2 2 C P2P w/ Vias w/o Term 2pF Strong-Soft Class A2 2 C P2P w/ Vias w/o Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V 4,V 3,V 2,V 1,V,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 2 C P2P w/ Vias w/ Term 2pF Strong-Soft Class A2 2 C P2P w/ Vias w/ Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V -1,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 147: Waveforms Class A2 1 MHz Strong-Soft / Point-to-Point at 2 C ambient temper. Class A2 2 C Bus w/ Vias w/o Term 2pF Strong-Soft Class A2 2 C Bus w/ Vias w/o Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 2 C Bus w/ Vias w/ Term 2pF Strong-Soft Class A2 2 C Bus w/ Vias w/ Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 148: Waveforms Class A2 1 MHz Strong-Soft / Bus at 2 C ambient temper. Application Note AP V1.1, 21-6

116 Class A2 1 C P2P w/ Vias w/o Term 2pF Strong-Soft Class A2 1 C P2P w/ Vias w/o Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 1 C P2P w/ Vias w/ Term 2pF Strong-Soft Class A2 1 C P2P w/ Vias w/ Term 4pF Strong-Soft 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 149: Waveforms Class A2 1 MHz Strong-Soft / Point-to-Point at 1 C ambient temper. Class A2 1 C Bus w/ Vias w/o Term 2pF Strong-Soft Class A2 1 C Bus w/ Vias w/o Term 4pF Strong-Soft 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 1 C Bus w/ Vias w/ Term 2pF Strong-Soft Class A2 1 C Bus w/ Vias w/ Term 4pF Strong-Soft 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 1: Waveforms Class A2 1 MHz Strong-Soft / Bus at 1 C ambient temper. Application Note AP V1.1, 21-6

117 Class A2 2 C P2P w/ Vias w/o Term 2pF Medium Class A2 2 C P2P w/ Vias w/o Term 4pF Medium 3,V 2,V 1,V,V,V 3,V 2,V 1,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 2 C P2P w/ Vias w/ Term 2pF Medium Class A2 2 C P2P w/ Vias w/ Term 4pF Medium 3,V 2,V 1,V,V,V 3,V 2,V 1,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 11: Waveforms Class A2 1 MHz Medium / Point-to-Point at 2 C ambient temper. Class A2 2 C Bus w/ Vias w/o Term 2pF Medium Class A2 2 C Bus w/ Vias w/o Term 4pF Medium 4,V 3,V 2,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s 1,V,V,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 2 C Bus w/ Vias w/ Term 2pF Medium Class A2 2 C Bus w/ Vias w/ Term 4pF Medium 4,V 3,V 3,V 2,V 2,V 1,V,V 1,V,V,V -,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 12: Waveforms Class A2 1 MHz Medium / Bus at 2 C ambient temper. Application Note AP V1.1, 21-6

118 Class A2 1 C P2P w/ Vias w/o Term 2pF Medium Class A2 1 C P2P w/ Vias w/o Term 4pF Medium 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 1 C P2P w/ Vias w/ Term 2pF Medium Class A2 1 C P2P w/ Vias w/ Term 4pF Medium 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 13: Waveforms Class A2 1 MHz Medium / Point-to-Point at 1 C ambient temper. Class A2 1 C Bus w/ Vias w/o Term 2pF Medium Class A2 1 C Bus w/ Vias w/o Term 4pF Medium 4,V 3,V 2,V 1,V,V 3,V 2,V 1,V,V,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Class A2 1 C Bus w/ Vias w/ Term 2pF Medium Class A2 1 C Bus w/ Vias w/ Term 4pF Medium 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s,V,E+s,E-9s 1,E-9s 1,E-9s 2,E-9s 2,E-9s 3,E-9s Figure 14: Waveforms Class A2 1 MHz Medium / Bus at 1 C ambient temper. Application Note AP V1.1, 21-6

119 Class A2 2 C P2P w/ Vias w/o Term 2pF Weak Class A2 2 C P2P w/ Vias w/o Term 4pF Weak 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+,E-7 1,E-6 1,E-6 2,E-6 2,E-6 3,E-6 -,V -2,E-9s 3,E-9s 8,E-9s 1,3E-6s 1,8E-6s 2,3E-6s 2,8E-6s Class A2 2 C P2P w/ Vias w/ Term 2pF Weak Class A2 2 C P2P w/ Vias w/ Term 4pF Weak 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s Figure 1: Waveforms Class A2 1 MHz Weak / Point-to-Point at 2 C ambient temper. Class A2 2 C Bus w/ Vias w/o Term 2pF Weak Class A2 2 C Bus w/ Vias w/o Term 4pF Weak 4,V 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s 3,V 2,V 1,V,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s Class A2 2 C Bus w/ Vias w/ Term 2pF Weak Class A2 2 C Bus w/ Vias w/ Term 4pF Weak 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s Figure 16: Waveforms Class A2 1 MHz Weak / Bus at 2 C ambient temper. Application Note AP V1.1, 21-6

120 Class A2 1 C P2P w/ Vias w/o Term 2pF Weak Class A2 1 C P2P w/ Vias w/o Term 4pF Weak 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s Class A2 1 C P2P w/ Vias w/ Term 2pF Weak Class A2 1 C P2P w/ Vias w/ Term 4pF Weak 4,V 4,V 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s Figure 17: Waveforms Class A2 1 MHz Weak / Point-to-Point at 1 C ambient temper. Class A2 1 C Bus w/ Vias w/o Term 2pF Weak Class A2 1 C Bus w/ Vias w/o Term 4pF Weak 3,V 3,V 2,V 2,V 1,V 1,V,V,V,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s Class A2 1 C Bus w/ Vias w/ Term 2pF Weak Class A2 1 C Bus w/ Vias w/ Term 4pF Weak 3,V 2,V 1,V,V,V 3,V 2,V 1,V,V -,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s,V,E+s,E-9s 1,E-6s 1,E-6s 2,E-6s 2,E-6s 3,E-6s Figure 18: Waveforms Class A2 1 MHz Weak / Bus at 1 C ambient temper. Application Note AP V1.1, 21-6

121 Measured Electromagnetic Emission In addition to signal integrity, the scaling of pad drivers helps to reduce electromagnetic emission (EME) caused by switching output pins. This is because slower signal edges produce less high frequency contents in the emission spectra. The following rule should be obeyed when selecting pad driver strength: Use the weakest/slowest driver setting which provides the required signal timing at worst-case operating conditions. Worst-case operating conditions are: - maximum ambient temperature (e.g. +12 C) - minimum pad supply voltage (e.g. 3.13V) - realistic capacitive output load (consider trace length, trace structure, connected receiver input loads) To illustrate the benefits of driver scaling for low EME, some sample measurement results are provided. The measurements have been performed under two operating conditions: Operating condition: Port 2 toggling at low data rate with capacitive loads of pf, 1pF, 22pF, 33pF, 47pF. Core running in idle loop. Conducted emission measured at pad supply (VDDP) and core supply (VDDC) according to chapter.1.1. Radiated emission measured in mini-tem cell according to chapter.1.2. Please note that all emission peaks visible between 9 MHz and 1 MHz result from cellular phone activity and should be ignored when assessing the IC-related emission..1 Description of test equipment.1.1 Conducted emission test configuration Conducted emission is measured using the standardized 1Ω network, see Fig. 91. This network is used for both port and power supply emission measurements. For reference purpose, only the emission measured at the supply domains VDDP (3.3V pad supply) and VDDC (1.V core supply) are documented. Emission reduction can be observed in a similar way on passive (i.e. non-switching) pad pins. 1Ω networks are provided for conducted emission measurements according IEC part 4 and BISS emission test specification. For the measurements the probing points shown in Fig. 19 connected to VDD1 (is VDDC) and VDD2 (is VDDP) are used. No testing was performed at passive I/Os. Figure 19: Conducted emission probing points Application Note AP V1.1, 21-6

122 .1.2 Radiated emission test configuration Radiated emission is measured using the standard Mini TEM Cell according IEC part 2 and BISS emission test specification. The frequency range is from 1kHz to 1MHz. Figure 16: Radiated emission test setup.1.3 Instruments and software for emission data recognition Spectrum analyzer: Rohde&Schwarz FSP7 (9kHz... 7GHz) Start frequency: 1kHz Stop frequency: 11MHz Frequency step: 1.MHz Span: 1.3MHz Attenuation: none Detector type: Max. peak RBW: 1kHz VBW: 3kHz Measurement time: For all measurements, the emission measurement time (1ms) at one frequency is longer than the test software loop duration. Pre-Amplifier: none Data generation software: National Instruments LabView: Measure Spectrum_VDE1Ohm_1.vi Infineon proprietary software for ASCII to Excel data conversion: DAT2XLS.exe, using vector addition of and 9 oriented test board in case of radiated emission test. Environment: temperature 23 C ± C Supply: nominal voltage ±% For all measurements the noise floor is at least 6dB below the limit. Application Note AP V1.1, 21-6

123 .2 Emission measurement results IO-Toggle A1 medium driver / A2 strong driver sharp edge dbµv Frequency/MHz Figure 161: Class A1 Medium driver, Class A2 Strong-Sharp driver- conducted emission on VDDP IO-Toggle A1 medium driver / A2 strong driver soft edge dbµv Frequency/MHz Figure 162: Class A1 Medium driver, Class A2 Strong-Soft driver- conducted emission on VDDP Application Note AP V1.1, 21-6

124 IO-Toggle A1 medium driver / A2 medium driver dbµv Frequency/MHz Figure 163: Class A1 Medium driver, Class A2 Medium driver- conducted emission on VDDP IO-Toggle A1 weak driver / A2 weak driver dbµv Frequency/MHz Figure 164: Class A1 Medium driver, Class A2 Weak driver- conducted emission on VDDP Application Note AP V1.1, 21-6

125 Pad Scaling Comparison Conducted Emission dbµv 4 3 A1 medium driver/ A2 strong-sharp driver A1 medium driver/ A2 strong-soft driver A1 medium driver/ A2 medium driver A1 medium driver/ A2 weak driver 2 1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MH z Frequency Figure 16: Pad scalingcomparison-conducted emission RE TEM Cell Measurement "Best Case" dbµv Frequency/MHz Figure 166: Class A2 Best Case at pf load radiated emission Application Note AP V1.1, 21-6

126 RE TEM Cell Measurement Strong-Sharp "Worst Case" dbµv Frequency/MHz Figure 167: Class A2 Strong-Sharp driver at pf load radiated emission RE TEM Cell Measurement Strong-Medium "Worst Case" dbµv Frequency/MHz Figure 168: Class A2 Strong-Medium driver at pf load radiated emission Application Note AP V1.1, 21-6

127 RE TEM Cell Measurement Strong-Soft "Worst Case" dbµv Frequency/MHz Figure 169: Class A2 Strong-Soft driver at pf load radiated emission RE TEM Cell Measurement Medium "Worst Case" dbµv Frequency/MHz Figure 17: Class A2 Medium driver at pf load radiated emission Application Note AP V1.1, 21-6

128 RE TEM Cell Measurement Weak "Worst Case" dbµv Frequency/MHz Figure 171: Class A2 Weak driver at pf load radiated emission RE TEM Cell Measurement Application "Worst Case" dbµv Frequency/MHz Figure 172: Class A2 Application at pf load radiated emission Application Note AP V1.1, 21-6

129 "Worst Case" Radiated Emission dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH SME SSO MED WEA Figure 173a: Class A2; various driver settings at no load radiated emission Radiated Emission "Worst Case" All Driver Settings dbµv SSH-WC SME-WC SSO-WC MED-WC WEA-WC 1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 173b: Class A2; various driver settings at no load radiated emission (zoomed) Application Note AP V1.1, 21-6

130 6 Simulated Electromagnetic Emission Since the various trace layout structures were not available for measurements, the emission diagrams in Fig have been calculated by Fast Fourier Transformation algorithms (FFT) from the simulated timings. Please note that the FFT calculation was done for active ports. One diagram contains the FFTs of several driver settings. As indicated by the timing waveform in chapter 4.1.3, different driver settings allow different data rates. The FFTs were calculated using these realistic data rates. This fact of different base frequencies explains why the knee-points on the envelope curves appear at different (harmonic) frequencies. For this overview, only point-to-point and bus structures have been considered because there is no significant difference for star and tree structures. Furthermore, the FFT calculation was restricted to room temperature which is the standard condition for emission measurements. Application Note AP V1.1, 21-6

131 Comparison between all Driver Settings for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-A2-3v3-2pF-ViaY-TermY SME-A2-3v3-2pF-ViaY-TermY SSO-A2-3v3-2pF-ViaY-TermY MED-A2-3v3-2pF-ViaY-TermY WEA-A2-3v3-2pF-ViaY-TermY Figure 174: Class A2; various driver settings at 2pF load for P2P layout w/ Vias w/ Term Comparison between all Driver Settings for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-A2-3v3-2pF-ViaY-TermN SME-A2-3v3-2pF-ViaY-TermN SSO-A2-3v3-2pF-ViaY-TermN MED-A2-3v3-2pF-ViaY-TermN WEA-A2-3v3-2pF-ViaY-TermN Figure 17: Class A2; various driver settings at 2pF load for P2P layout w/ Vias w/o Term Application Note AP V1.1, 21-6

132 Comparison between all Driver Settings for PCB "Bus" 2 C dbµv SSH-A2-3v3-2pF-ViaY-TermY SME-A2-3v3-2pF-ViaY-TermY SSO-A2-3v3-2pF-ViaY-TermY MED-A2-3v3-2pF-ViaY-TermY WEA-A2-3v3-2pF-ViaY-TermY MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 176: Class A2; various driver settings at 2pF load for Bus layout w/ Vias w/ Term Comparison between all Driver Settings for PCB "Bus" 2 C dbµv SSH-A2-3v3-2pF-ViaY-TermN SME-A2-3v3-2pF-ViaY-TermN SSO-A2-3v3-2pF-ViaY-TermN MED-A2-3v3-2pF-ViaY-TermN WEA-A2-3v3-2pF-ViaY-TermN MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 177: Class A2; various driver settings at 2pF load for Bus layout w/ Vias w/o Term Application Note AP V1.1, 21-6

133 Comparison between all Driver Settings for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-A2-3v3-4pF-ViaY-TermY SME-A2-3v3-4pF-ViaY-TermY SSO-A2-3v3-4pF-ViaY-TermY MED-A2-3v3-4pF-ViaY-TermY WEA-A2-3v3-4pF-ViaY-TermY Figure 178: Class A2; various driver settings at 4pF load for P2P layout w/ Vias w/ Term Comparison between all Driver Settings for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-A2-3v3-4pF-ViaY-TermN SME-A2-3v3-4pF-ViaY-TermN SSO-A2-3v3-4pF-ViaY-TermN MED-A2-3v3-4pF-ViaY-TermN WEA-A2-3v3-4pF-ViaY-TermN Figure 179: Class A2; various driver settings at 4pF load for P2P layout w/ Vias w/o Term Application Note AP V1.1, 21-6

134 Comparison between all Driver Settings for PCB "Bus" 2 C dbµv SSH-A2-3v3-4pF-ViaY-TermY SME-A2-3v3-4pF-ViaY-TermY SSO-A2-3v3-4pF-ViaY-TermY MED-A2-3v3-4pF-ViaY-TermY WEA-A2-3v3-4pF-ViaY-TermY 1-1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 18: Class A2; various driver settings at 4pF load for Bus layout w/ Vias w/ Term Comparison between all Driver Settings for PCB "Bus" 2 C dbµv SSH-A2-3v3-4pF-ViaY-TermN SME-A2-3v3-4pF-ViaY-TermN SSO-A2-3v3-4pF-ViaY-TermN MED-A2-3v3-4pF-ViaY-TermN WEA-A2-3v3-4pF-ViaY-TermN 1-1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 181: Class A2; various driver settings at 4pF load for Bus layout w/ Vias w/o Term Application Note AP V1.1, 21-6

135 Comparison between Strong Drivers for PCB "Point-to-Point" 2 C dbµv SSH-B2-2v-2pF-ViaY-TermY SME-B2-2v-2pF-ViaY-TermY -1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 182: Class B2; Strong-Sharp & Strong-Medium drivers at 2pF load for P2P layout w/ Vias w/ Term Comparison between Strong Drivers for PCB "Point-to-Point" 2 C dbµv SSH-B2-2v-2pF-ViaY-TermN SME-B2-2v-2pF-ViaY-TermN -1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 183: Class B2; Strong-Sharp & Strong-Medium drivers at 2pF load for P2P layout w/ Vias w/o Term Application Note AP V1.1, 21-6

136 Comparison between Strong Drivers for PCB "Bus" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-B2-2v-2pF-ViaY-TermY SME-B2-2v-2pF-ViaY-TermY Figure 184: Class B2; Strong-Sharp & Strong-Medium drivers at 2pF load for Bus layout w/ Vias w/ Term Comparison between Strong Drivers for PCB "Bus" 2 C dbµv SSH-B2-2v-2pF-ViaY-TermN SME-B2-2v-2pF-ViaY-TermN -1 MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency Figure 18: Class B2; Strong-Sharp & Strong-Medium drivers at 2pF load for Bus layout w/ Vias w/o Term Application Note AP V1.1, 21-6

137 Comparison between Strong Drivers for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-B2-2v-4pF-ViaY-TermY SME-B2-2v-4pF-ViaY-TermY Figure 186: Class B2; Strong-Sharp & Strong-Medium drivers at 4pF load for P2P layout w/ Vias w/ Term Comparison between Strong Drivers for PCB "Point-to-Point" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-B2-2v-4pF-ViaY-TermN SME-B2-2v-4pF-ViaY-TermN Figure 187: Class B2; Strong-Sharp & Strong-Medium drivers at 4pF load for P2P layout w/ Vias w/o Term Application Note AP V1.1, 21-6

138 Comparison between Strong Drivers for PCB "Bus" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-B2-2v-4pF-ViaY-TermY SME-B2-2v-4pF-ViaY-TermY Figure 188: Class B2; Strong-Sharp & Strong-Medium drivers at 4pF load for Bus layout w/ Vias w/ Term Comparison between Strong Drivers for PCB "Bus" 2 C dbµv MHz 1MHz 2MHz 3MHz 4MHz MHz 6MHz 7MHz 8MHz 9MHz 1MHz Frequency SSH-B2-2v-4pF-ViaY-TermN SME-B2-2v-4pF-ViaY-TermN Figure 189: Class B2; Strong-Sharp & Strong-Medium drivers at 4pF load for Bus layout w/ Vias w/o Term Application Note AP V1.1, 21-6

139 7 Recommended settings for signal categories 7.1 General In the previous chapters, many detailed results were provided for the impact of driver settings and load capacitance on resulting rise and fall times as well as on conducted and radiated emission. Generally the required signal integrity determines the selection of driver strength and slew rate for a given toggle rate and capacitive load. However, due to the simultaneous impact on electromagnetic emission, the weakest possible driver setting which still meets the signal integrity should be chosen. To decide for the proper pad driver settings for a signal, its electrical characteristics should be considered. This leads to the definition of signal categories by means of clock or data transfer (AC view) or current driving capability (DC view). According these views, any signal can be characterized as shown in Table. Signal category Clock rate Capacitive load DC driving capability EBU clock 4..8MHz 1..pF n/a System clock 2..4MHz 1..pF n/a High-speed data line..2mhz 1..pF n/a Low-speed data line...mhz 1..pF n/a Low-speed control line <1MHz <2pF n/a High-current control line n/a n/a 1..3mA Medium-current control line n/a n/a 1..1mA Low-current control line n/a n/a <1mA Table : Signal categories The following settings for pad output drivers are available, see also Table 6: strong driver / sharp edge (setting 1) strong driver / medium edge (setting 2) strong driver / soft edge (setting 3) medium driver / no edge configuration available (setting 4) weak driver / no edge configuration available (setting ) Setting Driver configuration Edge configuration Signal category 1 STRONG SHARP System clock High 2 STRONG MEDIUM System clock High-speed data lines 3 STRONG SOFT High-speed data lines High-current control lines 4 MEDIUM none Low-speed data lines Medium-current control lines WEAK none Very low-speed control lines Low-current control line Table 6: Recommended output driver settings Capacitive Load Low High Low All All All All All DC Current 1) 2./-2./-1.4 ma 1.8/-1.8/-1. ma.37/-.37/-.28ma Application Note AP V1.1, 21-6

140 Note 1) : Three values are given for the DC current of Class A2 pins in the format I OL /I OH1 /I OH2. I OL is the maximum output current for V OL.4V. I OH1 is the maximum output current for V OH 2.4V. I OH2 is the maximum output current for V OH VDDP-.4V. The following parameters determine the final selection of driver settings: signal performance category (AC and DC) maximum temperature maximum acceptable electromagnetic emission 7.2 Decision Tables and Graphs Following the recommendations given above, the driver setting selection should be based on (1) proper signal integrity and (2) minimal electromagnetic emission. Since electromagnetic emission increases with stronger driver settings, the weakest driver and slew rate settings should be selected which are able to force the rise/fall times required for the desired signal integrity. This chapter offers decision numbers in table and graphical format for proper driver settings at maximum clock or data rates expected to be driven. The rise/fall times occupy 1/6 of the clock period each, see Fig. 19 on top. Alternatively, the rise/fall times occupy 1/4 of the clock period each, see Fig. 19 on bottom. U 9% T/6 T 1% U T/6 t 9% T/4 T 1% T/4 Figure 19: Assumed rise/fall timing conditions related to signal period Please note that all values given in this chapter are proposals for system application designers using Infineon Audo-NG and Audo-Future microcontrollers in.13µm CMOS technology. They are based on timing measurements of Class A2 drivers operating at 3.3V supply voltage, performed on center lot devices. Thus all values are subject to ca. 1% offset depending on fabrication process variation. Additionally, pad supply voltages different from nominal conditions, impact the resulting timings. The finally selected driver setting should include this ca. 1% offset. It has to be added to all numbers given in the tables and graphs. t Application Note AP V1.1, 21-6

141 Fig. 191 shows an example of a decision graph. Figure 188: Assumed rise/fall timing conditions related to signal period The clock/data rate is given in MHz for capacitive loads of 2, 3, 4 and pf and driver selections of weak, medium, strong soft/medium/sharp for Class A2 drivers. Class B2 drivers are only used in the external bus interface, operating at high data rates. Thus Class B2 drivers are only represented by strong-sharp and strong-medium driver settings. However, operations at 2.V and 3.3V supply voltage are considered. In the example given in Fig. 164, the resulting maximum data rates are marked with red circles as 17MHz at 2pF load, 13MHz at 3pF load, 12.MHz at 4pF load and 12MHz at pf load. If a pin is intended to toggle a 3pF load at 1MHz, the strong-soft setting is not sufficient. Instead strongmedium must be selected. Strong-sharp is of course also capable of driving 3pF load at 1MHz, but should be avoided due to unnecessary high electromagnetic emission. The rise/fall times occupy 1/6 of the clock period each, see Fig. 163 on top. This relation should be acceptable for most interface signals and protocols. Tables 8 and 9 give an overview of the maximal toggle rates in [MHz] for all Class A2 driver settings (WEA=weak, MED=medium, SSO=strong-soft, SME=strong-medium, SSH=strong-sharp) connected to capacitive loads of 2, 3, 4 and pf. Each ambient temperature is marked by its own color. According the microcontroller specification or marking, one of the following maximal temperatures should apply: 12 C, 11 C, 8 C. The other temperatures 3 C, C and -4 C are given for reference only. In Table 8, the rise/fall times are assumed to occupy 1/6 of the clock period. In Table 9, the rise/fall times are assumed to occupy 1/4 of the clock period. Fig show the values of Tables 8 and 9 in the graphical representation explained in Fig. 188, separated by ambient temperatures. In the respective titles, 16% Edges stands for rise/fall times Application Note AP V1.1, 21-6