CS:APP Chapter 4 Computer Architecture Pipelined Implementation

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1 CS:APP Chaptr 4 Computr Architctur Piplind Implmntation CS:APP2

2 Ovrviw Gnral Principls of Piplinin n Goal n Difficultis Cratin a Piplind Y86 Procssor n arranin SEQ n Insrtin piplin ristrs n Problms with data and control hazards 2 CS:APP2

3 al-world Piplins: Car Washs Squntial Paralll Piplind Ida n Divid procss into indpndnt stas n Mov objcts throuh stas in squnc n At any ivn tims, multipl objcts bin procssd 3 CS:APP2

4 Computational Exampl 300 ps 20 ps Combinational Dlay = 320 ps Throuhput = 3.12 GIPS Clock Systm n Computation rquirs total of 300 picosconds n Additional 20 picosconds to sav rsult in ristr n Must hav clock cycl of at last 320 ps 4 CS:APP2

5 3-Way Piplind Vrsion 100 ps 20 ps 100 ps 20 ps 100 ps 20 ps A B C Dlay = 360 ps Throuhput = 8.33 GIPS Systm n Divid combinational into 3 blocks of 100 ps ach n Can bin nw opration as soon as prvious on passs throuh sta A. l Bin nw opration vry 120 ps n Ovrall latncy incrass l 360 ps from start to finish Clock 5 CS:APP2

6 Piplin Diarams Unpiplind OP1 OP2 OP3 Tim n Cannot start nw opration until prvious on complts 3-Way Piplind OP1 OP2 OP3 A B C A B C A B C Tim n Up to 3 oprations in procss simultanously 6 CS:APP2

7 Opratin a Piplin Clock OP1 OP2 OP3 A B C A B C A B C Tim 100 ps 20 ps 100 ps 20 ps 100 ps 20 ps A B C Clock 7 CS:APP2

8 Limitations: Nonuniform Dlays 50 ps 20 ps 150 ps 20 ps 100 ps 20 ps A B C Dlay = 510 ps Throuhput = 5.88 GIPS OP1 OP2 OP3 Clock A B C A B C A B C Tim n Throuhput limitd by slowst sta n Othr stas sit idl for much of th tim n Challnin to partition systm into balancd stas 8 CS:APP2

9 Limitations: istr Ovrhad 50 ps 20 ps 50 ps 20 ps 50 ps 20 ps 50 ps 20 ps 50 ps 20 ps 50 ps 20 ps Clock Dlay = 420 ps, Throuhput = GIPS n As try to dpn piplin, ovrhad of loadin ristrs bcoms mor sinificant n Prcnta of clock cycl spnt loadin ristr: l 1-sta piplin: 6.25% l 3-sta piplin: 16.67% l 6-sta piplin: 28.57% n Hih spds of modrn procssor dsins obtaind throuh vry dp piplinin 9 CS:APP2

10 Data Dpndncis Combinational Clock OP1 OP2 OP3 Tim Systm n Each opration dpnds on rsult from prcdin on 10 CS:APP2

11 Data Hazards A B C OP1 A B C OP2 A B C OP3 A B C OP4 A B C Tim Clock n sult dos not fd back around in tim for nxt opration n Piplinin has chand bhavior of systm 11 CS:APP2

12 Data Dpndncis in Procssors 1 irmovl $50, %ax 2 addl %ax, %bx 3 mrmovl 100( %bx ), %dx n sult from on instruction usd as oprand for anothr l ad-aftr-writ (AW) dpndncy n Vry common in actual prorams n Must mak sur our piplin handls ths proprly l Gt corrct rsults l Minimiz prformanc impact 12 CS:APP2

13 SEQ Hardwar n Stas occur in squnc n On opration in procss at a tim 13 CS:APP2

14 SEQ+ Hardwar n Still squntial implmntation n ordr PC sta to put at binnin PC Sta n Task is to slct PC for currnt instruction n Basd on rsults computd by prvious instruction Procssor Stat n PC is no lonr stord in ristr n But, can dtrmin PC basd on othr stord information 14 CS:APP2

15 Addin Piplin istrs PC Writ back nwpc vale, valm valm Mmory Data mmory Addr, Data vale Excut Cnd CC alua, alub ALU vala, valb Dcod srca, srcb dsta, dstb A B istr M fil E Ftch icod, ifun ra, rb valc Instruction mmory valp PC incrmnt PC 15 CS:APP2

16 Piplin Stas Ftch n Slct currnt PC n ad instruction n Comput incrmntd PC Dcod n ad proram ristrs Excut n Oprat ALU Mmory n ad or writ data mmory Writ Back n Updat ristr fil 16 CS:APP2

17 PIPE- Hardwar n Piplin ristrs hold intrmdiat valus from instruction xcution Forward (Upward) Paths n Valus passd from on sta to nxt n Cannot jump past stas l.., valc passs throuh dcod 17 CS:APP2

18 Sinal Namin Convntions S_Fild n Valu of Fild hld in sta S piplin ristr s_fild n Valu of Fild computd in sta S 18 CS:APP2

19 Fdback Paths Prdictd PC n Guss valu of nxt PC Branch information n Jump takn/not-takn n Fall-throuh or tart addrss turn point n ad from mmory istr updats n To ristr fil writ ports 19 CS:APP2

20 Prdictin th PC n Start ftch of nw instruction aftr currnt on has compltd ftch sta l Not nouh tim to rliably dtrmin nxt instruction n Guss which instruction will follow l covr if prdiction was incorrct 20 CS:APP2

21 Our Prdiction Straty Instructions that Don t Transfr Control n Prdict nxt PC to b valp n Always rliabl Call and Unconditional Jumps n Prdict nxt PC to b valc (dstination) n Always rliabl Conditional Jumps n Prdict nxt PC to b valc (dstination) n Only corrct if branch is takn l Typically riht 60% of tim turn Instruction n Don t try to prdict 21 CS:APP2

22 covrin from PC Misprdiction n Misprdictd Jump l Will s branch condition fla onc instruction rachs mmory sta l Can t fall-throuh PC from vala (valu M_valA) n turn Instruction l Will t rturn PC whn rt rachs writ-back sta (W_valM) 22 CS:APP2

23 Piplin Dmonstration irmovl $1,%ax #I1 F D E M W irmovl $2,%cx #I2 F D E M W irmovl $3,%dx #I3 F D E M W irmovl $4,%bx #I4 F D E M W halt #I5 F D E M W Cycl 5 Fil: dmo-basic.ys W I1 F I5 23 CS:APP2 M I2 E I3 D I4

24 Data Dpndncis: 3 Nop s # dmo-h3.ys 0x000: irmovl $10,%dx F D E M W 0x006: irmovl $3,%ax F D E M W 0x00c: nop F D E M W 0x00d: nop F D E M W 0x00: nop F D E M W 0x00f: addl %dx,%ax F D E M W 0x011: halt F D E M W Cycl 6 W [%ax] f 3 Cycl 7 D vala f [%dx] = valb f [%ax] CS:APP2 = 3

25 Data Dpndncis: 2 Nop s # dmo-h2.ys 0x000: irmovl $10,%dx F D E M W 0x006: irmovl $3,%ax F D E M W 0x00c: nop F D E M W 0x00d: nop F D E M W 0x00: addl %dx,%ax F D E M W 0x010: halt F D E M W 10 Cycl 6 W [%ax] f3 D vala f[%dx] = 10 valb f[%ax] = 0 Error 25 CS:APP2

26 Data Dpndncis: 1 Nop # dmo-h1.ys x000: irmovl $10,%dx F D E M 0x006: irmovl $3,%ax F D E M 0x00c: nop F D E M W 0x00d: addl %dx,%ax F D E M W 0x00f: halt F D E M W W W Cycl 5 W [%dx] f10 D Error vala f[%dx] = 0 26 valb f[%ax] = 0 CS:APP2 M M_valE = 3 M_dstE = %ax

27 Data Dpndncis: No Nop # dmo-h0.ys x000: irmovl $10,%dx F D E M W 0x006: irmovl $3,%ax F D E M W 0x00c: addl %dx,%ax F D E M W 0x00: halt F D E M W Cycl 4 M M_valE = 10 M_dstE = %dx E _vale f = 3 E_dstE = %ax D vala f [%dx] = 0 valb f [%ax] = 0 Error 27 CS:APP2

28 Branch Misprdiction Exampl dmo-j.ys 0x000: xorl %ax,%ax 0x002: jn t # Not takn 0x007: irmovl $1, %ax # Fall throuh 0x00d: nop 0x00: nop 0x00f: nop 0x010: halt 0x011: t: irmovl $3, %dx # Tart (Should not xcut) 0x017: irmovl $4, %cx # Should not xcut 0x01d: irmovl $5, %dx # Should not xcut n Should only xcut first 8 instructions 28 CS:APP2

29 Branch Misprdiction Trac # dmo - j x000: xorl % ax,% ax F D E M W 0x002: jn t # Not takn F D E M W 0x011: t: irmovl $3, % dx # Tart F D E M W 0x017: irmovl $4, % cx # Tart+1 F D E M W 0x007: irmovl $1, % ax # Fall Throuh F D E M W n Incorrctly xcut two instructions at branch tart Cycl 5 M M_Cnd = 0 M_ vala = 0x007 E vale f 3 dste = % dx D valc = 4 dste = % cx F valc f 1 29 rb f % ax CS:APP2

30 turn Exampl dmo-rt.ys 0x000: irmovl Stack,%sp # Initializ stack pointr 0x006: nop # Avoid hazard on %sp 0x007: nop 0x008: nop 0x009: call p # Procdur call 0x00: irmovl $5,%si # turn point 0x014: halt 0x020:.pos 0x20 0x020: p: nop # procdur 0x021: nop 0x022: nop 0x023: rt 0x024: irmovl $1,%ax # Should not b xcutd 0x02a: irmovl $2,%cx # Should not b xcutd 0x030: irmovl $3,%dx # Should not b xcutd 0x036: irmovl $4,%bx # Should not b xcutd 0x100:.pos 0x100 0x100: Stack: # Stack: Stack pointr n quir lots of nops to avoid data hazards 30 CS:APP2

31 Incorrct turn Exampl # dmo-rt 0x023: rt F D E M W 0x024: irmovl $1,%ax # Oops! F D E M W 0x02a: irmovl $2,%cx # Oops! F D E M W 0x030: irmovl $3,%dx # Oops! F D E M W 0x00: irmovl $5,%si # turn F D E M W n Incorrctly xcut 3 instructions followin rt W valm = 0x0 M vale = 1 dste = %ax E vale f 2 dste = %cx D valc = 3 dste = %dx F 31 valc f 5 rb f %si CS:APP2

32 Piplin Summary Concpt n Brak instruction xcution into 5 stas n un instructions throuh in piplind mod Limitations n Can t handl dpndncis btwn instructions whn instructions follow too closly n Data dpndncis l On instruction writs ristr, latr on rads it n Control dpndncy l Instruction sts PC in way that piplin did not prdict corrctly l Misprdictd branch and rturn Fixin th Piplin n W ll do that nxt tim 32 CS:APP2

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