OptiMOS Small-Signal-Transistor,100V

Size: px

Start display at page:

Download "OptiMOS Small-Signal-Transistor,100V"

Percival Rodgers
6 years ago
Views:

1 MOSFET MetalOxideSemiconductorFieldEffectTransistor OptiMOS Small-Signal-Transistor,V BSL96SN DataSheet Rev.. Final Industrial&Multimarket

OptiMOS Small-Signal-Transistor Features N-channel Enhancement mode Logic level (4.5V rated) Avalanche rated Product Summary V DS V R DS(on),max V GS = V 46 mω V GS =4.5 V 56 I D.

Yes Non dry Maximum ratings, at T j =5 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current I D T A =5 C.4 A T A =7 C.

2 OptiMOS Small-Signal-Transistor Features N-channel Enhancement mode Logic level (4.5V rated) Avalanche rated Product Summary V DS V R DS(on),max V GS = V 46 mω V GS =4.5 V 56 I D.4 A Qualified according to AEC Q RoHS compliant Halogen-free according to IEC649-- PG-TSOP Type Package Tape and Reel Info Marking Halogen Free Packing BSL96SN TSOP6 H637: 3 pcs/ reel slz Yes Non dry Maximum ratings, at T j =5 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current I D T A =5 C.4 A T A =7 C. Pulsed drain current I D,pulse T A =5 C 5.6 Avalanche energy, single pulse E AS I D =.4 A, R GS =5 Ω 5. mj Reverse diode dv /dt dv /dt I D =.4 A, V DS =5 V, di /dt = A/µs, T j,max =5 C 6 kv/µs Gate source voltage V GS ± V Power dissipation ) P tot T A =5 C. W Operating and storage temperature T j, T stg C ESD Class JESD-A4 -HBM (<5V) Soldering Temperature 6 C IEC climatic category; DIN IEC 68-55/5/56 Rev. page 4--6

3 Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics Thermal resistance, junction - soldering point Thermal resistance R thjs K/W R thja minimal footprint junction - ambient 6 cm cooling area ) Electrical characteristics, at T j =5 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS = V, I D =5 µa - - V Gate threshold voltage V GS(th) V DS =Vgs V, I D = µa Drain-source leakage current I DSS V DS = V, V GS = V, T j =5 C V DS = V, V GS = V, T j =5 C - -. μa - - Gate-source leakage current I GSS V GS = V, V DS = V - - na Drain-source on-state resistance R DS(on) V GS =4.5 V, I D =.4 A mω V GS = V, I D =.6 A Transconductance g fs V DS > I D R DS(on)max, I D =. A S ) Device on 4mm x 4mm x.5mm epoxy PCB FR4 with 6cm² (one layer, 7μm thick) copper area for drain connection. PCB is vertical in still air. (t < 5 sec.) Rev. page 4--6

4 Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics ) Input capacitance C iss pf Output capacitance C oss V GS = V, V DS =5 V, f = MHz Reverse transfer capacitance C rss Turn-on delay time t d(on) ns Rise time t r V DD =5 V, V GS = V, Turn-off delay time t d(off) I D =.4 A, R G,ext =6 Ω Fall time t f Gate Charge Characteristics ) Gate to source charge Q gs nc Gate to drain charge Q gd V DD =5 V, I D =.4 A, Gate charge total Q g V GS = to 5 V Gate plateau voltage V plateau V Reverse Diode Diode continous forward current I S T A =5 C A Diode pulse current I S,pulse Diode forward voltage V SD V GS = V, I F =.4 A, T j =5 C -.8. V Reverse recovery time ) t rr V R =5 V, I F =.4 A, - 3 ns Reverse recovery charge ) Q rr di F /dt = A/µs nc ) Defined by design. Not subjected to production test Rev. page

5 Power dissipation Drain current P tot =f(t A ) I D =f(t A ); V GS V P tot [W] T A [ C] T A [ C] 3 Safe operating area 4 Max. transient thermal impedance I D =f(v DS ); T A =5 C; D = Z thja =f(t p ) parameter: t p parameter: D =t p /T µs µs µs.5 ms ms.. 5 s Z thja [K/W] single pulse. V DS [V] t p [s] Rev. page

6 5 Typ. output characteristics 6 Typ. drain-source on resistance I D =f(v DS ); T j =5 C R DS(on) =f(i D ); T j =5 C parameter: V GS parameter: V GS V 4 V 3.5 V 3.3 V.8 V 3 V V V R DS(on) [mw] V 3.5 V 4 V 4.5 V V V DS [V] Typ. transfer characteristics 8 Typ. forward transconductance I D =f(v GS ); V DS > I D R DS(on)max g fs =f(i D ); T j =5 C C 5 C 3..4 g fs [S] V GS [V] Rev. page

7 9 Drain-source on-state resistance Typ. gate threshold voltage R DS(on) =f(t j ); I D =.4 A; V GS = V V GS(th) =f(t j ); V DS =V GS ; I D = µa parameter: I D.4 max 8.6 R DS(on) [mw] 6 max V GS(th) [V]. typ 4.8 min typ T j [ C] T j [ C] Typ. capacitances Forward characteristics of reverse diode C =f(v DS ); V GS = V; f = MHz; T j =5 C I F =f(v SD ) parameter: T j 3 5 C Ciss 5 C C [pf] I F [A] 5 C, 98% Coss - Crss 5 C, 98% V DS [V] V SD [V] Rev. page

8 3 Avalanche characteristics 4 Typ. gate charge I AS =f(t AV ); R GS =5 Ω parameter: T j(start) V GS =f(q gate ); I D =.4 A pulsed parameter: V DD 5 V 9 8 V 8 V 7 6 I AV [A] C 5 C V GS [V] 5 5 C t AV [µs] Q gate [nc] 5 Drain-source breakdown voltage 6 Gate charge waveforms V BR(DSS) =f(t j ); I D =5 µa 6 V GS Q g 8 V BR(DSS) [V] 4 96 V gs(th) 9 88 Q g(th) Q sw Q gate 84 Q gs Q gd T j [ C] Rev. page

9 Package Outline: TSOP6 Note: For symmetric types there is no defined Pin orientation in the reel. Rev. page

10 RevisionHistory BSL96SN Revision:4--,Rev.. Previous Revision Revision Date Subjects (major changes since last revision). 4-- Release of final version WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.pleasesendyourproposal(includingareferencetothisdocument)to: Publishedby InfineonTechnologiesAG 876München,Germany 4InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,infineontechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice( Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestinfineontechnologiesoffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofinfineontechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. 9 Rev..,4--

OptiMOS 3 Power-Transistor

OptiMOS 3 Power-Transistor Features N-channel, normal level Excellent gate charge x R DS(on) product (FOM) Very low on-resistance R DS(on) Product Summary V DS 1 V R DS(on),max (TO 263) 4.2 mw I D 1 A