Some Recent Research Issues in Quantum Logic

Transcription

1 Some Recent Research Issues in Quantum Logic Marek Perkowski Part one

2 What will be discussed?. Background. Quantum circuits synthesis 3. Quantum circuits simulation 4. Quantum logic emulation and evolvable hardware 5. Quantum circuits verification 6. Quantum-based robot control

3 Origin of slides: John Hayes, Peter Shor, Martin Lukac, Mikhail Pivtoraiko, Alan Mishchenko, Pawel Kerntopf.

4 A beam-splitter 5% 5% The simplest explanation is that the beam-splitter acts as a classical coin-flip, randomly sending each photon one way or the other.

5 Quantum Interference % The simplest explanation must be wrong, since it would predict a 5-5 distribution.

6 More experimental data ϕ ϕ sin ϕ cos

7 The particle can exist in a linear combination or superposition of the two paths ϕ ϕ sin ϕ cos i iϕ + i e + e iϕ + i(e iϕ + )

8 Probability Amplitude and Measurement If the photon is measured when it is in the state α + α probability α then we get with θ α ϕ α α + α =

9 Quantum Operations Quantum Operations The operations are induced by the apparatus linearly, that is, if and then + + α + α + α α i i i + i + i i + α α + + α α =

10 Quantum Operations Any linear operation that takes states satisfying α + α α + α = and maps them to states ' ' + satisfying ' ' α α + α α must be UNITARY =

11 Linear Algebra Linear Algebra α + α α α = + α α corresponds to corresponds to corresponds to

12 Linear Algebra corresponds to i i ϕ corresponds to iϕ e

13 Linear Algebra Linear Algebra ϕ corresponds to i i iϕ e i i

14 Linear Algebra U = u u u u is unitary if and only if u u u u UU t = u u u u * * * * = = I

15 Abstraction The two position states of a photon in a Mach-Zehnder apparatus is just one example of a quantum bit or qubit Except when addressing a particular physical implementation, we will simply talk about basis states and and unitary operations like H and ϕ

16 where H corresponds to and corresponds to ϕ iϕ e

17 An arrangement like ϕ is represented with a network like H ϕ H

18 More than one qubit If we concatenate two qubits α ( α + ) α ( β + ) β we have a -qubit system with 4 basis states = = = = and we can also describe the state as β β + αβ + αβ + α or by the vector αβ αβ αβ αβ α = α β β

19 More than one qubit In general we can have arbitrary superpositions α + α + α + α + α + α + α = where there is no factorization into the tensor product of two independent qubits. These states are called entangled. α

20 Measuring multi-qubit systems If we measure both bits of α + α + α + α we get x y with probability α xy

21

22 Classical vs. Quantum Circuits Goal: Fast, low-cost implementation of useful algorithms using standard components (gates) and design techniques Classical Logic Circuits Circuit behavior is governed implicitly by classical physics Signal states are simple bit vectors, e.g. X = Operations are defined by Boolean Algebra No restrictions exist on copying or measuring signals Small well-defined sets of universal gate types, e.g. {NAND}, {AND,OR,NOT}, {AND,NOT}, etc. Well developed CAD methodologies exist Circuits are easily implemented in fast, scalable and macroscopic technologies such as CMOS

23 Classical vs. Quantum Circuits Quantum Logic Circuits Circuit behavior is governed explicitly by quantum mechanics Signal states are vectors interpreted as a superposition of binary qubit vectors with complex-number coefficients n Ψ = c i i n i n i i = Operations are defined by linear algebra over Hilbert Space and can be represented by unitary matrices with complex elements Severe restrictions exist on copying and measuring signals Many universal gate sets exist but the best types are not obvious Circuits must use microscopic technologies that are slow, fragile, and not yet scalable, e.g., NMR

24 Quantum Circuit Characteristics Unitary Operations Gates and circuits must be reversible (information-lossless) Number of output signal lines = Number of input signal lines The circuit function must be a bijection, implying that output vectors are a permutation of the input vectors Classical logic behavior can be represented by permutation matrices Non-classical logic behavior can be represented including state sign (phase) and entanglement

25 Quantum Circuit Characteristics Quantum Measurement Measurement yields only one state X of the superposed states Measurement also makes X the new state and so interferes with computational processes X is determined with some probability, implying uncertainty in the result States cannot be copied ( cloned ), implying that signal fanout is not permitted Environmental interference can cause a measurement-like state collapse (decoherence)

26 Classical vs. Quantum Circuits c n Classical adder a b a s s b s a b s 3 a 3 Sum b 3 c n Carry

27 Classical vs. Quantum Circuits Quantum adder

28

29 Reversible Circuits Reversibility was studied around 98 motivated by power minimization considerations Bennett, Toffoli et al. showed that any classical logic circuit C can be made reversible with modest overhead i n inputs Generic Boolean Circuit m outputs f(i) i Junk Reversible Boolean Circuit Junk f(i)

30 Reversible Circuits How to make a given f reversible Suppose f :i f(i) has n inputs m outputs Introduce n extra outputs and m extra inputs Replace f by f rev : i, j i, f(i) j where is XOR Example : f(a,b) = AND(a,b) a b c Reversible AND gate a b f = ab c a b c a b f This is the well-known Toffoli gate, which realizes AND when c =, and NAND when c =.

31 Reversible Circuits Reversible gate family [Toffoli 98] (Toffoli gate) Every Boolean function has a reversible implementation using Toffoli gates. There is no universal reversible gate with fewer than three inputs

32

33 Quantum Gates One-Input gate: NOT Input state: c + c Output state: c + c NOT Pure states are mapped thus: and Gate operator (matrix) is As expected: = NOT = NOT =

34 Quantum Gates One-Input gate: Square root of NOT Some matrix elements are imaginary Gate operator (matrix): We find: i i = i i / / / / = / / i / / i i so with probability i/ = / and with probability / = / Similarly, this gate randomizes input But concatenation of two gates eliminates the randomness! i i i i = i i NOT NOT

35 Quantum Gates One-Input gate: Hadamard H Maps / + / and / /. Ignoring the normalization factor /, we can write x (-) x x x One-Input gate: Phase shift e iφ φ

36 Quantum Gates Universal One-Input Gate Sets Requirement: U Any state ψ Hadamard and phase-shift gates form a universal gate set Example: The following circuit generates ψ = cos θ + e iφ sin θ up to a global factor H θ H π + φ

37 Quantum Gates Two-Input Gate: Controlled NOT (CNOT) x y CNOT x x y x y x x y CNOT maps x x x and x x NOT x x x x looks like cloning, but it s not. These mappings are valid only for the pure states and Serves as a non-demolition measurement gate

38 Quantum Gates 3-Input gate: Controlled CNOT (C NOT or Toffoli gate) a b c a b ab c

39 Quantum Gates General controlled gates that control some - qubit unitary operation U are useful u u u u U U U etc. U C(U) C (U)

40 Universal Gate Sets To implement any unitary operation on n qubits exactly requires an infinite number of gate types The (infinite) set of all -input gates is universal Any n-qubit unitary operation can be implemented using Θ(n 3 4 n ) gates [Reck et al. 994] CNOT and the (infinite) set of all -qubit gates is universal

41 Quantum Gates Discrete Universal Gate Sets The error on implementing U by V is defined as E(U,V ) = max Ψ (U V ) Ψ If U can be implemented by K gates, we can simulate U with a total error less than ε with a gate overhead that is polynomial in log(k/ε) A discrete set of gate types G is universal, if we can approximate any U to within any ε > using a sequence of gates from G

42 Quantum Gates Discrete Universal Gate Set Example : Four-member standard gate set i iπ /4 e H S π/8 CNOT Hadamard Phase π/8 (T) gate Example : {CNOT, Hadamard, Phase, Toffoli}

43

44 Quantum Circuits A quantum (combinational) circuit is a sequence of quantum gates, linked by wires The circuit has fixed width corresponding to the number of qubits being processed Logic design (classical and quantum) attempts to find circuit structures for needed operations that are Functionally correct Independent of physical technology Low-cost, e.g., use the minimum number of qubits or gates Quantum logic design is not well developed!

45 Quantum Circuits Ad hoc designs known for many specific functions and gates Example illustrating a theorem by [Barenco et al. 995]: Any C (U) gate can be built from CNOTs, C(V), and C(V ) gates, where V = U = U V V V

46 Quantum Circuits Example : Simulation? = x U x x V x x V V V x

47 Quantum Circuits Example : Simulation (contd.)? = x U U x x V x V x V V V U x Exercise: Simulate the two remaining cases

48 Quantum Circuits Example : Algebraic analysis x x? = x 3 U V V V U U U U 3 U 4 U 5 Is U (x, x, x 3 ) = U 5 U 4 U 3 U U (x, x, x 3 ) = (x, x, x x U (x 3 ) )?

49 Quantum Circuits Example (contd); U = I C(V) = v v v v = v v v v v v v v

50 Quantum Circuits Example (contd); U = U 4 = CNOT(x, x ) I = =

51 Quantum Circuits Example (contd); U 5 is the same as U but has x and x permuted (tricky!) It remains to evaluate the product of five 8 x 8 matrices U 5 U 4 U 3 U U using the fact that VV = I and VV = U v v v v v v v v v v v v v v v v v v v v v v v v = = U v v + v v v v + v v v `v + v v v v + v v

52 Quantum Circuits Implementing a Half Adder Problem: Implement the classical functions sum = x x and carry = x x Generic design: x x y y U add x x y carry y sum

53 Quantum Circuits Half Adder : Generic design (contd.) U ADD =

54 Quantum Circuits Half Adder : Specific (reduced) design x x C NOT (Toffoli) CNOT x sum y y carry

55 Walsh Transform for two binary-input Classical logic many-valued variables Quantum logic minterms Variable Variable You need a butterfly H H Butterfly is created automatically by tensor product corresponding to superposition

56 Portland Quantum Logic Group (PQLG) What we do?

57 People at PSU and collaborators Marek Perkowski Martin Zwick Xiaoyu Song William Hung Anas Al-Rabadi Martin Lukac Mikhail Pivtoraiko Andrei Khlopotine Alan Mishchenko (University of California, Berkeley, USA) Bernd Steinbach (Technical University of Freiberg, Germany) Pawel Kerntopf (Technical University of Warsaw, Poland) Mitch Thornton (Southern Methodist University, Dallas, USA) Lech Jozwiak (Technical University of Eindhoven, The Netherlands) Andrzej Buller (ATR, Kansai Science City, Japan) Tsutomu Sasao (Kyushu University of Technology, Iizuka, Japan).

58 Current Projects Logic Synthesis for Reversible Logic decomposition Decision Diagram Mapping composition regular structures - lattices, PLAs, nets Logic Synthesis for Quantum Logic Quantum Simulation using new Decision Diagrams 4 papers published paper submitted

59 Current Projects FPGA-based model of Quantum Computer Reversible FPGA using CMOS. Realization of new spectral transforms using quantum logic. Non-linear Quantum Logic solves NP problems in polynomial time. Quantum-inspired search algorithms for robotics

60 Where to learn more Web Page of Marek Perkowski class 57 - see description of student projects Portland Quantum Logic Group We are open to collaboration and we want to grow

61 Automated Synthesis of Generalized Reversible Cascades using Genetic Algorithm

62 Agenda Introduction and history Reversible Logic and Reversible Gates Genetic algorithms The Model Simulation Conclusion

63 Reversible gates Feynman, Toffoli, Fredkin, A B P = A Q = P B Mapping of I/O allows unique (P,Q) (A,B) and Reversible Circuits To reduce the RL synthesis limitations one can insert constants in order to modify the functionality

64 Generalized Reversible Gates A B P Q n - inputs A B P Q A B P Q f f f C R C R C R D S D S A A B B C f f f C

65 Perkowski gates family

66 Mixed data/control inputs (generalized complex control gates) All : ESOP Factorized-ESOP MV Complex Terms XOR family Example:

67 Genetic algorithms Population P W I P I I 3 P F P P Population of n individuals Chromosome variable length P C W S Parallel blocks P I P Classic GA s operators Individual

68 Encoding & operations /P C /P /P W I /P /P I I /P Mutation /P C /P /P I I /P /P W I /P /P I I /P /P C /P C-O /P I W /P /P I I /P /P /P C /P /P I I /P /P I W /P /P I W /P /P I I /P /P I W /P

69 Circuit Encoding Wire Toffoli Feynmann Inverter Inverter Feynmann Feynmann Circuit LUT representation Wire Feynmann Feynmann 4 /PWT/P /PFII/P /PFF/P Toffoli Inverter Inverter Feynmann

70 GA s settings Stochastic universal sampling Fitness: Error: LUT for Fredkin gate: Error evaluation: -comparison outputs / LUT -Permutations of all constants and inputs -Normalization of error by wires and patterns -Penalization for length

71 Overview Mutation Gates Blocks Position (block/circuit) Cross-Over* Segments Experimental (unitary matrices) Reproduction Circuits Best gates Best Circuits * - for circuits having only same number of I/O

72 Experimental settings Each input is equivalent with any other Evolving new circuits by recombination Non specific conditions Population -5 Mutation =. Crossover =.3.8 Specifications: Genetic operations based on RCB > minimal element The noise in these experiments is not only a mutation but an random operator on random blocks!!! Number of wires 3 4 Gates Wire, Inverter Feynman, Swap Fredkin, Toffoli Margolus

73 Testing -No starting set restriction Unitary gate search -Mutation only on blocks Random function search

74 Improvements Using min(esop(f G)) for fitness Lamarckian learning One genotype multiple possibilities of phenotype Using to minimize Exorcism-4

75 Circuit search -Starting set restriction -Mutation all levels (..) Circuit/Gate # of Gen. R.T. Exact/s imilar Toffoli 5/ */* Fredkin 5/ */* Adder?/, sec /*

76 Conclusion Ideas: Using GA to evolve arbitrary Reversible Circuit Specific Encoding helps the evolution Alternative encoding presented Future works: Apply Lamarckian GA and other new variants of evolutionary approaches Create hybrid algorithms by mixing evolutionary and logic-symbolic methods Use new representations such as permutations and decision diagrams Use Logic minimizer to minimize the ESOP expression of the circuit THIS IS WORK IN PROGRESS, EVERYBODY IS WELCOME TO JOIN. Publishing