Making Error Correcting Codes Work for Flash Memory

Transcription

1 Making Error Correcting Codes Work for Flash Memory Part I: Primer on ECC, basics of BCH and LDPC codes Lara Dolecek Laboratory for Robust Information Systems (LORIS) Center on Development of Emerging Storage Systems (CoDESS) Department of Electrical Engineering, UCLA Flash Memory Summit 24, Santa Clara, CA / 58

2 ECC is a must for Flash! P/E Cycle Endurance, 9, 8, 7, 6, 5, 4, 3, 2,, SLC 5x-nm MLC 3x-nm MLC 2x-nm MLC 3-bit-MLC Ariel Maislos, A New Era in Embedded Flash Memory, Flash Summit 2 (Anobit) Flash Memory Summit 24, Santa Clara, CA 2 / 58

3 ECC is a must for Flash! P/E Cycle Endurance, 9, 8, 7, 6, 5, 4, 3, 2,,!"#$%&$' SLC 5x-nm MLC 3x-nm MLC 2x-nm MLC 3-bit-MLC Ariel Maislos, A New Era in Embedded Flash Memory, Flash Summit 2 (Anobit) Flash Memory Summit 24, Santa Clara, CA 2 / 58

4 ECC is a must for Flash! P/E Cycle Endurance, 9, 8, 7, 6, 5, 4, 3, 2,,!"#$%&$' ())'*$$+,' SLC 5x-nm MLC 3x-nm MLC 2x-nm MLC 3-bit-MLC Ariel Maislos, A New Era in Embedded Flash Memory, Flash Summit 2 (Anobit) Flash Memory Summit 24, Santa Clara, CA 2 / 58

5 What is this tutorial about Today we will Learn the basics of ECC operations Learn about fundamental coding approaches (BCH, LDPC) Learn about the system-level perspective on ECC Learn about recent advanced coding-oriented approaches to Flash Flash Memory Summit 24, Santa Clara, CA 3 / 58

6 A simple example Preliminaries A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Errors in Flash are modeled as transmission a noisy While highly simplistic, the BSC serves as a reasonable first-order communication approximation of channel Flash. The simplest example is binary symmetric channel (BSC). In this example Pe =., Pr(success) = Pe =.99. The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA Flash Memory Summit 24, Santa Clara, CA 6 4 / 58

7 A simple example Preliminaries A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Errors in Flash are modeled as transmission a noisy While highly simplistic, the BSC serves as a reasonable first-order communication approximation of channel Flash. The simplest In this example example Pe =., ispr(success) binary symmetric = Pe =.99 channel. (BSC). This example: The probability of error for any single bit transmitted across the channel Raw is the bit raw bit error error rate, (RBER) or RBER. In isthis.. example, RBER =.. 2 Undetected bit error rate (UBER) is. Flash Memory Summit 23 Santa Clara, CA Flash Memory Summit 24, Santa Clara, CA 6 4 / 58

8 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

9 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. Decoding rule: Receive {,,, } Decide was sent Receive {,,, } Decide was sent The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

10 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. Decoding rule: Receive {,,, } Decide was sent Receive {,,, } Decide was sent RBER is still...what is UBER? The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

11 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. Decoding rule: Receive {,,, } Decide was sent Receive {,,, } Decide was sent RBER is still...what is UBER? UBER is =.298 The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

12 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. Decoding rule: Receive {,,, } Decide was sent Receive {,,, } Decide was sent RBER is still...what is UBER? UBER is =.298 This is now 33 times better!... The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

13 A Simple Channel/Storage Model TX'd CHANNEL (STORAGE) RX'd 99% % % 99% Example : binary symmetric channel with equal error probability for transmission (storage) of either or. Suppose we now use repetition coding, While highly simplistic, the BSC serves as a reasonable first-order approximation of Flash. In this example Pe =., Pr(success) = Pe =.99. Decoding rule: Receive {,,, } Decide was sent Receive {,,, } Decide was sent RBER is still...what is UBER? UBER is =.298 This is now 33 times better!...any downsides? The probability of error for any single bit transmitted across the channel is the raw bit error rate, or RBER. In this example, RBER =.. Flash Memory Summit 23 Santa Clara, CA 6 Flash Memory Summit 24, Santa Clara, CA 5 / 58

14 Concepts of interest *"+,-(.&//&( #$%&2$'%( '&-'*&3&%(2$'%( %&#$%&%(.&//&(!"#$%&'( 6$*/7(89""&:( )&#$%&'( 4(5*-/( "(5*-/( "(5*-/( 4(5*-/( A channel code C maps a message m of length k into a codeword c of length n, with n > k (encoder). Total number of codewords: 2 k. Code rate: R = k/n. Structure of C is used to determine the stored message (decoder). Flash Memory Summit 24, Santa Clara, CA 6 / 58

15 Repetition code example Message length k = input message codeword Total number of codewords 2 = 2. Codeword length n = 3. Code rate R = /3. Flash Memory Summit 24, Santa Clara, CA 7 / 58

16 Concepts of interest -ctd. Linear block code C of dimension k and codeword length n can be represented by a k n generator matrix G a (n k) n parity check matrix H G specifies the range space of C and H specifies the null space of C. The two representations are mathematically equivalent. Flash Memory Summit 24, Santa Clara, CA 8 / 58

17 Concepts of interest -ctd. Linear block code C of dimension k and codeword length n can be represented by a k n generator matrix G mg = c a (n k) n parity check matrix H G specifies the range space of C and H specifies the null space of C. The two representations are mathematically equivalent. Flash Memory Summit 24, Santa Clara, CA 8 / 58

18 Concepts of interest -ctd. Linear block code C of dimension k and codeword length n can be represented by a k n generator matrix G mg = c a (n k) n parity check matrix H ch T = G specifies the range space of C and H specifies the null space of C. The two representations are mathematically equivalent. Flash Memory Summit 24, Santa Clara, CA 8 / 58

19 Repetition code example input message codeword Generator matrix Parity check matrix G = [ ] H = [ ] Flash Memory Summit 24, Santa Clara, CA 9 / 58

20 How many errors can you correct? Our toy repetition code corrects error. Flash Memory Summit 24, Santa Clara, CA / 58

21 How many errors can you correct? Our toy repetition code corrects error. In general, k + d n +, where k is the message length, n is the codeword length d is the minimum separation between codewords a.k.a. minimum code distance Code can correct t = (d )/2 errors. Flash Memory Summit 24, Santa Clara, CA / 58

22 Computing UBER For a code with message length k and codeword length n. Exact: UBER = n j=t+ ( n j) RBER j ( RBER) n j k Good approximation for small error values: UBER = ( n t+) RBER t+ ( RBER) n t k Here, ( ) n j is the binomial coefficient n! j!(n j)! Flash Memory Summit 24, Santa Clara, CA / 58

23 Concepts of interest Linear block codes can be divided in two categories: algebraic codes (BCH codes, Hamming codes, Reed-Solomon codes) graph-based codes (LDPC codes, Turbo codes) A good practical channel code should be able to correct as many transmission errors as possible with the least overhead be equipped with a simple decoding algorithm Flash Memory Summit 24, Santa Clara, CA 2 / 58

24 Algebra review BCH codes Algebraic Codes Flash Memory Summit 24, Santa Clara, CA 3 / 58

25 Brief review of finite fields Algebra review BCH codes Suppose q is prime. GF (q) can be viewed as the set {,,..., q }. Operations are performed modulo q. Example: GF (5) has elements {,, 2, 3, 4} such that product sum Flash Memory Summit 24, Santa Clara, CA 4 / 58

26 Brief review of finite fields Algebra review BCH codes GF (q) can also be expressed as {α =, α =, α, α 2,..., α q 2 }, for suitably chosen α. Example: In GF (5): α, α, 2 α, 3 α 3 and 4 α 2 Consider an element α of GF (q) such that α and α. Let s be the smallest positive integer such that α s =. Then, s is the order of α. If s = q, then α is called a primitive element of GF (q). GF (q) is thus generated by powers of a primitive element α. Flash Memory Summit 24, Santa Clara, CA 5 / 58

27 Brief review of finite fields Algebra review BCH codes We are often interested in the extension field GF (q m ) of GF (q), where q is prime and m is a positive integer. GF (q m ) is then {α =, α =, α, α 2,..., α qm }, where α denotes a primitive element of GF (q m ) and is a root of so-called primitive polynomial. Example: GF (8) = GF (2 3 ). Here, α is a root of the polynomial x 3 + x +. We then have α = α = α α 2 = α 2 α 3 = α + α 4 = α 2 + α α 5 = α 2 + α + α 6 = α 2 + α = Flash Memory Summit 24, Santa Clara, CA 6 / 58

28 BCH code construction Algebra review BCH codes BCH code C is a linear, cyclic code described by a (d ) n parity check matrix H with elements from GF (q m ) with α having order n: α b α 2b α (n )b α b+ α 2(b+) α (n )(b+) H =.... α b+d 2 α 2(b+d 2) α (n )(b+d 2) b is any (positive) integer and d is integer 2 d n. Minimum distance of C is at least d. The code corrects at least t = d 2 errors. Flash Memory Summit 24, Santa Clara, CA 7 / 58

29 BCH code construction Algebra review BCH codes If α is a primitive element, then the blocklength is n = q m (largest possible). If b =, BCH code is called narrow-sense (simplifies some encoding and decoding operations). For m =, BCH codes are also known as Reed-Solomon codes. Flash Memory Summit 24, Santa Clara, CA 8 / 58

30 BCH code properties Preliminaries Algebra review BCH codes A code C is called a cyclic code if all cyclic shifts of a codeword in C are also codewords. Example: Suppose (,,,, ) x 3 + x + is a codeword in C. Then so are (,,,, ), (,,,, ), (,,,, ) and (,,,, ). Flash Memory Summit 24, Santa Clara, CA 9 / 58

31 BCH code properties Preliminaries Algebra review BCH codes A code C is called a cyclic code if all cyclic shifts of a codeword in C are also codewords. Example: Suppose (,,,, ) x 3 + x + is a codeword in C. Then so are (,,,, ), (,,,, ), (,,,, ) and (,,,, ). Cyclic code is generated by a generator polynomial g(x), such that each codeword c corresponds to a polynomial p c (x) = m(x)g(x). All rows of the generator matrix G are cyclic shifts of g(x). Flash Memory Summit 24, Santa Clara, CA 9 / 58

32 BCH code properties Preliminaries Algebra review BCH codes A code C is called a cyclic code if all cyclic shifts of a codeword in C are also codewords. Example: Suppose (,,,, ) x 3 + x + is a codeword in C. Then so are (,,,, ), (,,,, ), (,,,, ) and (,,,, ). Cyclic code is generated by a generator polynomial g(x), such that each codeword c corresponds to a polynomial p c (x) = m(x)g(x). All rows of the generator matrix G are cyclic shifts of g(x). BCH code: Each codeword c corresponds to a polynomial p c (x) = m(x)g(x) where g(x) is LCM of (x α b )(x α b+ ) (x α b+d 2 ). Flash Memory Summit 24, Santa Clara, CA 9 / 58

33 BCH code example Preliminaries Algebra review BCH codes Let s construct a narrow-sense BCH code over GF (8) correcting t = error and of length n = 7. We consider a primitive element α that satisfies α 3 + α + =. Notice that α 7 =. Then, [ α α 2 α H = 3 α 4 α 5 α 6 α 2 α 4 α 6 α 8 α α 2 ] Flash Memory Summit 24, Santa Clara, CA 2 / 58

34 BCH code example Preliminaries Algebra review BCH codes Let s construct a narrow-sense BCH code over GF (8) correcting t = error and of length n = 7. We consider a primitive element α that satisfies α 3 + α + =. Notice that α 7 =. Then, [ α α 2 α H = 3 α 4 α 5 α 6 α 2 α 4 α 6 α α 3 α 5 ] Flash Memory Summit 24, Santa Clara, CA 2 / 58

35 BCH code example Preliminaries Algebra review BCH codes We can interpret this code in the binary domain by substituting α α 2 α 3 α 4 α 5 α 6 Flash Memory Summit 24, Santa Clara, CA 2 / 58

36 BCH code example Preliminaries Algebra review BCH codes We can then interpret this parity check matrix in the binary domain as H = Here H is 6 7 and has rank 3. This code can correct error. Flash Memory Summit 24, Santa Clara, CA 22 / 58

37 Decoding BCH codes Preliminaries Algebra review BCH codes Decoding algorithm heavily relies on the algebraic structure of the code: recall that each codeword polynomial c(x) must have as roots α b, α b+,..,α b+d 2. Compute the syndromes of the received polynomial r(x) tells us which of α s are not the roots. 2 Based on the syndromes, compute the locations of the errors (system of linear equations). 3 Compute the error values at these location (system of non-linear equations that are in the Vandermode form) 4 Based on steps 2 and 3, build error polynomial e(x). 5 Add e(x) to r(x) to produce the estimate of c(x). Flash Memory Summit 24, Santa Clara, CA 23 / 58

38 Decoding BCH codes Preliminaries Algebra review BCH codes If the system of equations cannot be solved, declare a decoding failure. This is a hard limit on the number of correctable errors. Implementation can be greatly reduced using the shift-registers viewpoint in the Berlekamp-Massey algorithm. Flash Memory Summit 24, Santa Clara, CA 24 / 58

39 BCH code parameter tradeoffs Algebra review BCH codes For fixed code length and RBER, how does UBER depend on t? Flash Memory Summit 24, Santa Clara, CA 25 / 58

40 BCH code parameter tradeoffs Algebra review BCH codes For fixed code length and RBER, how does UBER depend on t? Flash Memory Summit 24, Santa Clara, CA 26 / 58

41 BCH code parameter tradeoffs Algebra review BCH codes For fixed RBER and t, how does UBER depend on codelength? Flash Memory Summit 24, Santa Clara, CA 27 / 58

42 BCH code parameter tradeoffs Algebra review BCH codes For fixed RBER and t, how does UBER depend on codelength? Flash Memory Summit 24, Santa Clara, CA 28 / 58

43 BCH code parameter tradeoffs Algebra review BCH codes For fixed codelength and t, how does UBER depend on RBER? Flash Memory Summit 24, Santa Clara, CA 29 / 58

44 BCH code parameter tradeoffs Algebra review BCH codes For fixed codelength and t, how does UBER depend on RBER? Flash Memory Summit 24, Santa Clara, CA 3 / 58

45 Algebra review BCH codes Graph-Based Codes Flash Memory Summit 24, Santa Clara, CA 3 / 58

46 Low Density Parity Check (LDPC) Codes Definition : LDPC code An LDPC block code C is a linear block code whose parity-check matrix H has a small number of ones in each row and column. Invented by Gallager in 963 but were all but forgotten until late 99 s. In the limit of very large block-lengths LDPC codes are known to approach the Shannon limit (i.e., the highest rate at which the code can be designed that guarantees reliable communication) LDPC codes are amenable to low-complexity iterative decoding. Flash Memory Summit 24, Santa Clara, CA 32 / 58

47 An Example Preliminaries LDPC code described by the sparse parity check matrix H: H = Matrix H has 9 columns and 6 rows. Flash Memory Summit 24, Santa Clara, CA 33 / 58

48 An Example Preliminaries LDPC code described by the sparse parity check matrix H: H = Matrix H has 9 columns and 6 rows. There are 9 coded bits and 6 parity-check equations. Each coded bit participates l=2 parity-check equations and each parity-check equation contains r = 3 coded bits. Flash Memory Summit 24, Santa Clara, CA 33 / 58

49 LDPC Preliminaries Preliminaries Definition 3: Tanner graph A Tanner graph of a code C with a parity check matrix H is the bipartite graph such that: each coded symbol i is represented by a variable node v i, each parity-check equation j is represented by a check node c j, there exists an edge between a variable node and a check node if and only if H(j, i) =. Flash Memory Summit 24, Santa Clara, CA 34 / 58

50 An Example LDPC code: parity check matrix H and its Tanner graph H = Parity check c 3 : v 3 + v 6 + v 9 over GF (2). Flash Memory Summit 24, Santa Clara, CA 35 / 58

51 An Example LDPC code: parity check matrix H and its Tanner graph H = v v 2 v 3 v 4 v 5 v 6 v 7 v 8 v 9 Parity check c 3 : v 3 + v 6 + v 9 over GF (2). Flash Memory Summit 24, Santa Clara, CA 35 / 58

52 An Example Preliminaries LDPC code: parity check matrix H and its Tanner graph H = c c 2 c 3 c 4 c 5 c 6 v v 2 v 3 v 4 v 5 v 6 v 7 v 8 v 9 Parity check c 3 : v 3 + v 6 + v 9 over GF (2). Flash Memory Summit 24, Santa Clara, CA 35 / 58

53 Message Passing Decoding Message-passing (belief propagation) is an iterative decoding algorithm that operates on the Tanner graph of the code. In each iteration of the algorithm: Flash Memory Summit 24, Santa Clara, CA 36 / 58

54 Message Passing Decoding Message-passing (belief propagation) is an iterative decoding algorithm that operates on the Tanner graph of the code. In each iteration of the algorithm: (bit-to-check) Each variable node sends a message to each check node it is connected to, Flash Memory Summit 24, Santa Clara, CA 36 / 58

55 Message Passing Decoding Message-passing (belief propagation) is an iterative decoding algorithm that operates on the Tanner graph of the code. In each iteration of the algorithm: (bit-to-check) Each variable node sends a message to each check node it is connected to, 2 (check processing) Each check node then computes the consistency of incoming messages, Flash Memory Summit 24, Santa Clara, CA 36 / 58

56 Message Passing Decoding Message-passing (belief propagation) is an iterative decoding algorithm that operates on the Tanner graph of the code. In each iteration of the algorithm: (bit-to-check) Each variable node sends a message to each check node it is connected to, 2 (check processing) Each check node then computes the consistency of incoming messages, 3 (check-to-bit) Each check node then sends a message to each variable node it is connected to, Flash Memory Summit 24, Santa Clara, CA 36 / 58

57 Message Passing Decoding Message-passing (belief propagation) is an iterative decoding algorithm that operates on the Tanner graph of the code. In each iteration of the algorithm: (bit-to-check) Each variable node sends a message to each check node it is connected to, 2 (check processing) Each check node then computes the consistency of incoming messages, 3 (check-to-bit) Each check node then sends a message to each variable node it is connected to, 4 (bit processing) Each variable node (coded symbol) updates its value. Flash Memory Summit 24, Santa Clara, CA 36 / 58

58 Message Passing Decoding Passed messages can be either Hard decisions: or Soft decisions/likelihoods: real numbers Flash Memory Summit 24, Santa Clara, CA 37 / 58

59 An Example Preliminaries *"+,-(.&//&( #$%&2$'%( '&-'*&3&%(2$'%( %&#$%&%(.&//&(!"#$%&'( 7$*/8(9:""&;( )&#$%&'( 4( 4464( 4664( 5( Message m Codeword y y y 2 y 3 y 4 m y y 2 y 3 y 4!! y +y 2 +y 3 = y +y 3 +y 4 = y 2 +y 3 + y 4 = Flash Memory Summit 24, Santa Clara, CA 38 / 58

60 Message Passing Decoding Bit-flipping algorithm Flash Memory Summit 24, Santa Clara, CA 39 / 58

61 Received Codeword Preliminaries y +y 2 +y 3 y +y 3 +y 4 y 2 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 4 / 58

62 Bit-to-Check Messages +y 2 +y 3 +y 3 +y 4 y 2 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 4 / 58

63 Bit-to-Check Messages ++y 3 +y 3 +y 4 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 4 / 58

64 Check Processing Preliminaries ++=?? ++y 4 ++y 4 Flash Memory Summit 24, Santa Clara, CA 42 / 58

65 Check Processing Preliminaries ++=?? ++= ++=?? Flash Memory Summit 24, Santa Clara, CA 42 / 58

66 Check-to-Bit Messages Flip, Flip, Flip, ++=?? ++= ++=?? Flash Memory Summit 24, Santa Clara, CA 43 / 58

67 Check-to-Bit Messages Flip, Stay Flip, Flip, Stay, Stay, ++=?? ++= ++=?? Flash Memory Summit 24, Santa Clara, CA 43 / 58

68 Check-to-Bit Messages Flip, Stay Flip, Flip Flip, Stay, Flip Stay, Flip ++=?? ++= ++=?? Flash Memory Summit 24, Santa Clara, CA 43 / 58

69 Bit Processing Preliminaries Flip, Stay Flip, Flip Flip, Stay, Flip Stay, Flip ++=?? ++= ++=?? Flash Memory Summit 24, Santa Clara, CA 44 / 58

70 Bit Processing Preliminaries y +y 2 +y 3 y +y 3 +y 4 y 2 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 44 / 58

71 Bit-to-Check Messages +y 2 +y 3 +y 3 +y 4 y 2 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 45 / 58

72 Bit-to-Check Messages ++y 3 +y 3 +y 4 +y 3 +y 4 Flash Memory Summit 24, Santa Clara, CA 45 / 58

73 Bit-to-Check Messages ++ = ++y 4 ++y 4 Flash Memory Summit 24, Santa Clara, CA 45 / 58

74 Check Processing Preliminaries ++ = ++ = ++ = Flash Memory Summit 24, Santa Clara, CA 46 / 58

75 Check-to-Bit Messages Stay, Stay, Stay, ++ = ++ = ++ = Flash Memory Summit 24, Santa Clara, CA 47 / 58

76 Check-to-Bit Messages Stay, Stay, Stay, ++ = ++ = ++ = Flash Memory Summit 24, Santa Clara, CA 47 / 58

77 Check-to-Bit Messages Stay, Stay Stay, Stay Stay, Stay, Stay Stay, Stay ++ = ++ = ++ = Flash Memory Summit 24, Santa Clara, CA 48 / 58

78 Bit Processing Preliminaries Decoded Codeword ++ = ++ = ++ = Flash Memory Summit 24, Santa Clara, CA 49 / 58

79 Soft Improved variants of message passing algorithm use soft information as messages, i.e., log-likelihood ratio L = log P(x i = y i ) P(x i = y i ). Sum-product algorithm (SPA) [,2] Min-sum algorithm (MSA) [3] [] R. Gallager, MIT Press, 963. [2] T. Richardson and R. Urbanke, IEEE Trans. on Info. Theory, 2. [3] M. P. C. Fossorier, M. Mihaljevic, and H. Imai, IEEE Trans. on Comm., 999. Flash Memory Summit 24, Santa Clara, CA 5 / 58

80 Soft Improved variants of message passing algorithm use soft information as messages, i.e., log-likelihood ratio L = log P(x i = y i ) P(x i = y i ). Sum-product algorithm (SPA) [,2] bit-to-check L(v i c j ) = j N(i)\j L(c j v i) + L int (v i ) check-to-bit L(c j v i ) = ( Φ i N(j)\i Φ( L(v i c j ) ) i N(j)\i sgn(l(v i c j )) where Φ(x) = log(tanh(x/2)) Min-sum algorithm (MSA) [3] check-to-bit L(c j v i ) = min i N(j)\i L(v i c j ) i N(j)\i sgn(l(v i c j )) [] R. Gallager, MIT Press, 963. [2] T. Richardson and R. Urbanke, IEEE Trans. on Info. Theory, 2. [3] M. P. C. Fossorier, M. Mihaljevic, and H. Imai, IEEE Trans. on Comm., 999. ) Flash Memory Summit 24, Santa Clara, CA 5 / 58

81 Soft Decoding Preliminaries Bit values Flash Memory Summit 24, Santa Clara, CA 5 / 58

82 Soft Decoding Preliminaries Bit values Values using BPSK Flash Memory Summit 24, Santa Clara, CA 5 / 58

83 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Flash Memory Summit 24, Santa Clara, CA 5 / 58

84 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Beliefs (L vi (int ) e y i 2 /2σ2 n L vi = log e y i+ 2 /2σ2 = 2 n 2 σ y i n We assume σ n =. Flash Memory Summit 24, Santa Clara, CA 5 / 58

85 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Beliefs L cj v j = 2 tanh l i v l c j tanh 2 L v l c j Flash Memory Summit 24, Santa Clara, CA 5 / 58

86 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Beliefs L cj v j = 2 tanh l i v l c j tanh 2 L v l c j Flash Memory Summit 24, Santa Clara, CA 5 / 58

87 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Beliefs (int ) L vi = L vi + Lcj v j c j v i Flash Memory Summit 24, Santa Clara, CA 5 / 58

88 Soft Decoding Preliminaries Bit values Values using BPSK Values from channel Beliefs All variable nodes are decoded to correct bit value. Flash Memory Summit 24, Santa Clara, CA 5 / 58

89 Performance with multi read SNR db SNR 2 db SNR 4 db SNR 6 db SNR 8 db Figure: Rate.9 LDPC and BCH codes of length n = 9. Frame Error Rate Frame Error Rate vs. Raw Bit Error Rate (MLC Gaussian Model) Hard BCH Hard (3 reads) Code Hard (3 reads) Code reads MMI Code 6 reads MMI Code 2 Soft Code 2 Soft Code Hard (3 reads) Shannon Limit 6 reads Shannon Limit MMI Soft Shannon Limit.8 Gaussian model of MLC. 8 of size 2q and cenr Gaussians with means Channel Bit Error Probability Fig.. FER vs. channel bit error probability simulation results using the Gaussian channel model for 4-level MLC comparing LDPC Codes and2 with varying levels of soft information and a BCH code with hard decoding. All codes have rate.92. Flash Memory Summit 24, Santa Clara, CA 52 / 58

90 Performance with multi read SNR db SNR 2 db SNR 4 db SNR 6 db SNR 8 db Gaussian model of MLC. 8 of size 2q and cenr Gaussians with means Figure: Rate.9 LDPC and BCH codes of length n = 9. Frame Error Rate Frame Error Rate vs. Raw Bit Error Rate (MLC Gaussian Model) Hard BCH Hard (3 reads) Code Hard (3 reads) Code reads MMI Code 6 reads MMI Code 2 Soft Code 2 Soft Code Hard (3 reads) Shannon Limit 6 reads Shannon Limit MMI Soft Shannon Limit Caution:.8 Channel Bit Error Probability Optimal Fig. code. FERdesign vs. channel inbit the error probability error floor simulation region results using depends the on the Gaussian channel model for 4-level MLC comparing LDPC Codes and2 chosenwith quantization. varying levels of soft information and a BCH code with hard decoding. All codes have rate.92. AWGN-optimized LDPC codes may not be the best for the quantized (and asymmetric) Flash channel! Flash Memory Summit 24, Santa Clara, CA 52 / 58

91 Entries in the parity check matrix H are taken from GF (q). Example: GF (8) =,, 2,..., 7. (with α k k + for k 6) H = v v 2 v 3 v 4 v 5 v 6 v 7 v 8 v 9 c c 2 c 3 c 4 c 5 c 6 Parity check c 3 : 3v 3 + v 6 + v 9 over GF (8). Flash Memory Summit 24, Santa Clara, CA 53 / 58

92 Entries in the parity check matrix H are taken from GF (q). Example: GF (8) =,, 2,..., 7. (with α k k + for k 6) H = v v 2 v 3 v 4 v 5 v 6 v 7 v 8 v 9 c c 2 c 3 c 4 c 5 c 6 Parity check c 3 : 3v 3 + v 6 + v 9 over GF (8). See talk on Thursday: Flash Controller Design (8:3 :5) Flash Memory Summit 24, Santa Clara, CA 53 / 58

93 Performance evaluation Figure: vs. BCH codes performance comparison for AWGN channel. Code rate is.9, block length is bits. BCH code corrects 3 errors..e 2 FER.E 4.E 6.E 8 GF(2) GF(4) GF(8) GF(6) BCH SNR (db) Flash Memory Summit 24, Santa Clara, CA 54 / 58

94 Non-binary LDPC decoding Decoding is more complex than in the binary case. Keep track of q likelihoods on each edge. Popular approaches: Direct implementation has complexity on the order of O(q 2 ) FFT-based SPA has complexity on the order of O(q log q) Min-sum and its variants can further reduce the complexity Flash Memory Summit 24, Santa Clara, CA 55 / 58

95 (BCH) Performance is acceptable + Guaranteed error correction capability + Structure allows for efficient decoder implementation Not amenable for soft decoding (LDPC) + Performance is excellent No guaranteed error correction capability (but we have ideas) Decoder complexity is acceptable but now low + Amenable for soft decoding With the move to MLC/TLC technologies, advanced coding schemes will need to be considered! Flash Memory Summit 24, Santa Clara, CA 56 / 58

96 Further information, papers, references etc. available at Selected list: L. Dolecek, D. Divsalar, Y. Sun and B. Amiri, Non-Binary Protograph-Based LDPC Codes: Enumerators, Analysis, and Designs, IEEE Transactions on Information Theory, vol. 6 (7), pp , July 24 R. Gabrys, E. Yaakobi and L. Dolecek, Graded bit error correcting codes with applications to Flash memory, IEEE Transactions on Information Theory, vol. 59(4), pp , Apr. 23. J. Wang, L. Dolecek and R. Wesel, The Cycle Consistency Matrix Approach to Absorbing Sets in Separable Circulant-Based LDPC Codes, IEEE Transactions on Information Theory, vol. 59(4), pp , Apr. 23. B. Amiri, J. Kliewer, and L. Dolecek, Analysis and Enumeration of Absorbing Sets for Non-Binary Graph-Based Codes, IEEE Transactions on Communications, vol. 62 (2), pp , Feb. 24. Flash Memory Summit 24, Santa Clara, CA 57 / 58

97 We would like to invite you to explore CoDESS: For more information, please contact Prof. Lara Dolecek Flash Memory Summit 24, Santa Clara, CA 58 / 58