Bicycle Generator Dump Load Control Circuit: An Op Amp Comparator with Hysteresis

Transcription

1 Bicycle Generatr Dump Lad Cntrl Circuit: An Op Amp Cmparatr with Hysteresis Sustainable Technlgy Educatin Prject University f Waterl December 1, Summary This dcument describes the dump lad cntrl circuit used by the STEP bike generatr that helps keep the vltage in the main capacitr belw its maximum wrking vltage. 2 General peratin The dump lad cntrl circuit is designed t activate a relay whenever the vltage V in the main capacitr ges abve a certain value, and then de-activates it when the vltage ges belw a certain value. The relay can either be used t turn n a dump lad (t dissipate the excess energy being generated s it des nt further charge the capacitr) r t cmpletely discnnect the capacitr frm the generatrs. It is shwn in Figure 1. The p amp acts as a cmparatr, which switches n (utput vltage ges psitive) when the vltage is t high. It causes current t flw thrugh the transistr, which will activate the relay (the transistr is used because the p amp cannt supply enugh pwer t pen the relay). When the vltage is at a safe level, the relay is de-activated because the p amp utput vltage ges t zer. The vltage at which the relay ges n is higher then the vltage at which it turns ff again. This hysteresis keeps the circuit frm switching t fast in nrmal peratin. The Zener dide prvides a vltage reference fr the cmparatr, while and R 2 frm a vltage divider t divide the capacitr vltage V int a smaller value that can be cmpared by the p amp. The rest f this dcument describes hw t chse the values fr the resistrs t get the right threshlds fr switching. Bike generatr prject page: The bike generatr is als described at: 1

2 Figure 1: Dump lad cntrl circuit. All shwn vltages are measured with respect t the negative terminal f the main capacitr. 3 Math The parts f the circuit f interest can be described by the fllwing equatins. The gal is t find ut which resistr values must be chsen t get the desired value f V at which the dump lad turns n (V OFF ON ) and turns ff (V ON OFF ). In this sectin, all vltage variables are measured with respect t the negative terminal f the main capacitr. Current relatins: Since n current flws int an ideal p amp s inputs: Vltage relatin (with Ohm s Law substituted): Using Ohm s Law n and and substituting Eq. 2: i 1 +i 3 = i 2 (1) i 3 = i 4 (2) V i 1 V 2 = 0 (3) V V + = i 3 (4) V + V 2 = i 3 (5) Equating Eq. 4 and 5 and slving fr V + yields: V + = + V + + V 2 (6) Fr the p amp, when the term V + is greater than V, the utput V is psitive (very nearly the maximum pssible vltage f the p amp, which is the supply vltage; fr the 2

3 LM358 being used, the supply vltage is V). When V + is less than V, then the utput is as lw as pssible (0V fr the LM358). V is the vltage regulated by the Zener dide. Frm Eq. 1 and 4 and with Ohm s Law fr R 2 (i 2 = V 2 R 2 ): i 1 + V V + = V 2 R 2 (7) Substituting Eq. 6 and slving fr i 1 : i 1 = V 2 ( )+V ( R 2 + ( + ) 1 ) (8) Substituting Eq. 8 int Eq. 3 yields: Slving fr V 2 : V V 2 ( ) V ( R 2 + ( + ) 1 ) = 0 (9) V 2 = V V ( R4 + 1) ( 1 R ) Substitute Eq. 10 int Eq. 6: (10) V + = V + R R 4 V V 1 ( R4 + 1) + + ( 1 R (11) ) Nw that V + is knwn in terms f V and V, it is pssible t calculate the V that will cause the cmparatr t switch states. The state switch happens when the value f V + crsses the value f V, which is held at the Zener vltage reference value f V ref. 3.1 Threshld frm dump lad OFF state t ON state When V + ges frm just belw V = V ref t just abve it, V = 0V initially. Hence, the threshld is calculated frm substituting V = 0V and V + = V ref int Eq. 11 and slving fr V (which is V OFF ON, the vltage at which the dump lad turns n): V OFF ON = + R1( )V ref (12) R Threshld frm dump lad ON state t OFF state When V + ges frm just abve V = V ref t just belw it, V = V MAX initially, where is the maximum vltage utput f the p amp. Hence, the threshld is calculated V MAX frm substituting V = V MAX V ON OFF, the vltage at which the dump lad turns ff): and V + = V ref int Eq. 11 and slving fr V (which is nw V ON OFF = V ref ( + )+V MAX ( 1 + ( R 2 + ( ) R ) ) (13)

4 In the abve, V MAX is the maximum vltage the p amp can utput. This is determined by the p amp itself as well as the supply vltage. Befre building the circuit, it is hard t tell what it is. Instead f setting V = V MAX, the maximum utput vltage f the p amp can be assumed t be the supply vltage, such that V = V. In this case, a slightly different expressin results by substituting V = V and V + = V ref int Eq. 11 and slving fr V: V ON OFF = +( ( R 2 + V ref ( + ) ) )(1 ( + 1)) Eq. 14 can be used t predict the apprximate value f V ON OFF fr the circuit based n a given set f resistr values. The resistr values are chsen using a simple prgram that tests a cmbinatin f resistr values until the desired V OFF ON and V ON OFF is achieved. Further refinements can be made experimentally. 4 Sizing the Zener dide resistr When V is higher than the Zener dide reverse vltage, the Zener vltage will be V ref. The current thrugh it must be limited by the resistr, and the resistr must be able t handle the pwer dissipated by the current, therwise it verheats. The current is as fllws: (14) i 5 = V V ref R 5 (15) The i 5 must be limited t an apprpriate value based n the dide, and the resistr must handle the pwer dissipated by i 5 (P = i 5 2 R 5 ). 5 Example Circuit A wrking circuit was built accrding t the abve calculatins and resistr availability. TheparametersfrthewrkingcircuitareshwninTable1. Table2shwsthecalculated and measured threshlds fr the wrking circuit. The difference between calculated and actual values might be due t: resistr tlerances, V MAX (the measured V MAX nt being the supply vltage = 9.2V), the Zener reference having a slightly different value, etc. 4

5 Parameter Value 380 KΩ R KΩ 1 MΩ 10 MΩ R Ω Zener Vltage (V ref ) 6.8 V Table 1: Values fr the wrking circuit Parameter Calculated Actual V OFF ON 13.8 V V V ON OFF 11.3 V V Table 2: Values fr the wrking circuit 5