Real-Time Systems. Lecture 15: The Universality Problem for TBA Dr. Bernd Westphal. Albert-Ludwigs-Universität Freiburg, Germany

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1 Real-Time Systems Lecture 15: The Universality Problem for TBA main Dr. Bernd Westphal Albert-Ludwigs-Universität Freiburg, Germany

2 Contents & Goals Last Lecture: Extended Timed Automata This Lecture: Educational Objectives: Capabilities for following tasks/questions. What s a TBA and what s the difference to (extended) TA? What s undecidable for timed (Büchi) automata? What s the idea of the proof? Sprelim Content: Uppaal Query Language Timed Büchi Automata and timed regular languages [Alur and Dill, 1994]. The Universality Problem is undecidable for TBA [Alur and Dill, 1994] Why this is unfortunate. Timed regular languages are not everything. 2/41

3 The Logic of Uppaal 3/ main

4 The Uppaal Fragment of Timed Computation Tree Logic Consider N = C(A 1,...,A n ) over data variables V. basic formula: atom ::= A i.l ϕ where l L i is a location and ϕ a constraint over X i and V. configuration formulae: term ::= atom term term 1 term 2 existential path formulae: ( exists finally, exists globally ) e-formula ::= term term universal path formulae: ( always finally, always globally, leads to ) Sutl formulae: a-formula ::= term term term 1 term 2 F ::= e-formula a-formula 4/41

5 Configurations at Time t Recall: computation path (or path) starting in l 0, ν 0, t 0 : ξ = λ l 0, ν 0, t 1 0 λ l1, ν 1, t 2 1 λ l2, ν 2, t which is infinite or maximally finite. Given ξ and t Time, we use ξ(t) to denote the set { l, ν i N 0 : t i t t i+1 l = l i ν = ν i + t t i }. of configurations at time t. Why is it a set? Can it be empty? Sutl 5/41

6 Satisfaction of Uppaal-Logic by Configurations We define a satisfaction relation l 0, ν 0, t 0 = F between time stamped configurations l 0, ν 0, t 0 of a network C(A 1,...,A n ) and formulae F of the Uppaal logic. It is defined inductively as follows: l 0, ν 0, t 0 = A i.l l 0, ν 0, t 0 = ϕ iff l 0,i = l iff ν 0 = ϕ Sutl l 0, ν 0, t 0 = term iff l 0, ν 0, t 0 = term l 0, ν 0, t 0 = term 1 term 2 iff l 0, ν 0, t 0 = term i, i = 1, 2 6/41

7 Satisfaction of Uppaal-Logic by Configurations Exists finally: l 0, ν 0, t 0 = term iff path ξ of N starting in l 0, ν 0, t 0 t Time, l, ν Conf : t 0 t l, ν ξ(t) l, ν, t = term Example: ϕ l 0, ν 0, t 0 ϕ λ 1 λ Sutl. ϕ ϕ λ 1,1 λ 2,1 λ 2,2 ϕ ϕ. λ 2,2,1 λ 2,2,2. l, ν, t ϕ ϕ ϕ. 7/41

8 Satisfaction of Uppaal-Logic by Configurations Exists globally: l 0, ν 0, t 0 = term iff path ξ of N starting in l 0, ν 0, t 0 t Time, l, ν Conf : t 0 t l, ν ξ(t) = l, ν, t = term Example: ϕ l 0, ν 0, t 0 ϕ λ 1 λ Sutl. ϕ ϕ λ 1,1 λ 2,1 λ 2,2 ϕ ϕ. l, ν, t ϕ λ 2,2,1 λ 2,2,2.. ϕ ϕ... 8/41

9 Satisfaction of Uppaal-Logic by Configurations Always finally: l 0, ν 0, t 0 = term iff l 0, ν 0, t 0 = term Always globally: l 0, ν 0, t 0 = term iff l 0, ν 0, t 0 = term Sutl 9/41

10 Satisfaction of Uppaal-Logic by Configurations Leads to: l 0, ν 0, t 0 = term 1 term 2 iff path ξ of N starting in l 0, ν 0, t 0 t Time, l, ν Conf : t 0 t l, ν ξ(t) l, ν, t = term 1 implies l, ν, t = term 2 Example: ϕ 1 ϕ 2 l 0, ν 0, t 0 ϕ 1, ϕ 2 λ 1 λ 2 ϕ 2 l, ν, t ϕ 2 λ 1,1 λ 2,1 λ 2, Sutl λ 1,1,1. ϕ 2 ϕ 2. ϕ 1, ϕ 2 λ 2,2,1 λ 2,2,2 ϕ 2 ϕ 2 ϕ /41

11 Satisfaction of Uppaal-Logic by Networks We write if and only if N = e-formula for some l 0, ν 0 C ini, l 0, ν 0, 0 = e-formula, (1) and if and only if N = a-formula for all l 0, ν 0 C ini, l 0, ν 0, 0 = a-formula, (2) where C ini are the initial configurations of T e (N) Sutl If C ini =, (1) is a contradiction and (2) is a tautology. If C ini, then N = F if and only if l ini, ν ini, 0 = F. 11/41

12 Example press? press? off light bright x := 0 press? x > 3 press? x Sutl 12/41

13 Example τ τ x := 0 τ x 3 off light bright τ x > 3 12/ Sutl

14 Example τ τ x := 0 τ x 3 off light bright τ x > Sutl N = L.bright? N = L.bright? N = L.off? N = L.light? N = L.bright = x 3? N = L.bright L.off? 12/41

15 Timed Büchi Automata [Alur and Dill, 1994] main 13/41

16 ... vs. Timed Automata press? s a 0 s 2 x := 0 b a a, x := 0 b, x < 2 off press? press? light x := 0 x 3 bright press? x > 3 s 1 s 3 New: Given a timed word (a, 1), (b, 2),(a, 3),(b, 4), (a, 5),(b, 6),..., does A accept it? Stba ξ = off, 0,0 1 off, 1,1 press? light, 0,1 3 light,3, 4 press? bright, 3, ξ is a computation path and run of A. New: acceptance criterion is visiting accepting state infinitely often. 14/41

17 Timed Languages Definition. A time sequence τ = τ 1,τ 2,... is an infinite sequence of time values τ i R + 0, satisfying the following constraints: (i) Monotonicity: τ increases strictly monotonically, i.e. τ i < τ i+1 for all i 1. (ii) Progress: For every t R + 0, there is some i 1 such that τ i > t. Definition. A timed word over an alphabet Σ is a pair (σ, τ) where σ = σ 1,σ 2, Σ ω is an infinite word over Σ, and τ is a time sequence Stba Definition. A timed language over an alphabet Σ is a set of timed words over Σ. 15/41

18 Example: Timed Language Timed word over alphabet Σ: a pair (σ, τ) where σ = σ 1, σ 2,... is an infinite word over Σ, and τ is a time sequence (strictly (!) monotonic, non-zeno). L crt = {((ab) ω, τ) i j i : (τ 2j < τ 2j 1 + 2)} Stba 16/41

19 Timed Büchi Automata Definition. inductively by The set Φ(X) of clock constraints over X is defined δ ::= x c c x δ δ 1 δ 2 where x X and c Q is a rational constant Stba Definition. A timed Büchi automaton (TBA) A is a tuple (Σ, S, S 0, X,E, F), where Σ is an alphabet, S is a finite set of states, S 0 S is a set of start states, X is a finite set of clocks, and E S S Σ 2 X Φ(X) gives the set of transitions. An edge (s, s, a, λ,δ) represents a transition from state s to state s on input symbol a. The set λ X gives the clocks to be reset with this transition, and δ is a clock constraint over X. F S is a set of accepting states. 17/41

20 Example: TBA A = (Σ, S, S 0, X, E, F) (s, s, a, λ, δ) E b s 1 s 0 s 2 s 3 a a x := 0 b, x < 2 a, x := Stba 18/41

21 References 40/ main

22 References [Alur and Dill, 1994] Alur, R. and Dill, D. L. (1994). A theory of timed automata. Theoretical Computer Science, 126(2): [Olderog and Dierks, 2008] Olderog, E.-R. and Dierks, H. (2008). Real-Time Systems - Formal Specification and Automatic Verification. Cambridge University Press main 41/41