EEC 483 Computer Organization

Transcription

1 EEC 8 Compuer Orgaizaio Chaper. Overview of Pipeliig Chau Yu Laudry Example Laudry Example A, Bria, Cahy, Dave each have oe load of clohe o wah, dry, ad fold Waher ake 0 miue A B C D Dryer ake 0 miue Folder ake 0 miue Saher ake 0 miue o pu clohe io drawer

2 Sequeial Laudry PM AM A Time B C D Sequeial laudry ake 8 hour for load If hey leared pipeliig, how log would laudry ake? Faer Laudry - Pipeliig AM PM A B C D Time Faer laudry ake. hour for load!

3 Breakig dow a irucio ISA defiiio of arihmeic: Reg[Memory[PC][:]] <= Reg[Memory[PC][:]] op Reg[Memory[PC][0:]] Could break dow o: IR <= Memory[PC] A <= Reg[IR[:]] B <= Reg[IR[0:]] Ou <= A op B Reg[IR[0:]] <= Ou We forgo a impora par of he defiiio of arihmeic! PC <= PC + Compario Read Wrie regier operaio regier ($0, $) (add) ($0) Read Wrie regier operaio regier ($0, $) (add) ($0)

4 Five Execuio Sep Fech Decode ad Regier Fech Execuio, Memory Addre Compuaio, or Brach Compleio Memory Acce or R-ype irucio compleio Memory- compleio ep INSTRUCTIONS TAKE FROM - CYCLES! 7 Sep : Fech Ue PC o ge irucio ad pu i i he Regier. Icreme he PC by ad pu he reul back i he PC. Ca be decribed uccicly uig RTL "Regier-Trafer Laguage" IR = Memory[PC]; PC = PC + ; For which kid of irucio? Ca we figure ou he value of he corol igal? Wha i he advaage of updaig he PC ow? will be buy calculaig omehig ele i oher cycle 8

5 Sep : Decode ad Regier Fech Read regier r ad r i cae we eed hem Compue he brach addre i cae he irucio i a brach RTL: For which kid of irucio? A = Reg[IR[-]]; B = Reg[IR[0-]]; Ou = PC + (ig-exed(ir[-0]) << ); We are' eig ay corol lie baed o he irucio ype (we are buy "decodig" i i our corol logic) 9 Sep (irucio depede) i performig oe of hree fucio, baed o irucio ype Memory Referece: Ou = A + ig-exed(ir[-0]); R-ype: Ou = A op B; For which kid of irucio? Brach: if (A==B) PC = Ou; 0

6 Sep : R-ype Compleio or Memory Acce Load ad ore acce memory MDR = Memory[Ou]; or Memory[Ou] = B; For which kid of irucio? R-ype irucio fiih Reg[IR[-]] = Ou; The wrie acually ake place a he ed of he cycle o he edge Sep : Memory Read Compleio Reg[IR[0-]]= MDR; Wha abou all he oher irucio? Which operaio do we eed? Se MemoReg o Aer RegWrie igal Se RegD o 0 For which kid of irucio? I. : r I. : rd Daa memory RegD m u x m u x MemoReg Read regier Read regier Regier Wrie regier Wrie daa Read daa Read daa RegWrie

7 Summary: clock Sep ame decode/regier Acio for R-ype irucio Acio for memory-referece Acio for irucio brache IR = Memory[PC] PC = PC + A = Reg [IR[-]] B = Reg [IR[0-]] Ou = PC + (ig-exed (IR[-0]) << ) Acio for jump Execuio, addre Ou = A op B Ou = A + ig-exed if (A ==B) he PC = PC [-8] II compuaio, brach/ (IR[-0]) PC = Ou (IR[-0]<<) jump compleio Memory acce or R-ype Reg [IR[-]] = Load: MDR = Memory[Ou] compleio Ou or Sore: Memory [Ou] = B Memory compleio Load: Reg[IR[0-]] = MDR Execuio ime for add add $8, $7, $ op r r rd ham fuc operaio biver carryi Regier file Regier file : Regier : operaio : Regier wrie : Toal : Regier file (Regier wrie required) 7

8 Execuio ime for load lw $, 00($) op r r bi offe operaio biver carryi Regier file Memory : Regier : operaio : Memory : Regier wrie : Toal : 8 Regier file Sage i MIPS operaio wrie operaio add Memory operaio wrie wrie load add operaio Memory operaio wrie Memory operaio add wrie Memory load wrie Wha chaged? add 8

9 Speedup Improve performace by icreaig irucio hroughpu Program execuio order Time (i irucio) lw $, 00($0) Daa Reg Reg acce lw $, 00($0) 8 Reg Daa acce Reg lw $, 00($0) 8 Program execuio 8 0 Time order (i irucio) Daa lw $, 00($0) Reg Reg acce Daa lw $, 00($0) Reg Reg acce Daa lw $, 00($0) Reg Reg acce 8... Ideal peedup i equal o wha? Do we achieve hi? 7 Sage Legh Clock cycle Each of age ake he imilar amou of ime Ad i mu be mall a much a poible Wha make i eay all irucio are he ame legh ju a few irucio forma 8 9

10 Sage Legh Sage may require differe amou of ime Clock cycle ime = maximum legh of ay age. i o c u r I Why we ca wrie & he ame regier value i he ame cycle. Wrie durig half, durig d half Time Sep (Clock Cycle) 9 Leo from Pipelied Laudry PM Time A B C D Pipeliig doe help laecy of igle ak, i help hroughpu of eire workload Poeial peedup = Number pipe age Pipelie rae limied by lowe pipelie age Ubalaced legh of pipe age reduce peedup Time o fill pipelie ad ime o drai i reduce peedup Muliple ak operaig imulaeouly uig differe reource ay depedecie, ay coflic??? 0 0

11 Ca pipeliig ge u io rouble? If ay wo age ue he ame reource, here mu be a coflic. i o c u r I Time Sep (Clock Cycle) Hazard Hazard = whe a irucio age i uable o execue durig he curre cycle. Ca alway reolve hazard by waiig pipelie corol mu deec he hazard ake acio (or delay acio) o reolve hazard # age uable o coiue. i o c u r I Sall Time Sep (Clock Cycle)

12 Hazard Reource coflic A ay mome, pipelie age are all acive doig omehig bu wih differe irucio A reource i each age mu o be ued for oher age Wha make i eay memory operad appear oly i load ad ore Wha make i hard rucural hazard: uppoe we had oly oe memory (<= we aly remove hi ype of hazard) corol hazard: eed o worry abou brach irucio daa hazard: a irucio deped o a previou irucio Srucural Hazard A eeded fucioal ui i buy execuig a previou irucio (Aemp o ue he ame reource wo differe way a he ame ime) Example: Our ample MIPS pipelie ha oe. Wha if PC+ compuaio ued mai iead of eparae adder? i o c u r I Sall Sall Time Sep (Clock Cycle)

13 Reource ued i Sage Sage Fech () Decode/Regier Fech () Execue, Addre compuaio, Brach/Jump compleio () Memory acce or R-ype compleio () Memory compleio () Regier File Memory Now, wha are he problem? Ad wha are he oluio? Reource Coflic Sep ame decode/regier Acio for R-ype irucio Acio for memory-referece Acio for irucio brache IR = Memory[PC] PC = PC + A = Reg [IR[-]] B = Reg [IR[0-]] Ou = PC + (ig-exed (IR[-0]) << ) Acio for jump Execuio, addre Ou = A op B Ou = A + ig-exed if (A ==B) he PC = PC [-8] II compuaio, brach/ (IR[-0]) PC = Ou (IR[-0]<<) jump compleio Memory acce or R-ype Reg [IR[-]] = Load: MDR = Memory[Ou] compleio Ou or Sore: Memory [Ou] = B Memory compleio Load: Reg[IR[0-]] = MDR coflic Memory coflic Regier file coflic ( or wrie)

14 Corol Hazard i o c u r I While execuig a previou brach, ex irucio addre migh o ye be kow. (aemp o make a deciio before codiio i evaluaed) Codiioal brach Brach arge Calculae PC+. Sall Compue brach arge addre. Sall Perform brach e & e PC o arge. Time Sep (Clock Cycle) Daa Hazard Needed daa ill beig compued by previou irucio. (aemp o ue iem before i i y) add $,$,$ w $,0($) lw $,0($) Sall Sall add $7,$,$ Sall Sall Time Sep (Clock Cycle) 8