The Application and Evaluation of Banker s Algorithm for Deadlock-Free Buffer Space Allocation in Flexible Manufacturing Systems
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1 The International Journal of Flexible Manufacturing Systems, 10 (1998): c 1998 Kluwer Academic Publishers, Boston. Manufactured in The Netherlands. The Application and Evaluation of Banker s Algorithm for Deadlock-Free Buffer Space Allocation in Flexible Manufacturing Systems MARK LAWLEY School of Industrial Engineering, Purdue University, West Lafayette, Indiana SPYROS REVELIOTIS School of Industrial and Systems Engineering, Georgia Institute of Technology, Atlanta PLACID FERREIRA Department of Mechanical and Industrial Engineering, University of Illinois at Urbana Champaign Abstract. Deadlock-free operation is essential for operating highly automated manufacturing systems. The seminal deadlock avoidance procedure, Banker s algorithm, was developed for computer operating systems, an environment where very little information regarding the future resource requirements of executing processes is known. Manufacturing researchers have tended to dismiss Banker s algorithm as too conservative in the manufacturing environment where future resource requirements are well defined by part routes. In this work, we investigate this issue by developing variants of Banker s algorithm applicable to buffer space allocation in flexible manufacturing. We show that these algorithms are not overly conservative and that, indeed, Banker s approach can provide very good operational flexibility when properly applied to the manufacturing environment. Key Words: Banker s algorithm, deadlock, flexible manufacturing, manufacturing system control 1. Introduction Deadlock-free operation is an important operational requirement in flexible manufacturing systems (FMSs). In general, deadlock is the situation in which there exists a set of concurrent processes with each process in the set awaiting an event that can be caused only by another process in the set (Silbershatz and Peterson, 1991). A ubiquitous problem in discrete event systems, deadlock results from various aspects of systems operations, such as resource allocation and communications (Holt, 1972). In an FMS, deadlock is caused by imprudent allocation of buffer space, tooling, and material handling equipment (Cho, Kumaran, and Wysk, 1995). The FMS controller, therefore, must incorporate some strategy for handling deadlocks; otherwise continuing system operation cannot be guaranteed. The deadlock phenomenon has been studied extensively in computer operating systems (Haberman, 1969; Shoshani and Coffman, 1970; Coffman, Elphick, and Shoshani, 1971; Holt, 1972). In these systems, executing processes compete for computing resources such as I/O channels, disk space, and memory. The operating system s objective is to allocate these resources so that all processes eventually acquire required resources and terminate
2 74 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA successfully. Very little information regarding how processes request resources can be assumed; that is, when a process enters the system, the operating system knows very little about the ensemble of resource requests that the process eventually will make. Fortunately, it is valid to assume that resource requirements are bounded. The seminal deadlock avoidance algorithm for these systems, Banker s algorithm (Haberman, 1969), assumes that, as each process enters the system, it declares the maximum number of each resource that it might ever require at one time. It further assumes that, if a process is simultaneously allocated its stated maximum of each resource, then the process will terminate without additional requests and release all of its allocated resources. These resources then become available for allocation to other processes. Banker s algorithm avoids deadlocks by allowing an allocation if the processes can be ordered so that the maximal resource needs of the ith process, P i, can be met by pooling available resources with those allocated to processes P 1, P 2,...,P i. The order defines a sequence in which all processes in the system can be terminated successfully; that is, the maximal needs of P 1 can be met by pooling available resources with those already held by P 1, the maximal needs of P 2 can be met by pooling available resources with those held by P 1 and P 2, and so forth. As a result, Banker s algorithm is very conservative, because it assumes that all processes simultaneously require their stated maximums. Clearly, processes might not require their stated maximums or might not again require resources already requested, allocated, and released. On the other hand, testing for an order on executing processes is of polynomial complexity (Shoshani and Coffman, 1970), an indispensable requirement for real-time control applications. In contrast to computer operating systems, a part in an FMS visits a predictable sequence of machines for processing, the part route. At each machine, the part requires a certain set of resources (buffer space, cutting tools, etc.) to complete its processing before moving on to the next machine. The following taxonomy of resource allocation in manufacturing establishes the structure of part requests in the FMS: Single unit RAS (SU-RAS). At each step of its processing, a part requires a single unit of a single resources type. The SU-RAS applies when the only relevant resource is the buffering capacity of FMS equipment. Single type RAS (ST-RAS). At each step of its processing, a part requires several units of a single resource type. The ST-RAS applies when the only relevant resource is buffering capacity, and parts are batched into tightly coupled groups that have varying buffer capacity requirements. Conjunctive RAS (AND-RAS). At each step of its processing, a part requires several units of each resource type from a set of resource types. The AND-RAS applies when combining buffer capacity allocation, as described already, with tool and fixturing requirements. Conjunctive/disjunctive RAS (AND/OR-RAS). At each step of its processing, a part makes a set of AND type requests, the allocation of any one of which will suffice. The AND/OR RAS applies when buffer capacity and tooling are allocated in an environment that supports dynamic routing flexibility. Almost all manufacturing-related deadlock literature deals with the allocation of buffer capacity under SU-RAS classification of the taxonomy (see Lawley, Reveliotis, and Ferreira,
3 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM a, for a literature review), where buffer capacity is assumed to be the total number of physical locations at a machine or material handling device where a part can sit or be held. This includes space for part staging as well as machine processing locations. The following assumptions prevail: (1) the FMS is composed of a set of machines and an interconnecting material handling system that supports the production of a set of part types (throughout the remainder of the paper, machines and material handling devices will be referred to collectively as the system resources), (2) each resource possesses a finite amount of buffer capacity, and (3) at each stage of its processing route, a part requires a single unit of buffer capacity on the required resource. To visit a resource, a part first requests a single unit of that resource s buffer capacity. It then waits at its currently held unit of buffer capacity until the system controller grants the request. The part then releases the unit and proceeds to the next resource. The system deadlocks when, there is a set of parts, such that each part in the set has requested and is awaiting buffer capacity occupied by another part in the set. The system controller must allocate resource buffer capacity so that all parts in the system are able to visit required resources and terminate normally. Because of the additional structure in FMS buffer capacity allocation as opposed to process requests in computer operating systems, manufacturing researchers have tended to dismiss earlier operating systems work, particularly Banker s algorithm. For example, in their seminal paper, Banasak and Krogh (1990) say, Dijkstra s Banker s algorithm and its generalizations for deadlock avoidance are too restrictive when applied to an FMS... Banker s algorithm assumes nothing about the order in which resources will be requested and released. Wysk, Yang, and Joshi (1991) give a similar argument: Although techniques have been developed to handle deadlocks in computer engineering applications, sufficient differences exist to prevent direct application to manufacturing systems. Leung and Sheen (1993), D Souza and Khator (1994), Hsieh and Chang (1994), Fanti, Maione, Mascolo, and Turchiano (1996), and Reveliotis and Ferreira (1996) repeat the same contention. Indeed, complete knowledge of future requests assumed in manufacturing does render the optimal resource allocation policy computable: a part is allocated capacity at its next resource if and only if, after the allocation, there exists a sequence in which all parts can visit required resources and terminate successfully. Unfortunately, the optimal policy is NP-complete for the SU-RAS (Araki, Sugiyama, Kasami, and Okui, 1977). This carries two related implications: (1) the optimal policy cannot be used in real-time control because it might not return an answer in the required time frame, and (2) tractable resource allocation mechanisms intended to avoid deadlocks generally will be suboptimal; that is, they will prevent some allocations that could be made. Given the requirement for computational tractability, it is not clear that Banker s algorithm (using proper assumptions) is unduly conservative for FMS buffer capacity allocation. Our objective is to present variants of Banker s algorithm specialized for the FMS and report results on their operational flexibility. In Section 2, we review basic concepts of deadlock avoidance in flexible manufacturing. In Section 3, we introduce the concepts of ordered and partially ordered allocation states and show that constraining system operation to these states leads to tractable deadlock avoidance. We then develop modified versions of Banker s algorithm for detecting these states. In Section 4, we introduce a partition on the safe allocation state space that allows
4 76 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA us to move outside the region of allocation states admitted by Banker s algorithm. The structure of this partition allows us to guarantee incremental increases in the number of admissible states through controlled increases in computational effort. In Section 5, we evaluate the operational flexibility of these algorithms by estimating the coverage of the safe state space for a number of randomly generated FMSs. Furthermore, we discuss theoretical relationships between Banker s algorithm and recent deadlock avoidance policy (DAP) techniques developed for manufacturing. In Section 6, we conclude by discussing some interesting directions for future research. 2. Deadlock avoidance in flexible manufacturing systems In this section, we define the deadlock avoidance problem as it arises in the FMS context. We use the SU-RAS to model allocation of resource buffer capacity (where resources are assumed to be machines or material handling devices). We begin by developing sufficient formalism to describe relevant FMS features. In the following notation, we use the convention that bold symbols represent sets, possibly ordered, and plain symbols represent nondivisible entities. Further, we say that, if ϒ is a set of objects, then ϒ is the number of objects in the set. Table 1 provides a summary of selected notation. Let R represent the set of FMS resources, where C j and O j are the respective total and occupied units of buffer capacity at R j R. As previously stated, C j is the number of locations at R j where a part can be physically located. This includes part staging as well as machine processing locations. Let P be the set of part types produced with each P k P represented as an ordered tuple of processing stages. For example, part type k is represented as P k = P k1,p k2,...,p k Pk where P km represents the mth processing stage of P k. Let the route of P k be the sequence of resources required to completely process one part of type P k. We assume that the route is prespecified in the process plan of the part type. Let RT k = R fk (1),R fk (2),...,R fk ( P k ) represent the route of P k where the stage P km requires a single unit of buffer capacity at the resource R fk (m); that is, f k (m) returns the resource number required for the mth processing step of P k. Let ξ j ={P km : f k (m) = j k = 1,..., P and m = 1,..., P k } represent the set of all part stages that require R j. Finally, let RT km = R fk (m+1),...,r fk ( P k ) be the remaining route of P km. We use the symbol π km to represent a currently executing part of type k in its mth stage of processing; that is, we can think of π km as an instantiation of P km. Note that several instances of π km might be in the system at any given time. Let π km denote the number of currently processing instances of π km. The buffer allocation state of an FMS describes the current allocation of resource buffer capacity to parts in the system and is defined as follows. Definition 1. The buffer allocation state, S, of an FMS is a nonnegative integer vector of the form S = π km,k = 1... P,m =1... P k T, where P km ξ j π km C j, R j R. The dimension of S is the cumulative route length, CRL = P k=1 RT k.
5 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 77 Table 1. Selected notation. b(x, n, p) Binomial distribution with parameters n and p C i Buffer capacity of resource i DAP Deadline avoidance policy E Set of all FMS state transitions E admit Set of all state transitions between states admitted by a DAP E c Set all state transitions of set E, each reversed in sense f k ( j) jth machine of the route of part type k G State space digraph G admit Subdigraph induced by a DAP G c Cospace of G h Total ordering on parts that defines the sequence in which parts can be finished h(x, N, n, k) Hypergeometric distribution with parameters N, n, and k O Approximate number of steps to perform a computation O j Number of occupied units of buffer capacity at resource j p True proportion of safe state space admitted by a DAP; that is, V admit / V safe P Set of part types produced by FMS P k Part type k P km mth stage of part type k R Set of FMS resources RT k Route of part type k S FMS state vector S E Empty state S + Set of part type stages represented by parts in system s + Subset of part type stages that can be ordered V Set of all FMS states V a Subset of sampled states admitted by a DAP V admit Set of all states accepted by a DAP V m Set of V m ordered states V o Set of all ordered states V R Set of all states reachable from the empty state using transitions in set E V Ro V safe V UR V unsafe V sample ξ i π km ρ Set of all ordered states reachable from the empty state along paths confined to V o Set of all states from which the FMS can be emptied using transitions in set E Set of all states unreachable from the empty state using transitions in set E Set of all states from which the FMS cannot be emptied using transitions in set E Sample of FMS states Set of part stages processed by resource i Part of type k in its mth stage of processing Point estimator of p
6 78 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA The state vector describes the current allocation of buffer capacity along with the current stage of processing for all parts in the FMS. We assume that the FMS changes state in one of three ways: (1) a new part is loaded into the system, (2) some part already in the system is advanced one step in its route, or (3) a finished part leaves the system. We let S + ={P km : π km 1inS}be the set of stages represented by parts processing in the system in state S. Define p : {1, 2,..., S + } S + to be an indexing function on S + that is, p(i) = P km is the ith member of S +. Because p is one to one, p 1 (P km ) returns the index of P km S +. The FMS state space is the set of all possible allocation states augmented with state transition information. This space is conveniently represented by a directed graph, G = (V, E), where vertices represent states and directed edges represent state transitions. A directed edge S u, S v is present if and only if the single step advancement of one part in S u results in S v. To clarify the state space concept, consider the small FMS of figure 1, which consists of two part types, P 1 and P 2, with RT 1 = R 1,R 2 and RT 2 = R 2,R 1. (Boxes and circles represent resources and resource capacity, respectively.) The digraph denotes all possible Figure 1. Example of FMS state space.
7 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 79 Figure 2. FMS state space partitions. buffer allocation states for this system as well as all possible state transitions that result from loading, advancing, and finishing parts. We distinguish the empty state, S E, because it is the initial and, we hope, the final state of any successful production run. In general, V can be partitioned based on reachability from the empty state (where a state is reachable from S E if and only if a sequence of state transitions leads from S E to that state) and safeness (where a state is safe if and only if a sequence of state transitions leads back to S E ). These partitions are defined inductively in Definition 2 and summarized in figure 2. Definition 2. Let V R and V safe represent the set of reachable and safe states respectively. Then, (1) S E V R V safe, (2) S u V R S u,s v E S v V R, (3) S v V safe S u, S v E S u V safe, (4) S u V R S u V UR, and (5) S u V safe S u V unsafe. In figure 1, for example, all states are safe except S 4 (a reachable deadlock). All states are reachable except S 8 (an unreachable safe state). Clearly, for normal system operation, we are interested in states that are both reachable and safe. In graph theoretic terms, these states constitute a strongly connected region of the state space digraph; that is, the region V safe V R. Note that this is the reachable admissible region of the optimal policy (as given in the introduction). As previously noted, however, this policy typically requires super-polynomial computation and therefore, is not suitable for real-time control. Hence, the objective of any practical deadlock avoidance policy is to constrain FMS operation to a strongly connected subregion of V safe V R that contains S E and to do so in a computationally efficient manner (see Lawley et al., 1997a; Reveliotis and Ferreira, 1996). We characterize this class of DAPs as correct and scalable. In Section 3, we discuss such a strongly connected subregion of V safe V R that can be identified by a polynomial algorithm. 3. Applying Banker s algorithm to the FMS In this section we introduce the set of ordered allocation states along with a Banker s algorithm that detects them in polynomial time. We then relax the requirement for total
8 80 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA orders and develop the partial Banker s algorithm, a more permissive and computationally efficient approach Ordered states and Banker s algorithm Definition 3. A state S u V is an ordered state if S u = S E or if there exists a bijection, h: S + u {1,2,..., S + u }, such that, for each P km S + u, the following holds: R j RT km,c j O j + H km ξ j > 0, where H km ={P pq S + u : h(p pq) h(p km )}. V o V is the set of ordered states. The definition implies that a state is ordered if there exists an ordering of parts in the system is such that the remaining buffer space needs of each part can be satisfied from available buffer space plus that held by parts no higher in the order. Thus, the parts in the system can be finished in the order given by the bijection, h. For example, if h(p km ) = 1, then all instances of π km in the system can finish using currently available buffer space plus that already held by the instances of π km. Further, if h(p pq ) = 2, then all instances of π pq can finish using currently available buffer space plus that held by the instances of π km plus that by π pq, and so forth. To better explain the definition, suppose π km occupies buffer capacity at resource R fk (m) in state S u. The remaining route of π km is RT km = R fk (m+1),...,r fk ( P k ).IfC j O j > 0 R j RT km, then π km can finish using currently available buffer capacity. Suppose R j RT km such that C j O j = 0. We need to examine two cases. First, if R j = R fk (m), then π km must revisit its current resource to finish. Clearly, when finishing, π km can reuse its currently occupied unit of buffer capacity. We cover this case by including P km in the definition of H km ; that is, P km ξ j and P km H km H km ξ j >0. Second, R j RT km, R j R fk (m), such that C j O j = 0. Therefore, π km cannot finish unless some part at R j, say π pq, is finished first; that is, unless P pq ξ j such that P pq H km H km ξ j > 0. Note that the definition does not specify an order for the actual parts in the system. Rather, it requires the set of part type stages that have corresponding nonzero entries in the state vector to be ordered. We do this because multiple instances of P km have identical remaining resource needs, and so, if we can finish one π km, we clearly can finish all. As another example of an ordered state, consider S 6 of figure 1. From this state, the system can be emptied by first finishing π 12 and then finishing π 11. Hence, S 6 is ordered. Clearly, S 4 is not. The following lemma guarantees that if a state is ordered, then a sequence of ordered states leads to the empty state. This condition essentially guarantees the correctness of a DAP that admits the ordered states. Lemma 4. S u V o, {S 0 (= S u ), S 1, S 2,...,S k,s E } V o such that S i, S i+1 E o, where E o ={ S x,s y :S x,s y V o S x,s y E}. In words, for every ordered state, there is a sequence of ordered states that leads to the empty state. Proof: Suppose that h : S + u {1,2,..., S+ u } defines an order in which parts in the system can be completed and let P km be the first stage in the order. Further, suppose that we advance a part π km one step in its route and that the resulting state is S v. To construct an order for S v, we enumerate the following cases: (1) S + v = S+ u, (2) S+ v ={P k,m+1} S + u,
9 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 81 Figure 3. Unordered safe state. (3) S + v = S+ u \{P km}, and (4) S + v ={P k,m+1} S + u \{P km}. For (1), construct a new order, f, as follows: let f (P k,m+1 ) = 1, and P pq S + v \{P k,m+1}, ifh(p pq )<h(p k,m+1 ), then f (P pq ) = h(p pq ) + 1; otherwise, f (P pq ) = h(p pq ). For (2), construct a new order, f,as follows: let f (P k,m+1 ) = 1, and P pq S + u, f (P pq) = h(p pq )+1. For (3), construct a new order, f, as follows: let f (P k,m+1 ) = 1, and P pq S + v \{P k,m+1},ifh(p pq )<h(p k,m+1 ), then f (P pq ) = h(p pq ), otherwise, f (P pq ) = h(p pq ) 1. Finally, for (4), construct a new order, f, as follows: let f (P k,m+1 ) = 1, and P pq S + v \{P k,m+1}, f (P pq ) = h(p pq ). Thus, if S u is ordered, we can construct a sequence of ordered states leading from S u to S E by iteratively advancing a part corresponding to the first stage of the current order and then using cases (1) (4) to compute a new order for the resulting state. It is important to note that many safe states are not ordered. Consider a system with R ={R 1,R 2,R 3 },C 1 =1,C 2 =2,C 3 =1, and two part types, P 1 with route R 1, R 2, R 3 and P 2 with route R 3, R 2, R 1. Consider the state shown in figure 3. Clearly, the state is safe, because we can empty the system by first advancing π 11 forward to R 2 (where it becomes π 12 ) and then advancing π 21 to completion. We then are able to finish π 12 and empty the system. The state is not ordered, because neither part can finish until the other advances. From the preceding discussion, a DAP that permits a resource request if and only if the resulting allocation state is ordered is a correct, although suboptimal, DAP. This policy, in fact, is a modified version of Banker s algorithm (see Algorithm 1). In general, Banker s algorithm uses NEED, AVAILABLE, and ALLOCATION matrices to represent system state. Assuming that we wish to check the inclusion S u V o, we configure these structures for buffer space allocation in the FMS as follows (note that Banker s algorithm exploits full knowledge of future buffer space requirements by encoding the remaining route of a part into the NEED vector). For i = 1, 2,..., S + u and j = 1, 2,..., R, NEED[i][ j] = 1ifR j is in the remaining route of p(i) = P km S + u ; 0 otherwise ALLOCATION[i][ j] = π km if p(i) = P km ξ j ;0 otherwise AVAILABLE[ j] = C j ALLOCATION[i][ j] i ALLOCATION[i][ j] represents the current buffer allocation (where parts currently sit), and NEED[i][ j] represents future buffer requirements (where parts have to go). Given
10 82 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA these definitions, Algorithm 1 iteratively seeks P km S + u such that the future buffer needs of π km can be satisfied by available buffer space plus that already allocated to π km. When the algorithm finds such a P km, it assumes that all π km instances of P km are completed, and the allocated buffer space is returned to the available pool (we say that P km is accessed). The algorithm continues this until either every P km S + u is accessed (the system emptied) or no remaining P km can be accessed (there is a set of parts in the system such that every part is blocked from finishing by another part in the set). In the first case, the state is accepted as ordered; in the second, it is rejected as unordered. For a detailed example of the operation of Algorithm 1, the reader is referred to figure 4. R ={R 1,R 2,R 3,R 4 }, where C 1 = 2, C 2 = 1, C 3 = 2, C 4 = 2, and P ={P 1,P 2 }with RT 1 = R 1,R 2, R 3,R 4 and RT 2 = R 4,R 3,R 2,R 1. In this state, S + u ={P 11, P 21 }. Let p(1) = P 11 and p(2) = P 21. Then, ={1,2}, and AVAILABLE = NEED ALLOCATION R 1 R 2 R 3 R 4 R 1 R 2 R 3 R 4 p(1) p(2) Iteration 1: NEED[1][ j] = 0111! AVAILABLE[ j] + ALLOCATION[1][ j] = 2120 ; NEED[2][ j] = 1110 AVAILABLE[ j] + ALLOCATION[2][ j] = Therefore, access P 21 (advance the instances of π 21 out of system). ={1}, and AVAILABLE = = Iteration 2: NEED[1][ j] = 0111 AVAILABLE[ j] + ALLOCATION[1][ j] = Therefore, access P 11 (advance the π 11 out of system). =, and AVAILABLE = = Terminate by admitting the state, because every P km S + u is accessed; that is, the state is ordered with h(p 21 ) = 1 and h(p 11 ) = 2. The reader should verify that the state given in figure 3 would be rejected by Algorithm 1. Figure 4. Algorithm 1 acceptance of the ordered state.
11 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 83 Algorithm 1. Query: Is S u V o ; that is, is the state in question ordered? Input: ALLOCATION, NEED, AVAILABLE representations of S u. Output: ADMIT, REJECT Begin ={1,2,..., S + u } Loop //If all P pq S + u have been accessed, admit state.// If = Return ADMIT // Otherwise, find a p(i) that can be accessed. // Find i such that NEED[i][j] ALLOCATION[i][j] + AVAILABLE[j] j=1... R If no such i exists Return REJECT //Otherwise, access p(i).// For j=1 to R AVAILABLE[j]=AVAILABLE[j]+ALLOCATION[i][j] ALLOCATION[i][j]=0 NEED[i][j]=0 End For = \{i} End Loop End The complexity of Banker s algorithm is established by Shoshani and Coffman (1970) as O(r n log n), where r is the number of resources and n is the number of processes. Therefore, Algorithm 1 exhibits complexity O( R S + log S + ). Theorem 5 establishes that V o is the admissible region of Algorithm 1. Theorem 5. A state is ordered if and only if it is accepted by Algorithm 1. Proof: Suppose a state is accepted by Algorithm 1. Then, it clearly is ordered. Suppose a state is ordered. Then, at every iteration, the algorithm will access a P km S + u. Because S + u is finite, the system eventually will empty and the state will be accepted. The order in which the elements of S + u are accessed defines the bijection sought in Definition 3. Although the admissible region of Algorithm 1 will be V o, the reachable admissible region will be the set of ordered states reachable from S E along paths confined to V o (Call this V Ro. Although V Ro V o V R, it is unlikely that V Ro = V o V R.) Lemma 4 guarantees V Ro to be a strongly connected subregion of V safe V R. Note that Algorithm 1 rejects all unordered safe states. In Section 5, we present results on the operational flexibility of this algorithm; that is, we attempt to estimate the percentage of safe states admitted. For now, we seek methods for expanding the region of FMS operation beyond V Ro. Sections 3.2 and 4 develop techniques for this purpose.
12 84 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA Figure 5. Example of a partially ordered state Partially ordered states and partial Banker s algorithm We have seen that Banker s algorithm admits ordered states and rejects all others. We now modify the algorithm so that it can identify safe states outside of V o. We begin by introducing the concept of partially ordered states. Definition 6. Consider buffer allocation state, S v, and suppose P km S + v. S v is partially ordered with respect to P km if there exists s + v S+ v with P km s + v and bijection, g : s+ v {1, 2,..., s + v }, such that, for each P pq s + v, the following holds: R j RT pq, C j O j + G pq ξ j > 0, where G pq ={P xy s + v : g(p xy) g(p pq )}. Define s + v as maximal if S + v \s+ v has no partially ordered subset. This definition implies that a state is partially ordered with respect to a part if the part belongs to a subset of parts that can be ordered. A partially ordered subset is maximal if, after its removal, the resulting state contains no partially ordered subset. Clearly, if S v is ordered, then it is partially ordered with respect to all P km S + v.ifs vis not ordered, then it still might be partially ordered with respect to some subset of S + v. The small example system of figure 4 exhibits the deadlock state of figure 5. This state is partially ordered with respect to s + v = {P 14, P 13 }, because we can first finish π 14 and then π 13 ; that is, g(p 14 ) = 1 and g(p 13 ) = 2. Note that the accessing of s + v is not inhibited by any member of S + v \s+ v ={P 11, P 21, P 23 }, and that s + v is maximal. The significance of the partial order concept lies in the following theorem. Theorem 7. Suppose π k,m 1 needs to move forward in some state S u and the resulting state, S v, is partially ordered with respect to P km. Then (1) S u V safe S v V safe, and (2) S u V o S v V o. Proof: In this proof, we assume S v results from advancing π k,m 1 to its next resource, where it becomes π km ; S v is partially ordered with respect to P km ; and S w S u means that P km, π km in S w π km in S u. For (1), assume that S u V safe. Note that S w S u S w V safe, because arbitrarily deleting parts from a safe allocation state cannot result in an unsafe state. Now, because S v is partially ordered with respect to P km,wehavep km s + v S+ v such that s+ v can be accessed independent of S+ v \s+ v. Let S+ w = S+ v \s+ v. Because s+ v was accessed by advancing only those parts represented in s + v, every part represented in S+ w
13 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 85 occupies the same buffer capacity as in S u. In other words, the buffer space allocation of S w is identical to that of S u except that a subset of parts has been removed; that is, S w S u S w V safe. S w reachable from S v implies S v V safe. For (2), assume that S u V o. Note that S w S u S w V o, because arbitrarily deleting parts from an ordered allocation state cannot result in an unordered state. Now, S v is partially ordered with respect to P km, so we have P km s + v S+ v such that s+ v can be accessed independent of S+ v \s+ v. Let g be an ordering of s + v, and let S+ w = S+ v \s+ v. As before, S w S u S w V o. Let h be an ordering of S w. The concatenation of orders g and h defines a total order for S v ; that is, S v V o. Result (2) implies that, if we start the FMS from the empty state and admit only those states that exhibit partial orders with respect to the parts moved forward, then the region of FMS operation will be V Ro, the reachable admissible region of Algorithm 1. As a result, such a policy is a correct DAP. Furthermore, checking states for partial orders will be more computationally efficient than checking for complete orders. We, therefore, seek to modify Algorithm 1 so that it exploits partial orders. Although the new Algorithm 2, exhibits no improvement in worst case complexity, it requires significantly less computation on average (see Section 5 for experimental results). Algorithm 2 decides whether or not state S v, resulting from the advancement of π k,m 1 one step in its route, where it becomes π km, is partially ordered with respect to stage P km. Specifically, Algorithm 2 iteratively seeks to access P km.ifp km can be accessed, then the algorithm terminates by accepting S v.ifp km cannot be accessed, then the algorithm seeks an accessible P pq S + v. If no such P pq is found, the algorithm terminates by rejecting S v. If an accessible P pq is found, the algorithm accesses it and begins a new iteration. Note that Algorithm 2 does not require S v to be totally ordered, because it terminates as soon as P km is accessed; that is, S v might be admitted by Algorithm 2 even though S v is unordered. Algorithm 2, therefore, is applicable outside the set of ordered states if some mechanism for safely leaving this set can be found. In Section 4, we introduce a partition on the safe state space that provides a convenient mechanism for venturing outside the set of ordered states. 4. Extending Banker s algorithm to unordered states In this section, we extend Banker s algorithm so that it identifies safe states outside the ordered region. We first use the ordering concept to develop a partition on the safe state space. The structure of this partition allows us to guarantee incremental increases in the number of admissible states through controlled increases in computational effort. We then develop an algorithm that identifies states in the first two levels. In Section 5, we show that this approach significantly increases coverage of the safe allocation state space. Algorithm 2. Query: Is S v partially ordered with respect to P km S + v? Input: P km and ALLOCATION, NEED, AVAILABLE representations of S v. Output: ADMIT, REJECT
14 86 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA Begin ={1,2,..., S + v } k=p 1 (P km ) //Get the row index of P km.// Loop //If P km can be accessed, admit the state.// If NEED[k][j] ALLOCATION[k][j]+AVAILABLE[k][j] j=1... R Return ADMIT //Otherwise, find any p(i) that can be accessed.// Else find i such that NEED[i][j] ALLOCATION[i][j]+AVAILABLE[j] j=1... R If no such i exists Return REJECT //Otherwise, access p(i).// For j=1 to R AVAILABLE[j]=AVAILABLE[j]+ALLOCATION[i][j] j=1... R ALLOCATION[i][j]=0 NEED[i][j]=0 End for = \{i} End Loop End 4.1. Partitioning the safe state space In this section, we define the V m ordered states and show that this definition induces a partition on the safe state space. Furthermore, we develop several useful properties that result from the structure of this partition. We begin with a definition. Definition 8. The set of V m ordered states is defined inductively on m. Form=0,V o is the set of ordered states. For m > 0, let s + u be the maximal partially ordered subset of S u and assume that S + v = S+ u \s+ u. (S vis the state resulting when the maximal partially ordered subset is removed from S u.) Then, S u V m if the following two conditions hold: (1) S u V n for n < m, and (2) P pq S + v and S w V m 1 such that S w is reachable from S v by advancing a single π pq a finite number of steps. We refer to V m as the mth safety level. This definition basically says that a state is V m ordered if (1) it is not V n ordered for n < m and (2) if, after the removal of its maximal partially ordered subset, some part can be advanced a finite number of steps to yield a V m 1 ordered state. For example, suppose that we add part type P 3 = P 31, P 32 with RT 3 = R 2,R 3 to the example of figure 4. Then, the example state of figure 6 is V 1 ordered. To see this, observe that, after we remove the parts corresponding to the maximal partially ordered subset {P 32, P 31 }, we can easily reach a state in V o (an ordered state) by advancing a π 21 by one step. We use this definition to increase the reachable admissible region of Banker s algorithm beyond V Ro. We first show that it induces a highly structured partition on the safe FMS state
15 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 87 Figure 6. V 1 ordered state. space. The structure of this partition guarantees that (1) by increasing the safety level of states accepted by an algorithm (up to some maximum), we increase the admissible region; and (2) an algorithm with reachable admissible region m i=0 V Ri is correct; that is, this region is strongly connected. (Note that m i=0 V Ri is the subset of m i=0 V i that is reachable from S E along paths confined to m i=0 V i.) We prove this in a series of propositions, the first of which establishes that V m ordered states are safe. Lemma 9. V m V safe. Proof: We use induction on m. Form=0, we have V o V safe.form>0, assume that the induction hypothesis is true for every V i with i < m, and suppose S u V m. Then, after removal of the maximal partially ordered subset, P pq S + u \s+ u such that, by advancing a single π pq a finite number of steps, we reach some S w V m 1. Because S w is safe by the induction hypothesis and S w is reachable from S u, S u is safe. The next lemma establishes that in moving from V m to V m 1, the system need not pass through states in other levels. In other words, for any state in V m, there is a path to a state in V m 1 that is confined to V m. This establishes the correctness of m i=0 V Ri. Lemma 10. Suppose that S u V m. Then, there exists a sequence of V m ordered states leading to some S w V m 1. Proof: First, note that all states encountered in removing the maximal partially ordered subset are V m ordered, because like S u, they satisfy conditions (1) and (2) of Definition 8. To see this, let S + x = S+ u \{P km}, where P km s + u and g(p km) = 1; that is, S x is the state that results from accessing the first element of the maximal partially ordered subset of S u. Like S u, S x contains a maximal partially ordered subset, s + x = s+ u \{P km}, and the state resulting upon its removal is S v V m. Therefore, if (1) and (2) of Definition 8 hold for S u, they must hold for S x. Now consider the sequence of states from S v to S w, where S + v = S + u \s+ u, S v V m. By definition, π pq such that by advancing π pq a finite number of steps, say k, we reach S v+k = S w V m 1 (assume that S w is the first such state). Consider the sequence of states = S v+n 0 n k 1. We wish to show that each state in belongs to V m. Suppose that n {0,1,...,k 1}such that S v+n V m+c for c > 0. This implies that
16 88 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA no S w V m 1 can be reached from S v+n by advancing a single part only, a contradiction. Suppose that n {0,1,...,k 1}such that S v+n V m c for c > 1. Then, by Definition 8, S v V m c+1, again a contradiction. Finally, suppose that n {0,1,...,k 1}such that S v+n V m 1. This contradicts the assumption that S w was the first V m 1 state encountered. By elimination, S v+n V m n {0,1,...,k 1}. Thus, if the system is in a V m ordered state, the process of removing the maximal partially ordered subset causes no change in safety level. Further, if the state is not partially ordered, then the process of advancing a part to yield a V m 1 ordered state results in a single change in safety level, from V m to V m 1. Lemma 11 establishes an upper bound on the safety level of immediate predecessors of V m ordered states. Lemma 11. Suppose that S v V m, S u, S v E,and S u V n. Then n m + 1. Proof: S u, S v Eimplies the existence of π pq such that, by advancing π pq one step, the system enters state S v V m.ifn>m, then by Definition 8, S u V m+1. Lemma 11 states that all predecessors of V m ordered states must fall in safety levels 0 to m + 1. In particular, if S u is in a higher level than S v, then S u is in the next higher level. Therefore, it is impossible to move from the mth safety level to the (m k)th safety level (k > 0) without passing through states in every intervening level; that is, V m V m k k {0,1,...,m}. Notice, however, that a transition from a lower safety level to a higher safety level might span several levels. For example, consider the V o state of figure 7, where a single transition, advance π 31, results in a V 2 state. After advancing π 31, we must advance π 21 one step and π 32 one step to return to V o. In summary, it is possible to skip safety levels when moving up in state complexity, but it is impossible to skip safety levels when moving down in state complexity (see figure 8). Using Lemma 11, we now establish that Definition 8 partitions the entire safe state space by proving that every safe state is in some safety level. Theorem 12. If S u V safe, then there exists a positive integer m such that S u V m. Figure 7. Single transition move from V o to V 2.
17 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 89 Figure 8. Partition topology. Proof: Suppose that S u V safe. Clearly, there exists S v V n (for some n 0) such that S v is reachable from S u. Consider the sequence of states leading from S u to S v ; that is, S u, S u+1, S u+2,...,s u+k 1, where S u+k = S v. Note that, by Lemma 11, S u+k 1 V p 0 p n + 1 S u+k 2 V q 0 q n + 2 S u+k 3 V r 0 r n + 3. S u+k k V m 0 m n + k We have now established that the set of safe states is partitioned by the definition of V m ordered states. Furthermore, if we construct algorithms that admit m i=0 V i, we guarantee that (1) each increment in m (up to some maximum) will increase our coverage of the safe state space, and (2) the reachable admissible region for such an algorithm will be correct in the strongly connected sense. For practical purposes, we are interested in those classes that are significant in terms of admitted states and for which computation does not become excessive (the lower order classes). In this paper, we study the set of V 1 ordered states; that is, states for which (after removing the maximal partially ordered subset) there exists a part, π km, such that by advancing π km a finite number of steps, an ordered state can be reached. Note that the states of figures 3 and 6 are V 1 ordered. Algorithm 3 detects V 1 ordered states. It assumes that the state has already been checked and rejected by either Algorithm 1 or Algorithm 2. These algorithms manipulate the data structures so that any partially ordered subset of parts is advanced to completion. Therefore, the state represented by the data structures presented to Algorithm 3 is not partially ordered. Algorithm 3 selects a part and attempts to advance it one step. If the part is successfully advanced, then Algorithm 1 is called on the resulting state; that is, Algorithm 3 checks to see whether the resulting state is ordered. If so, Algorithm 3 returns ADMIT. If not, it attempts
18 90 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA to advance the part again. This process continues until an ordered state is encountered or the part can advance no further. In the latter case, the algorithm resets the data structures to the original state and selects the next part. Theorem 13 establishes the complexity of Algorithm 3. Algorithm 3. Query: Is S v V 1 ; that is, is the state in question V 1 ordered? Input: ALLOCATION, NEED, AVAILABLE representations of S v. Output: ADMIT, REJECT Begin For i = 1... S + v //Copy data structures.// temp1=allocation; temp2=need; temp3=available Loop //Update data structures by attempting to advance p(i).// Result=move part(temp1, temp2, temp3, i) If Result==BLOCKED //Part is blocked and cannot move.// Break From Loop End Else If Result==MOVED End Loop End For Return REJECT // S v V 1.// //Part was successfully advanced.// // Is resulting state ordered?// Result=Algorithm 1(temp1, temp2, temp3) If Result==ADMIT Return ADMIT //S v V 1.// Theorem 13. Algorithm 3 belongs to the class of polynomial algorithms. 1 Proof: Suppose Ɣ is the set of stages in S + v corresponding to parts in the system that can move forward at least one step. Let k max be the maximum number of steps that any such part can move. In the worst case, Ɣ = S + v, and we attempt to advance π km by k max steps for each P km S + v, calling Algorithm 1 at each step. An upper bound on the number of calls to Algorithm 1 is S + v RT max, where k max RT max, the maximum route length. As previously noted, the complexity of Algorithm 1 is O( R S + v log S+ v ). Therefore, the complexity of Algorithm 3 is O( RT max R S + v 2 log S + v ). The complete logic of a look-ahead policy accepting states in V o V 1 is implemented in Algorithm 4. This algorithm assumes that a dispatching or order release policy has selected a part to advance and that the state vector has been updated (although the actual part has not been allowed to move). Algorithm 4 determines whether deadlock-free operation can be guaranteed if this proposed move is executed. It starts by calling Algorithm 2 to determine whether the resulting state is partially ordered with respect to the selected part. If so, Algorithm 4 admits the state. If not, it calls Algorithm 3 to see if the resulting state is V 1
19 THE APPLICATION AND EVALUATION OF BANKER S ALGORITHM 91 ordered. If so, it admits the state, otherwise it rejects the proposed move. Its complexity is similar to that of Algorithm 3. Algorithm 4. Query: Is S v V o V 1? (Assume π km is the last part to advance and S v is the resulting state.) Input: S v,π km Output: ADMIT, REJECT Begin //Setup ALLOCATION, NEED, and AVAILABLE for S v.// configure data structures (S v ) //Check whether S v is partially ordered with repect to P km.// Result=Algorithm 2 (P km, ALLOCATION, NEED, AVAILABLE) If Result==ADMIT Return ADMIT //State is partially ordered with respect to P km.// //Check whether S v is V 1 ordered.// Result=Algorithm 3(ALLOCATION, NEED, AVAILABLE) If Result==ADMIT Return ADMIT //State is V 1 ordered.// Else Return REJECT // S v V o V 1. Do not allow proposed move.// End In Section 5, we turn our attention to evaluating the safe state space coverage of these algorithms. We also investigate the computational savings of Algorithm 2 over Algorithm Evaluating Banker s algorithm In the previous sections, we developed variants of Banker s algorithm for deadlock avoidance in FMS buffer space allocation. Algorithms 1, 2, and 3 use the information contained in remaining routes to determine state admissibility. In this section, we estimate the operational flexibility of our algorithms. We begin by using inferential statistics to draw comparisons with the optimal policy, the deadlock avoidance policy that admits all safe states. We then develop analytical relationships between Banker s algorithm and other polynomial deadlock avoidance methods developed for manufacturing. As a secondary interest, we study the computational savings afforded by seeking partial rather than total orders (Algorithm 1 versus Algorithm 2). We begin by developing a measure of operational flexibility along with a statistical sampling and estimation scheme Estimating operational flexibility The algorithms developed in Sections 3 and 4 can be thought of as cuts on the FMS state space, where determining whether or not a state is inside the cut is a polynomial operation (see figure 9). Polynomial execution together with the NP-completeness of state safety implies suboptimality; that is, polynomial DAPs will tend to reject some safe states. A
20 92 MARK LAWLEY, SPYROS REVELIOTIS, AND PLACID FERREIRA Figure 9. Region of DAP admissibility. DAP that rejects too many safe states will restrict flexibility and not be usable. For example, a policy that allows only one part in the system at a time is both correct and computationally tractable. However, it is clearly too restrictive to be given serious consideration. Let V admit represent the set of states admitted by a DAP. Then, from figure 9 it is clear that the ratio, p = V admit / V safe, provides one measure of DAP operational flexibility. This is the ratio of DAP admissible space to the admissible space of the optimal policy (the safe state space). Unfortunately, closed-form expressions for either of these subspaces are not known. We, therefore, develop an empirical approach for estimating this ratio (Walpole and Myers, 1993, provide statistical details for the following development). To get a point estimate of p, we collect a sample of safe states, V sample V safe, and let V a = V sample V admit.ifv a contains no redundant states, then x = V a is a hypergeometric random variable, where the total number of items in the population is N = V safe, the number of admissible items in the population is k = V admit, and the number of items sampled from the population is n = V sample. It is a standard result that the ratio ρ = x/n is an unbiased estimator of p; that is, E(ρ) = E(x/n) = E(x)/n = (nk/n)/n = k/n = p (where E denotes expected value). To get an interval estimate of p, we invoke the binomial approximation to the hypergeometric, which holds when N N n. We argue that N N n as follows: it is easily shown that the number of states in the FMS state space, V, is given by the product R i=1 C(C i + ξ i ; C i ), where C(n; k) = ( n k ). This is never smaller than 2 R and tends to be much larger. Therefore, V is exponential in R. If we assume that V safe V /2 j, then V safe also is exponential in R and can be quite large. (In the system of Table 2, if we assume, for example, that at least 1/32 of the total states are safe, then ( /32) ( /32) 90,833, and the assumptions are valid.) When approximating h(x, N, n, k) with b(x, n, p), note that p = k/n, E(x) = np, and Var(x) = np(1 p), where Var is variance. Now, consider the variance of the unbiased estimator, ρ:var(ρ) = Var(x /n) = Var(x )/n 2 = np(1 p)/n 2 = p(1 p)/n. If n is large enough (n > 30), then by the central limit theorem, the statistic Z = [ρ E(ρ)]/ Var(ρ) follows the standard normal distribution. We use this fact to get the following (1 α) 100% confidence interval on
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