GENERATION LIFETIME AND HOLD TIME OF SMALL MOS DEVICES

Transcription

1 GENERATION LIFETIME AND HOLD TIME OF SMALL MOS DEVICES N. Pearce, A. Peaker, B. Hamilton To cite this version: N. Pearce, A. Peaker, B. Hamilton. GENERATION LIFETIME AND HOLD TIME OF SMALL MOS DEVICES. Journal de Physique Colloques, 1988, 49 (C4), pp.c4-37-c4-40. < /jphyscol: >. <jpa > HAL Id: jpa Submitted on 1 Jan 1988 HAL is a multi-disciplinary open access archive for the deposit and dissemination of scientific research documents, whether they are published or not. The documents may come from teaching and research institutions in France or abroad, or from public or private research centers. L archive ouverte pluridisciplinaire HAL, est destinée au dépôt et à la diffusion de documents scientifiques de niveau recherche, publiés ou non, émanant des établissements d enseignement et de recherche français ou étrangers, des laboratoires publics ou privés.

2 Colloque C4, supplqment au n09, Tome 49, septembre 1988 GENERATION LIFETIME AND HOLD TIME OF SMALL MOS DEVICES N.O. PEARCE"), A.R. PEAKER and B. HAMILTON Centre for Electronic Materials and the Department of Electrical Engineering and Electronics, University of Manchester Institute Of Science and Technology, PO Box 88, GB-Manchester M60 IQD. Great-Britain Resume - Une nouvelle methode pour la characterisation de transientes d'inversion dans des dispositifs m~tal-oxide-semiconducteur est reportee. L'utilisation de la Spectroscopie Isothermique des Transientes de Niveaux Profonds permet de separer les courants de generation d'origines differentes. La combinasion de graphes deactivation avec des graphiques 'Zerbst' donne une characterisation complzte de dispositifs de dimensions allant jusqu'g moins d'un micromstre. Abstract - A new method for characterising inversion transients in metal-oxidesemiconductor devices is reported. The technique uses Isothermal Deep Level Transient Spectroscopy to separate generation currents from various sources. The combination of activation graphs with Zerbst plots gives a complete characterisation of devices with dimensions down to sub-micron levels. 1 - INTRODUCTION The rate at which inversion layer charge builds up in an MOS structure is a crucial parameter which critically affects the performance of many MOS devices. In 1966 Zerbstl described a technique which allowed a separation of the generation currents which create the inversion layer into those components which depend on the depletion width from those which do not. Using this analysis Zerbst calculated a generation lifetime (from the depletion component) and a surface recombination velocity (from the components which did not depend on the depletion width). Many variations of the original Zerbst method have been proposed. A very comprehensive review of these was published in 1985 by Kang and Schroderz. Some of the modifications speed up the measurement, some simplify the calculation, some undertake a more rigorous analysis but in the main the fundamental concept of separation into two components remains. The last five years has seen remarkable progress in MOS devices and the silicon from which they are made. The use of epitaxial layers and improved gettering techniques result in the contribution of minority carriers from the depletion region being insignificant. This means that the hold time of the best MOS structures manufactured today is not dependent on deep states in the depletion region. However, contributions from carrier diffusion from the bulk material and from the region where the surface depletion region edge meets the surface are increasingly important. The latter is particularly so in very small devices. The bulk contribution is not depletion width dependent and so the Zerbst analysis embraces it into the surface term. However, the contribution from the depletion edge at the surface is depletion width dependent (but not linearly) and so distorts the Zerbst curve. Consequently, additional measurements are needed to propertly characterise the generation processes. In addition, the instrumentation normally used for the Zerbst measurement only permits the use of special test capacitors with fairly large areas, and not of the normal micron-sized FET gates in which the relative importance of the various generation mechanisms is expected to be very different. In particular, surface generation from the lateral depletion region becomes of increasing importance as the device size is reduced. It is also interesting to consider that the total number of bulk traps or interface states present in a high quality sub-micron device is, on average, of the order of two or three. Thus the trap population, whatever its origin, will be subject to statistical fluctuation, the effects of which can never be appreciated on large test capacitors. Recently we described a technique which uses a Deep Level Transient Spectroscopy (DLTS) system to overcome some of these limitations3. In this method, DLTS scans of the capacitance change are obtained and an Arrhenius plot then yields activation energies characteristic of the generation mechanisms. This method also has advantages over singleshot Zerbst in terms of its high sensitivity, principally because the data are a result of signal averaging in a relatively noise-free part of the spectrum. Essentially, the DLTS output is the difference between two successive measurements of the device capacitance. This means that flicker noise and d.c. offset are subtracted out, enabling devices with very small quiescent capacitances to be measured. Hence the technique can be used to directly measure micron-sized devices. Unfortunately it was necessary to considerably simplify the analysis because, as the temperature is varied, some of the macroscopic parameters of the specimen (such as the equilibrium inversion capacitance Cf and the carrier concentration ni) change. The present paper describes the use of an isothermal variant of the DLTS technique, for which the temperature is maintained constant throughout a scan of the system's rate window. (I) present address: Bio-Rad Laboratories,780 Montague Expressway, Suite #201, San Jose, CA95131, USA. Article published online by EDP Sciences and available at

3 2 - THE ISOTHERMAL TECHNIQUE A family of DLTS peaks obtained on an MOS test capacitor by the I-DLTS measurements is shown in Figure 1. Unlike normal DLTS, the signal AC is plotted against the logarithm of the rate window, with temperature as a parameter. There are several additional advantages in measuring emission transients using the isothermal variety of DLTS. In particular, stressing of the sample resulting from the application of temperature cycles is minimised because it is not necessary to take the sample repeatedly through a wide range of temperatures. Such considerations are of particular importance in MOS devices where temperature cycling to cryogenic temperatures often results in degradation. Essentially, the technique consists in scanning the system rate window over a qride range whilst maintaining the temperature constant. The measurement is then repeated at other fixed temperatures in order to obtain a family of DLTS peaks. These are used to produce an activation plot but since each DLTS peak is a measurement of an unchanging capacitance transient, it is possible, by manipulating the data constituting one peak, to replot the original transient. This exercise can in fact be carried out with a high degree of accuracy. It might seem paradoxical that such a reconstruction should be undertaken but it gives rise to more noise-free data than a single direct measurement of the transient. The rate window is defined by two sampling periods, the mid point of these occurring at times t, and t, after the device has been switched into depletion. The ratio between these two times is kept constant at 2 (i.e. t,/tl=2). The sampling times are swept across the transient starting at the lowest values of the sample times t, and t,. This corresponds to the highest rate window. An Arrhenius plot can be constructed from the position of the DLTS peaks and information concerning the generation mechanisms obtained in the same way as described previously using the temperature scanning technique 3. In order to reconstruct the C-t transient from the DLTS peaks, we must convert the C(t,) - C(t,) vs. rate window data which are produced by the DLTS measurement, into the actual values of the capacitance as a function of time. To do this it is important that the first measurement, corresponding to the shortest sampling times, should give rise to a signal which is negligible compared to the quiescent capacitance of the device. The reason for this is that the change in capacitance between t=o and t=t,(l), where t,(l) is the shortest sampling time used in the scan, is not known and is assumed to be zero. In practice this condition is readily satisfied within the range of normal measurement temperatures. The driver software is written in such a way that the times t, and t, double every 12 points, this number being chosen to generate an appropriate number of data points. This means that at any measurement point other than the first twelve points, the time of the second sampling time, t,, is equal to the value of the first sample, t,, twelve points back. This may be expressed more conveniently in mathematical terms, as follows, where i corresponds to the ith data point of the scan: t i ) = t (-12 for i>12 (2) This relationship between the two samples is used to construct the capacitance transient from the DLTS result. The time at the mid-point of the first sampling gate t, is the time t(i) of the C-t pair, and the capacitance C(i) is extracted in the following way from the DLTS data: first, the capacitance difference between the value at t = 0 and at the time t = t, is computed for all points; then, this capacitance is added to the difference between the maximum (saturated) value of the capacitance, and the previously determined value of the equilibrium inversion capacitance Cf. In the case of the first twelve points for which the signal AC should be negligibly small, the values of C(i) are set equal to AC, which means, in effect, that we are ignoring the capacitance change between t=o and t=t, for the first 12 points: It follows that for all the remaining points: C(i) = AC(i) for 1<i<12 (3) ( i ) = A ) + ( i-12 for i > 12 (4) As both of the samples reach the flat, equilibrium part of the C-t curve. C(i) will saturate. This saturated value Csat is compared to the measured inversion capacitance Cf, and the difference, dc = Cf-Csat, is added to all the C(i) values obtained from equations (3) and (4). The array elements C(i) now hold the actual capacitance of the device at the time t(i) = tl(i) following the return to the quiescent reverse bias after the accumulation pulse, thus completing the conversion of the DLTS data to the capacitance transient. 3 - EXPERIMENTAL ILLUSTRATION The Arrhenius plot, derived from the data in Figure 1, is shown in Figure 2. It yields a straight line with an activation energy of 429 mev. This low energy eliminates the possibility that the minority carriers originate in the bulk ancl diffuse to the depletion region. In such cases the process is activated at near band gap energy.

4 If the dominant generation mechanism is due to generation via deep states within the depletion layer an energy of slightly more than half band gap (650meV) is observed3. In the case shown it is considerably less and it is likely that the generation is dominated by surface phenomena. Carrying out a reconstruction of the C-t transient from one of the I-DLTS peaks and performing the Zerbst analysis, as shown in Figure 3, provides support for this interpretation. Indeed, apart from the later stages of the recovery, the Zerbst plot exhibits a constant generation current, independent of the width of the depletion layer. This does not fit the model for deep level generation within the depletion layer, but is consistent with surface generation in a large area device. The value obtained for the carrier generation lifetime from this plot is meaningless since the Zerbst plot is virtually flat. The fit to the C-t plot was computed by solving Zerbst's equation using the values for the surface generation velocity obtained from the Zerbst analysis. Not surprisingly, the transient response time is solely dependent on the value of the intercept of the Zerbst plot with the vertical axes. From the Zerbst plot, it is immediately evident that depletion layer generation is not responsible for the inversion. However, both the constant generation currents and the high temperature at which the measurements were obtained, make a diffusion component from the bulk the favourite contender. However, in this case we know that this is not possible because of the small value of the activation energy. Although Schroder and Nathanson4 showed that surface generation, especially from a lateral depletion region, could play an important role as a source of minority carriers, diffusion from the bulk and deep level generation in the depletion layer are often assumed to be the only important sources of minority carriers to feed the inversion process. It should also be remembered that the relative importance of surface generation compared to diffusion and depletion layer generation increases as the device size shrinks, making this source of generation very important in very small devices. Unfortunately the Zerbst plot does not permit a distinction to be drawn between the sources of carriers which are not dependent on depletion width. However, the Arrhenius plot provides conclusive evidence that the process is not a band to band excitation (this would have an activation energy > 1 ev) so eliminating the possibility of minority carrier diffusion being a major process in this case. Although such an Arrhenius plot could be obtained from conventional DLTS the Zerbst plot cannot be reconstructed and, again, ambiguity persists which only I-DLTS resolves. The surface generation velocity Sg under the gate can be calculated from: s (t) = g where XZ(t) and Yz(t) are the X and Y co-ordinates of the Zerbst plot; T; is the effective generation lifetime calculated from the slope of the Zerbst plot and which includes any contribution by surface generation from the lateral depletion region Cox is the oxide capacitance, Do, is the oxide thickness, Cf is the quiescent capacitance in inversion, Ns is the substrate doping concentration, ni is the intrinsic carrier concentration, and cs and cox are the dielectric permittivities of the semiconductor and of the oxide, respectively. The value of surface generation velocity obtained from the data in Figure 3 is 90 cmls over most of the time span. 4 - CONCLUSIONS The I-DLTS method is an extremely useful addition to the assessment methods available for MOS devices. It complements the long-established Zerbst method and it is possible to construct a Zerbst plot from the I-DLTS measurement which can result in remarkably noise-free data. This allows the direct measurement of sub-micron devices. Very importantly, the combination of I-DLTS data with the Zerbst analysis permits a complete separation of the various mechanisms giving their dependence on depletion width and the activation energy of the process. The technique uses the high sensitivity of a conventional DLTS system for accurately measuring inversion layer formation on devices of any size, down to sub-micron dimensions. It is a routine matter to repeat the isothermal measurement at several temperatures and produce an Arrhenius plot of the DLTS peaks. This yields the activation energies of the dominant generation processes. As it is possible to re-construct the capacitance transient which gave rise to the DLTS peak a complete Zerbst analysis can be carried out on the highly accurate capacitance-time data. Since the temperature of the sample is held constant throughout a scan, the time taken for a measurement is not limited by the time required to change and measure the temperature of the sample. Moreover, it is not necessary to stress the sample by continuously sweeping it through a wide range of temperatures. 5 - REFERENCES Ill ZERsST M. 2. Angew Phys. 22 (1966) KANG J.S. and SCHRODER D.K., Phys. Stat. Sol. (1985) PEARCE N.O., HAMILTON B., PEAKER A.R., and CRAVEN R.A., J. Appl. Phys. 62 (1987) SCHRODER D.K., and NATHANSON H.C., Solid-State Electronics 13 (1970) 577

5 Figure 1 A family of DLTS processed inversion transients plotted as a function of rate window. The scans were taken at 342K, 332K, 322K, 312K, 302K and 292K. The highest temperature trace is on the right. lo-' 1 lo lo2 RATE WINDOW (s-1) Figure 2 An Arrhenius plot of data derived from the position of the peaks in Figure- 1. Figure 3 (a) A normalised capacitance time plot reconstructed from the I-DLTS measurement at 332K shown in Figure 1, and (b) The Zerbst plot derived from (a). The horizontal portion shows that the carrier generation process is not a function of depletion width and so the minority carriers are produced at the semiconductor surface or diffuse to the depletion region from the bulk.