74HC2G08; 74HCT2G General description. 2. Features and benefits. 3. Ordering information. Dual 2-input AND gate

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Rev. 5 8 October 2013 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a dual 2-input ND gate. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to s in excess of V CC. Wide supply range from 2.0 V to 6.0 V Input levels: For 74HC2G08: CMOS level For 74HCT2G08: TTL level Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Multiple package options ESD protection: HBM JESD22-114E exceeds 2000 V MM JESD22-115- exceeds 200 V Specified from 40 C to +85 C and 40 C to +125 C Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC2G08DP 40 C to +125 C TSSOP8 plastic thin shrink small outline package; 8 leads; SOT505-2 74HCT2G08DP 74HC2G08DC 40 C to +125 C VSSOP8 body width 3 mm; lead length 0.5 mm plastic very thin shrink small outline package; 8 leads; SOT765-1 74HCT2G08DC 74HC2G08GD 74HCT2G08GD 40 C to +125 C XSON8 body width 2.3 mm plastic extremely thin small outline package; no leads; 8 terminals; body 3 2 0.5 mm SOT996-2

4. Marking Table 2. Marking code Type number Marking code [1] 74HC2G08DP H08 74HCT2G08DP T08 74HC2G08DC H08 74HCT2G08DC T08 74HC2G08GD H08 74HCT2G08GD T08 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 1B 2 2B 1Y 2Y & & 001aah788 001aah789 Fig 1. Logic symbol Fig 2. IEC logic symbol Y B mna221 Fig 3. Logic diagram (one gate) 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 2 of 15

6. Pinning information 6.1 Pinning 74HC2G08 74HCT2G08 74HC2G08 74HCT2G08 1 1B 1 2 8 7 V CC 1Y 1 1 8 V CC 2Y 3 6 2B 1B 2Y 2 3 7 6 1Y 2B GND 4 5 2 GND 4 5 2 001aak019 001aak018 Transparent top view Fig 4. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) Fig 5. Pin configuration SOT996-2 (XSON8) 6.2 Pin description Table 3. Pin description Symbol Pin Description 1, 2 1, 5 data input 1B, 2B 2, 6 data input GND 4 ground (0 V) 1Y, 2Y 7, 3 data output V CC 8 supply 7. Functional description Table 4. Function table [1] Input Output n nb ny L L L L H L H L L H H H [1] H = HIGH level; L = LOW level. 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 3 of 15

8. Limiting values Table 5. Limiting values In accordance with the bsolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply 0.5 +7.0 V I IK input clamping current V I < 0.5 V or V I >V CC + 0.5 V [1] - 20 m I OK output clamping current V O < 0.5 V or V O >V CC + 0.5 V [1] - 20 m I O output current V O = 0.5 V to (V CC +0.5V) [1] - 25 m I CC supply current [1] - 50 m I GND ground current [1] 50 - m T stg storage temperature 65 +150 C P D dynamic power dissipation T amb = 40 C to +125 C [2] - 300 mw [1] The input and output ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 C the value of P tot derates linearly with 2.5 mw/k. For VSSOP8 package: above 110 C the value of P tot derates linearly with 8 mw/k. For XSON8 package: above 118 C the value of P tot derates linearly with 7.8 mw/k. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC2G08 74HCT2G08 Unit Min Typ Max Min Typ Max V CC supply 2.0 5.0 6.0 4.5 5.0 5.5 V V I input 0 - V CC 0 - V CC V V O output 0 - V CC 0 - V CC V T amb ambient temperature 40 +25 +125 40 +25 +125 C t/ V input transition rise V CC = 2.0 V - - 625 - - - ns/v and fall rate V CC = 4.5 V - 1.67 139-1.67 139 ns/v V CC = 6.0 V - - 83 - - - ns/v 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 4 of 15

10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max 74HC2G08 V IH HIGH-level input V CC = 2.0 V 1.5 1.2-1.5 - V V CC = 4.5 V 3.15 2.4-3.15 - V V CC = 6.0 V 4.2 3.2-4.2 - V V IL LOW-level input V CC = 2.0 V - 0.8 0.5-0.5 V V CC = 4.5 V - 2.1 1.35-1.35 V V CC = 6.0 V - 2.8 1.8-1.8 V V OH HIGH-level output V I = V IH or V IL I O = 20 ; V CC = 2.0 V 1.9 2.0-1.9 - V I O = 20 ; V CC = 4.5 V 4.4 4.5-4.4 - V I O = 20 ; V CC = 6.0 V 5.9 6.0-5.9 - V I O = 4.0 m; V CC = 4.5 V 4.13 4.32-3.7 - V I O = 5.2 m; V CC = 6.0 V 5.63 5.81-5.2 - V V OL LOW-level output V I = V IH or V IL I O = 20 ; V CC = 2.0 V - 0 0.1-0.1 V I O = 20 ; V CC = 4.5 V - 0 0.1-0.1 V I O = 20 ; V CC = 6.0 V - 0 0.1-0.1 V I O = 4.0 m; V CC = 4.5 V - 0.15 0.33-0.4 V I O = 5.2 m; V CC = 6.0 V - 0.16 0.33-0.4 V I I input leakage current V I =V CC or GND; V CC =6.0V - - 1.0-1.0 I CC supply current per input pin; V I =V CC or GND; - - 10-20 I O =0; V CC =6.0V C I input capacitance - 1.5 - - - pf 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 5 of 15

Table 7. Static characteristics continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max 74HCT2G08 V IH HIGH-level input V CC = 4.5 V to 5.5 V 2.0 1.6-2.0 - V V IL LOW-level input V CC = 4.5 V to 5.5 V - 1.2 0.8-0.8 V V OH HIGH-level output V I = V IH or V IL I O = 20 ; V CC = 4.5 V 4.4 4.5-4.4 - V I O = 4.0 m; V CC = 4.5 V 4.13 4.32-3.7 - V V OL LOW-level output V I = V IH or V IL I O = 20 ; V CC = 4.5 V - 0 0.1-0.1 V I O = 4.0 m; V CC = 4.5 V - 0.15 0.33-0.4 V I I input leakage current V I =V CC or GND; V CC =5.5V - - 1.0-1.0 I CC supply current V I =V CC or GND; I O =0; - - 10-20 V CC =5.5V I CC additional supply per input; V CC = 4.5 V to 5.5 V; - - 375-410 current V I =V CC 2.1 V; I O =0 C I input capacitance - 1.5 - - - pf [1] ll typical values are measured at T amb = 25 C. 11. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max 74HC2G08 t pd propagation delay n and nb to ny; see Figure 6 [2] V CC = 2.0 V - 26 95-110 ns V CC = 4.5 V - 9 19-22 ns V CC = 5.0 V; C L = 15 pf - 9 - - - ns V CC = 6.0 V - 8 16-20 ns t t transition time see Figure 6 [3] V CC = 2.0 V - 20 95-125 ns V CC = 4.5 V - 7 19-25 ns V CC = 6.0 V - 6 16-20 ns C PD power dissipation capacitance V I =GNDtoV CC [4] - 10 - - - pf 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 6 of 15

Table 8. Dynamic characteristics continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ [1] Max Min Max 74HCT2G08 t pd propagation delay n and nb to ny; see Figure 6 [2] V CC = 4.5 V - 14 30-36 ns V CC = 5.0 V; C L = 15 pf - 14 - - - ns t t transition time V CC = 4.5 V; see Figure 6 [3] - 7 19-22 ns C PD power dissipation capacitance V I =GNDtoV CC 1.5 V [4] - 10 - - - pf [1] ll typical values are measured at T amb = 25 C. [2] t pd is the same as t PLH and t PHL. [3] t t is the same as t TLH and t THL. [4] C PD is used to determine the dynamic power dissipation (P D in W). P D = C PD V CC 2 f i N + (C L V CC 2 f o ) where: f i = input frequency in MHz; f o = output frequency in MHz; C L = output load capacitance in pf; V CC = supply in V; N = number of inputs switching; (C L V 2 CC f o ) = sum of outputs. 12. Waveforms V I n, nb input V M GND V OH ny output t PHL V Y V M V X t PLH V OL t THL t TLH 001aak020 Fig 6. Measurement points are given in Table 9. V OL and V OH are typical output levels that occur with the output load. Propagation delay data input (n, nb) to data output (ny) and transition time output (ny) Table 9. Measurement points Type Input Output V M V M V X V Y 74HC2G08 0.5V CC 0.5V CC 0.1V CC 0.9V CC 74HCT2G08 1.3 V 1.3 V 0.1V CC 0.9V CC 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 7 of 15

V I negative pulse 0 V 90 % V M 10 % t W V M t f t r t r t f V I positive pulse 0 V 10 % 90 % V M t W V M V CC V CC G VI DUT VO RL S1 open RT CL 001aad983 Fig 7. Test data is given in Table 10. Definitions for test circuit: R T = Termination resistance should be equal to output impedance Z o of the pulse generator. C L = Load capacitance including jig and probe capacitance. R L = Load resistance. S1 = Test selection switch. Test circuit for measuring switching times Table 10. Test data Type Input Load S1 position V I t r, t f C L R L t PHL, t PLH 74HC2G08 GND to V CC 6 ns 15 pf, 50 pf 1 k open 74HCT2G08 GND to 3 V 6 ns 15 pf, 50 pf 1 k open 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 8 of 15

13. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 D E X c y H E v M Z 8 5 2 1 ( 3 ) pin 1 index L p θ L 1 4 detail X e b p w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT max. 1 mm 1.1 0.15 0.00 2 3 b p c D (1) E (1) e H E L L p v w y Z (1) θ 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8 0 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT EUROPEN PROJECTION ISSUE DTE SOT505-2 - - - 02-01-16 Fig 8. Package outline SOT505-2 (TSSOP8) 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 9 of 15

VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 D E X c y H E v M Z 8 5 Q 2 1 pin 1 index ( 3 ) L p θ 1 4 detail X L e b p w M 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT max. 1 mm 1 0.15 0.00 2 3 b p c D (1) E (2) e H E L L p Q v w y Z (1) θ 0.85 0.60 0.12 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.5 3.2 3.0 0.4 0.40 0.15 0.21 0.19 0.2 0.13 0.1 0.4 0.1 8 0 OUTLINE VERSION REFERENCES IEC JEDEC JEIT EUROPEN PROJECTION ISSUE DTE SOT765-1 MO-187 02-06-07 Fig 9. Package outline SOT765-1 (VSSOP8) 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 10 of 15

XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 3 x 2 x 0.5 mm SOT996-2 D B E 1 detail X terminal 1 index area L 1 e 1 e b 1 4 v w C C B y 1 C C y L 2 L 8 5 X 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit (1) 1 b D E e e 1 L L 1 L 2 v w y y 1 mm max nom min 0.5 0.05 0.00 0.35 0.15 2.1 1.9 3.1 2.9 0.5 0.15 0.6 0.5 1.5 0.1 0.05 0.3 0.05 0.4 0.05 0.1 sot996-2_po Outline version SOT996-2 References IEC JEDEC JEIT European projection Issue date 07-12-21 12-11-20 Fig 10. Package outline SOT996-2 (XSON8) 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 11 of 15

14. bbreviations Table 11. cronym CMOS DUT ESD HBM MM TTL bbreviations Description Complementary Metal Oxide Semiconductor Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT2G08 v.5 20131008 Product data sheet - 74HC_HCT2G32 v.4 Modifications: For type numbers 74HC2G08GD and 74HCT2G08GD XSON8U has changed to XSON8. 74HC_HCT2G08 v.4 20090507 Product data sheet - 74HC_HCT2G08 v.3 74HC_HCT2G08 v.3 20031022 Product specification - 74HC_HCT2G08 v.2 74HC_HCT2G08 v.2 20030203 Product specification - 74HC_HCT2G08 v.1 74HC_HCT2G08 v.1 20020710 Product specification - - 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 12 of 15

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The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 13 of 15

Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. Translations non-english (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74HC_HCT2G08 ll information provided in this document is subject to legal disclaimers. NXP B.V. 2013. ll rights reserved. Product data sheet Rev. 5 8 October 2013 14 of 15

18. Contents 1 General description...................... 1 2 Features and benefits.................... 1 3 Ordering information..................... 1 4 Marking................................ 2 5 Functional diagram...................... 2 6 Pinning information...................... 3 6.1 Pinning............................... 3 6.2 Pin description......................... 3 7 Functional description................... 3 8 Limiting values.......................... 4 9 Recommended operating conditions........ 4 10 Static characteristics..................... 5 11 Dynamic characteristics.................. 6 12 Waveforms............................. 7 13 Package outline......................... 9 14 bbreviations.......................... 12 15 Revision history........................ 12 16 Legal information....................... 13 16.1 Data sheet status...................... 13 16.2 Definitions............................ 13 16.3 Disclaimers........................... 13 16.4 Trademarks........................... 14 17 Contact information..................... 14 18 Contents.............................. 15 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 2013. ll rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 8 October 2013 Document identifier: 74HC_HCT2G08