GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT standard level field-effect power transistor in a plastic envelope V DS Drain-source voltage 55 V suitable for surface mounting. Using I D Drain current (DC) 45 A trench technology the device P tot Total power dissipation 3 W features very low on-state resistance T j Junction temperature 75 C and has integral zener diodes giving R DS(ON) Drain-source on-state 4 mω ESD protection up to kv. It is resistance V GS = V intended for use in automotive and general purpose switching applications. PINNING - SOT44 PIN CONFIGURATION SYMBOL PIN gate DESCRIPTION mb d drain 3 source g mb drain 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 34) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS Drain-source voltage - - 55 V V DGR Drain-gate voltage R GS = kω - 55 V ±V GS Gate-source voltage - - 6 V I D Drain current (DC) T mb = 5 C - 45 A I D Drain current (DC) T mb = C - 3 A I DM Drain current (pulse peak value) T mb = 5 C - 8 A P tot Total power dissipation T mb = 5 C - 3 W T stg, T j Storage & operating temperature - - 55 75 C ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V C Electrostatic discharge capacitor Human body model - kv voltage, all pins ( pf,.5 kω) THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R th j-mb Thermal resistance junction to - -.45 K/W mounting base R th j-a Thermal resistance junction to Minimum footprint, FR4 5 - K/W ambient board April 998 Rev.
STATIC CHARACTERISTICS T j = 5 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V (BR)DSS Drain-source breakdown V GS = V; I D =.5 ma; 55 - - V voltage T j = -55 C 5 - - V V GS(TO) Gate threshold voltage V DS = V GS ; I D = ma. 3. 4. V T j = 75 C. - - V T j = -55 C - - 4.4 I DSS Zero gate voltage drain current V DS = 55 V; V GS = V; -.5 µa T j = 75 C - - 5 µa I GSS Gate source leakage current V GS = ± V; V DS = V -. µa T j = 75 C - - µa ±V (BR)GSS Gate source breakdown voltage I G = ± ma; 6 - - V R DS(ON) Drain-source on-state V GS = V; I D = 5 A - 9 4 mω resistance T j = 75 C - - 5 mω DYNAMIC CHARACTERISTICS T mb = 5 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT g fs Forward transconductance V DS = 5 V; I D = 5 A 4 - S C iss Input capacitance V GS = V; V DS = 5 V; f = MHz - 5 pf C oss Output capacitance - 8 34 pf C rss Feedback capacitance - 3 8 pf t d on Turn-on delay time V DD = 3 V; I D = 5 A; - 8 ns t r Turn-on rise time V GS = V; R G = Ω - 9 35 ns t d off Turn-off delay time Resistive load - 5 35 ns t f Turn-off fall time - 8 5 ns L d Internal drain inductance Measured from upper edge of drain -.5 - nh tab to centre of die L s Internal source inductance Measured from source lead - 7.5 - nh soldering point to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS T j = 5 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I DR Continuous reverse drain - - 45 A current I DRM Pulsed reverse drain current - - 6 A V SD Diode forward voltage I F = 5 A; V GS = V -.95. V I F = 4 A; V GS = V -. - t rr Reverse recovery time I F = 4 A; -di F /dt = A/µs; - 4 - ns Q rr Reverse recovery charge V GS = - V; V R = 3 V -.7 - µc April 998 Rev.
AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT W DSS Drain-source non-repetitive I D = 4 A; V DD 5 V; - - 8 mj unclamped inductive turn-off V GS = V; R GS = 5 Ω; T mb = 5 C energy 9 8 7 6 5 4 3 PD% Normalised Power Derating 4 6 8 4 6 8 Tmb / C Fig.. Normalised power dissipation. PD% = P D /P D 5 C = f(t mb ) ID / A RDS(ON) = VDS / ID DC tp = us us ms ms ms 754-55 VDS / V Fig.3. Safe operating area. T mb = 5 C I D & I DM = f(v DS ); I DM single pulse; parameter t p 9 8 7 6 5 4 3 ID% Normalised Current Derating 4 6 8 4 6 8 Tmb / C Fig.. Normalised continuous drain current. ID% = I D /I D 5 C = f(t mb ); conditions: V GS 5 V... Transient thermal impedance, Zth (K/W).5...5. D = T us ms.s s pulse width, tp (s) Fig.4. Transient thermal impedance. Z th j-mb = f(t); parameter D = t p /T P D tp T tp t April 998 3 Rev.
ID/A 8 6 9 VGS/V = 8.5 8. 5 gfs/s 6 7.5 7. 5 4 6.5 5. 4.5 4 VSD/V 6 8 Fig.5. Typical output characteristics, T j = 5 C. I D = f(v DS ); parameter V GS 6. 5.5 5 4 ID/A 6 8 Fig.8. Typical transconductance, T j = 5 C. g fs = f(i D ); conditions: V DS = 5 V 4 RDS(ON)/mOhm VGS/V = 6 a.5 BUK959-6 Rds(on) normlised to 5degC 35 6.5 7 3 5 8 9.5 5 3 4 5 6 7 8 ID/A Fig.6. Typical on-state resistance, T j = 5 C. R DS(ON) = f(i D ); parameter V GS.5 - -5 5 5 Tmb / degc Fig.9. Normalised drain-source on-state resistance. a = R DS(ON) /R DS(ON)5 C = f(t j ); I D = 5 A; V GS = 5 V ID/A 8 VGS(TO) / V 5 max. 4 BUK759-6 6 4 3 typ. min. Tj/C = 75 5 4 6 8 VGS/V Fig.7. Typical transfer characteristics. I D = f(v GS ) ; conditions: V DS = 5 V; parameter T j - -5 5 5 Tj / C Fig.. Gate threshold voltage. V GS(TO) = f(t j ); conditions: I D = ma; V DS = V GS April 998 4 Rev.
E- E- Sub-Threshold Conduction IF/A 8 E-3 % typ 98% 6 E-4 4 Tj/C = 75 5 E-5 E-6 3 4 5 Fig.. Sub-threshold drain current. I D = f(v GS) ; conditions: T j = 5 C; V DS = V GS.5 VSDS/V.5 Fig.4. Typical reverse diode current. I F = f(v SDS ); conditions: V GS = V; parameter T j Thousands pf 3.5.5 5.. VDS/V Fig.. Typical capacitances, C iss, C oss, C rss. C = f(v DS ); conditions: V GS = V; f = MHz 9 8 7 6 5 4 3 WDSS% 4 6 8 4 6 8 Tmb / C Fig.5. Normalised avalanche energy rating. W DSS % = f(t mb ); conditions: I D = 75 A VGS/V 8 6 4 VDS = 4V VDS = 44V VGS L VDS T.U.T. + - VDD -ID/ RGS R shunt 5 5 5 3 35 QG/nC Fig.3. Typical turn-on gate-charge characteristics. V GS = f(q G ); conditions: I D = 5 A; parameter V DS Fig.6. Avalanche energy test circuit. W DSS =.5 LI D BV DSS /(BV DSS V DD ) April 998 5 Rev.
RD + VDD VGS VDS - RG T.U.T. Fig.7. Switching test circuit. April 998 6 Rev.
MECHANICAL DATA Dimensions in mm Net Mass:.4 g.3 max 4.5 max.4 max max 5.4.5.54 (x).85 max (x) Fig.8. SOT44 : centre pin connected to mounting base..5 MOUNTING INSTRUCTIONS Dimensions in mm.5 9. 7.5. 3.8 Fig.9. SOT44 : soldering pattern for surface mounting. Notes. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.. Epoxy meets UL94 V at /8". 5.8 April 998 7 Rev.
DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 34). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. April 998 8 Rev.