TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X

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CMOS Digital Integrated Circuits Silicon Monolithic TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X 1. Functional Description Dual SPST Bus Switch 2. General TC7WB66CFK/L8X,TC7WB67CFK/L8X The TC7WB66CFK/L8X and TC7WB67CFK/L8X are low ON-resistance, high-speed CMOS 2-bit bus switches. These bus switches allow connections or disconnections to be made with minimal propagation delay while maintaining Low power dissipation which is the feature of CMOS. TC7WB66CFK/L8X requires the output enable (OE) input to be set low to place the output into the high impedance state,whereas the TC7WB67CFK/L8X requires the output enable (OE) input to be set high to place the output into the high impedance. These Bus switches consist of P-MOS and N-MOS structure, meaning these devices are suitable for analog signal transmission. All inputs are equipped with protector circuits to protect the device from static discharge. 3. Features (1) Operating voltage: V CC = 1.65 to 5.5 V (2) ON capacitance: C I/O = 10 pf Switch On (typ.) @V CC = 5.0 V (3) ON resistance: R ON = 4 Ω (typ.) @V CC = 4.5 V, V IS = 0 V (4) ESD performance: Machine model ±200 V, Human body model ±2000 V (5) Package: US8, MP8 4. Packaging TC7WB66CFK,TC7WB67CFK TC7WB66CL8X,TC7WB67CL8X US8 MP8 1

5. Pin Assignment TC7WB66CFK TC7WB67CFK TC7WB66CL8X TC7WB67CL8X 6. Marking TC7WB66CFK TC7WB67CFK TC7WB66CL8X TC7WB67CL8X 2

7. Block Diagram TC7WB66CFK,TC7WB66CL8X TC7WB67CFK,TC7WB67CL8X 8. Principle of Operation 8.1. Truth Table Inputs OE (TC7WB66CFK/L8X) H L Inputs OE (TC7WB67CFK/L8X) L H Function A port = B port Disconnect 9. Absolute Maximum Ratings (Note) Part Number Symbol Note Rating Unit Supply voltage Input voltage (OE, OE) Switch I/O voltage Clamp diode current Switch I/O current Power dissipation V CC /ground current Storage temperature TC7WB66CFK,TC7WB67CFK TC7WB66CL8X,TC7WB67CL8X V CC V IN V S I IK I S P D I CC /I GND T stg (Note 1) -0.5 to 7.0-0.5 to 7.0-0.5 to V CC +0.5-50 50 200 300 ±100-65 to 150 Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even destruction. Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ( Handling Precautions / Derating Concept and Methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on an FR4 board 10. Operating Ranges (Note) V ma mw ma Symbol Note Rating Unit Supply voltage Input voltage (OE, OE) Switch I/O voltage Operating temperature Input rise time Input fall time Note: V CC V IN V S T opr dt/dv dt/dv 3 1.65 to 5.5 0 to 5.5 0 to V CC -40 to 85 0 to 10 0 to 10 The operating ranges must be maintained to ensure the normal operation of the device. Unused control inputs must be tied to either V CC or GND. V ns/v

11. Electrical TC7WB66CFK/L8X,TC7WB67CFK/L8X 11.1. DC (Unless otherwise specified, T a = -40 to 85 ) High-level input voltage (OE, OE) Low-level input voltage (OE, OE) Input leakage current (OE, OE) Switch OFF-state leakage current ON-resistance Quiescent supply current Part Number TC7WB66- CFK/L8X TC7WB67- CFK/L8X Symbol V IH V IL I IN I SZ R ON I CC I CC Note (Note 1), (Note 2) Test Condition V IN = 0 to 5.5 V A, B = 0 to V CC, OE = GND A, B = 0 to V CC, OE = V CC V IS = 0 V, I IS = 30 ma V IS = 2.4 V, I IS = 30 ma V IS = 4.5 V, I IS = 30 ma V IS = 0 V, I IS = 24 ma V IS = 3.0 V, I IS = 24 ma V IS = 0 V, I IS = 8 ma V IS = 2.3 V, I IS = 8 ma V IS = 0 V, I IS = 4 ma V IS = 1.65 V, I IS = 4 ma V IN = V CC or GND, I OUT = 0 A V IN = V CC - 0.6 V V CC (V) 1.65 to 1.95 2.3 to 5.5 1.65 to 1.95 2.3 to 5.5 1.65 to 5.5 1.65 to 5.5 1.65 to 5.5 4.5 4.5 4.5 3.0 3.0 2.3 2.3 1.65 1.65 5.5 5.5 Min 0.8 V CC 0.7 V CC Typ. 4 5 6 5 7 6 9 8 15 Max 0.2 V CC 0.3 V CC Note 1: All typical values are at T a = 25. Note 2: Measured by the voltage drop between A and B pins at the indicated current through the switch. On-resistance is determined by the lower of the voltages on the two (A or B) pins. 11.2. AC (Unless otherwise specified, T a = -40 to 85 ) ±1.0 ±10 ±10 7 12 10 9 14 12 18 20 30 10 50 Unit V µa Ω µa Symbol Note Test Condition V CC (V) Min Max Unit 3-state output enable time t PZL /t PZH See Fig. 11.2.1, 11.2.2, Table 11.2.1 5.0 ± 0.5 3.3 ± 0.3 4 6 ns 2.5 ± 0.2 9 1.8 ± 0.15 18 3-state output disable time t PLZ /t PHZ See Fig. 11.2.1, 11.2.2, Table 11.2.1 5.0 ± 0.5 3.3 ± 0.3 4.5 7 2.5 ± 0.2 9 1.8 ± 0.15 18 4

11.3. Capacitive (Note) (Unless otherwise specified, T a = 25 ) Part Number Symbol Note Test Condition V CC (V) Typ. Unit Input capacitance (OE, OE) C IN V IN = 0 V 5.0 4 pf Switch terminal OFFcapacitance TC7WB66CFK/L8X TC7WB67CFK/L8X C I/O OE = GND, V I/O = 0 V OE = V CC, V I/O = 0 V 5.0 5.0 5 5 Switch terminal ONcapacitance TC7WB66CFK/L8X TC7WB67CFK/L8X C I/O OE = V CC, V I/O = 0 V OE = GND, V I/O = 0 V 5.0 5.0 10 10 Note: Parameter guaranteed by design. Fig. 11.2.1 AC Test Circuit Table 11.2.1 Parameter for AC Test Circuit Parameter t PLZ, t PZL t PHZ, t PZH Switch 2 V CC GND Fig. 11.2.2 AC Waveform t PLZ, t PHZ, t PZL, t PZH 5

12. Rise and Fall Time (t r /t f ) The t r(out) and t f(out) values of the output signals are affected by the CR time constant of the input, which consists of the switch terminal capacitance (C I/O ) and the on-resistance (R ON ) of the input. In practice, the t r(out) and t f(out) values are also affected by the circuit's capacitance and resistance components other than the capacitance of TC7WB66CFK/L8X, TC7WB67CFK/L8X The t r /t f(out) values can be approximated as follows. (Figure 12.1, Table 12.1 shows the test circuit.) t r /t f(out) (approx) = - (C I/O + C L ) (R DRIVE + R ON ) ln (((V OH - V OL ) - V M ) / (V OH - V OL )) Where, R DRIVE is the output impedance of the previous-stage circuit. Calculation example: t r(out) (approx) = - (10 + 15) E - 12 (120 + 4) ln (((4.5-0) - 2.25) / (4.5-0)) = 2.1 ns Calculation conditions: V CC = 4.5 V, C L = 15 pf, R DRIVE = 120 Ω (output impedance of the previous IC), V M = 2.25 V (V CC /2) Output of the previous IC = digital (i.e., high-level voltage = V CC, low-level voltage = GND) Fig. 12.1 Calculation Circuit Table 12.1 Calculation Circuit V CC = 5.0 ± 0.5 V V CC = 3.3 ± 0.3 V V CC = 2.5 ± 0.2 V V CC = 1.8 ± 0.15 V V M V CC /2 V CC /2 V CC /2 V CC /2 6

13. Curves (Note) Fig. 13.1 R ON - V IS Note: The above characteristics curves are presented for reference only and not guaranteed by production test, unless otherwise noted. 7

Package Dimensions Unit: mm TC7WB66CFK,TC7WB67CFK Weight: 0.01 g (typ.) TOSHIBA: SSOP8-P-0.50S Nickname: US8 Package Name(s) 8

Package Dimensions Unit: mm TC7WB66CL8X,TC7WB67CL8X Weight: 0.0039 g (typ.) Package Name(s) TOSHIBA: P-UFLGA8-0202-0.50-002 Nickname: MP8 9

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