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Online Instructor s Manual for Digital Fundamentals Eleventh Edition Thomas L. Floyd Boston Columbus Indianapolis New York San Francisco Hoboken Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal Toronto Delhi Mexico City Sao Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo

Copyright 015 Pearson Education, Inc., publishing as Prentice Hall, Hoboken, New Jersey and Columbus, Ohio. All rights reserved. Manufactured in the United States of America. This publication is protected by Copyright, and permission should be obtained from the publisher prior to any prohibited reproduction, storage in a retrieval system, or transmission in any form or by any means, electronic, mechanical, photocopying, recording, or likewise. To obtain permission(s) to use material from this work, please submit a written request to Pearson Education, Inc., Permissions Department, 1 River Street, Hoboken, New Jersey. Many of the designations by manufacturers and seller to distinguish their products are claimed as trademarks. Where those designations appear in this book, and the publisher was aware of a trademark claim, the designations have been printed in initial caps or all caps. 10 9 7 6 5 4 3 1 ISBN-13: 97-0-13-73795-1 ISBN-10: 0-13-73795-7

CONTENTS PART 1: PROBLEM SOLUTIONS...1 CHAPTER 1 Introductory Concepts... CHAPTER Number Systems, Operations, and Codes... CHAPTER 3 Logic Gates...4 CHAPTER 4 Boolean Algebra and Logic Simplification...37 CHAPTER 5 Combinational Logic Analysis...66 CHAPTER 6 Functions of Combinational Logic...10 CHAPTER 7 Latches, Flip-Flops, and Timers...135 CHAPTER Shift Registers...135 CHAPTER 9 Counters...15 CHAPTER 10 Programmable Logic...11 CHAPTER 11 Data Storage...190 CHAPTER 1 Signal Conversion and Processing...00 CHAPTER 13 Data Transmission...0 CHAPTER 14 Data Processing and Control...1 CHAPTER 15 Integrated Circuit Technologies...4 PART : APPLIED LOGIC SOLUTIONS...31 CHAPTER 4...3 CHAPTER 5...36 CHAPTER 6...39 CHAPTER 7...44 CHAPTER...47 CHAPTER 9...4 CHAPTER 10...49 PART 3: LABORATORY SOLUTIONS FOR EXPERIMENTS IN DIGITAL FUNDAMENTALS by David Buchla and Doug Joksch...51 PART 4: MULTISIM PROBLEM SOLUTIONS...303 iii

PART 1 Problem Solutions

Chapter 1 CHAPTER 1 INTRODUCTORY CONCEPTS Section 1-1 Digital and Analog Quantities 1. Digital data can be transmitted and stored more efficiently and reliably than analog data. Also, digital circuits are simpler to implement and there is a greater immunity to noisy environments.. Pressure is an analog quantity. 3. A clock, a thermometer, and a speedometer can have either an analog or a digital output. Section 1- Binary Digits, Logic Levels, and Digital Waveforms 4. In positive logic, a1 is represented by a HIGH level and a 0 by a LOW level. In negative logic, a 1 is represented by a LOW level, and a 0 by a HIGH level. 5. HIGH = 1; LOW = 0. See Figure 1-1. 6. A 1 is a HIGH and a 0 is a LOW: (a) HIGH, LOW, HIGH, HIGH, HIGH, LOW, HIGH (b) HIGH, HIGH, HIGH, LOW, HIGH, LOW, LOW, HIGH

Chapter 1 7. See Figure 1-. Ampl = 10 V tpw.7 μs. T = 4 ms. See Figure 1-3. 9. f = 1 = T 1 4 ms = 0.5 khz = 50 Hz 10. The waveform in Figure 1-61 is periodic because it repeats at a fixed interval. 11. t W = ms; T = 4 ms tw ms % duty cycle = 100 = 100 = 50% T 4 ms 1. See Figure 1-4. 3

Chapter 1 13. Each bit time = 1 μs Serial transfer time = ( bits)(1 μs/bit) = μs Parallel transfer time = 1 bit time = 1 μs 14. 1 1 T f 3.5 GHz = 0.6 ns Section 1-3 Basic Logic Functions 15. L ON = SW1 SW SW1 SW. An AND gate produces a HIGH output only when all of its inputs are HIGH. 17. AND gate. See Figure 1-5. 1. An OR gate produces a HIGH output when either or both inputs are HIGH. An exclusive-or gate produces a HIGH if one input is HIGH and the other LOW. Section 1-4 Combinational and Sequential Logic Functions 19. See Figure 1-6. 4

Chapter 1 1 0. T = = 100 μs 10 khz 100 ms Pulses counted = 100 μ s = 1000 1. See Figure 1-7. Section 1-5 Introduction to Programmable Logic. The following do not describe PLDs: VHDL, AHDL 3. (a) SPLD: Simple Programmable Logic Device (b) CPLD: Complex Programmable Logic Device (c) HDL: Hardware Description Language (d) FPGA: Field-Programmable Gate Array (e) GAL: Generic Array Logic 4. (a) Design entry: The step in a programmable logic design flow where a description of the circuit is entered in either schematic (graphic) form or in text form using an HDL. (b) Simulation: The step in a design flow where the entered design is simulated based on defined input waveforms. (c) Compilation: A program process that controls the design flow process and translates a design source code to object code for testing and downloading. (d) Download: The process in which the design is transferred from software to hardware. 5. Place-and-route or fitting is the process where the logic structures described by the netlist are mapped into the actual structure of the specific target device. This results in an output called a bitstream. Section 1-6 Fixed-Function Logic Devices 6. Circuits with complexities of from 100 to 10,000 equivalent gates are classified as large scale integration (LSI). 7. The pins of an SMT are soldered to the pads on the surface of a pc board, whereas the pins of a DIP feed through and are soldered to the opposite side. Pin spacing on SMTs is less than on DIPs and therefore SMT packages are physically smaller and require less surface area on a pc board. 5

Chapter 1. See Figure 1-. Section 1-7 Test and Measurement Instruments 9. Amplitude = top of pulse minus base line V = V 1 V = 7 V 30. Amplitude = (3 div)( V /div) = 6 V. 31. T = (4 div)( ms/div) = ms f = 1 1 = 15 Hz T ms 3. Record length = (Acquisition time)(sample rate) = ( ms) 1 Msamples/s = 4 ksamples Section 1- Introduction to Trouble Shooting 33. Troubleshooting is the process of recognizing, isolating, and correcting a fault or failure in a system. 34. In the half-splitting method, a point half way between the input and output is checked for the presence or absence of a signal. 35. In the signal-tracing method, a signal is tracked as it progresses through a system until a point is found where the signal disappears or is incorrect. 36. In signal subsitution, a generated signal replaces the normal input signal of a system or portion of s system. In signal injection a generated signal is injected into the system at a point where the normal signal has been determined to be faulty or missing. 37. When a failure is reported, determine when and how it failed and what are the symptoms. 6

Chapter 1 3. No output signal can be caused by no dc power, no input signal, or a short or open that prevents the signal from getting to the output. 39. An incorrect output can be caused by an incorrect dc supply voltage, improper ground, incorrect component value, or a faulty component. 40. Some types of obvious things that you look for when a system fails are visible faults such as shorted wires, solder splashes, wire clippings, bad or open connections, burned components, Also look for a signal that is incorrect in terms of amplitude shape, or frequency or the absence of a signal. 41. To isolate a fault in a system, apply half-splitting or signal tracing. 4. Two common troubleshooting instruments are the oscilloscope and the DMM. 43. When a fault has been isolated to a particular circuit board, the options are to repair the board or replace the board with a known good board. 7

CHAPTER NUMBER SYSTEMS, OPERATIONS, AND CODES Section -1 Decimal Numbers 1. (a) 136 = 1 10 3 3 10 10 1 6 10 0 = 1 1000 3 100 10 6 1 The digit 6 has a weight of 10 0 = 1 (b) 54,69 = 5 10 4 4 10 3 6 10 9 10 1 10 0 = 5 10,000 4 1000 6 100 9 10 1 The digit 6 has a weight of 10 = 100 (c) 671,90 = 6 10 5 7 10 4 1 10 3 9 10 10 1 0 10 0 = 6 100,000 7 10,000 1 1000 9 100 10 0 1 The digit 6 has a weight of 10 5 = 100,000. (a) 10 = 10 1 (b) 100 = 10 (c) 10,000 = 10 4 (d) 1,000,000 = 10 6 3. (a) 471 = 4 10 7 10 1 1 10 0 = 4 100 7 10 1 1 = 400 70 1 (b) 9,356 = 9 10 3 3 10 5 10 1 6 10 0 = 9 1000 3 100 5 10 6 1 = 9,000 300 50 6 (c) 15,000 = 1 10 5 10 4 5 10 3 = 1 100,000 10,000 5 1000 = 100,000 0,000 5,000 4. The highest four-digit decimal number is 9999. Section - Binary Numbers 5. (a) 11 = 1 1 1 0 = 1 = 3 (b) 100 = 1 0 1 0 0 = 4 (c) 111 = 1 1 1 1 0 = 4 1 = 7 (d) 1000 = 1 3 0 0 1 0 0 = (e) 1001 = 1 3 0 0 1 1 0 = 1 = 9 (f) 1100 = 1 3 1 0 1 0 0 = 4 = 1 (g) 1011 = 1 3 0 1 1 1 0 = 1 = 11 (h) 1111 = 1 3 1 1 1 1 0 = 4 1 = 15

Chapter 6. (a) 1110 = 1 3 1 1 1 = 4 = 14 (b) = 1 3 1 1 = = 10 (c) 11100 = 1 4 1 3 1 = 4 = (d) 10000 = 1 4 = (e) 1 = 1 4 1 1 0 = 4 1 = 1 (f) 11101 = 1 4 1 3 1 1 0 = 4 1 = 9 (g) 10111 = 1 4 1 1 1 1 0 = 4 1 = 3 (h) 11111 = 1 4 1 3 1 1 1 1 0 = 4 1 = 31 7. (a) 110011.11 = 1 5 1 4 1 1 1 0 1 1 1 = 3 1 0.5 0.5 = 51.75 (b) 10.01 = 1 5 1 3 1 1 1 = 3 0.5 = 4.5 (c) 1000001.111 = 1 6 1 0 1 1 1 1 3 = 64 1 0.5 0.5 0.15 = 65.75 (d) 1111000.101 = 1 6 1 5 1 4 1 3 1 1 1 3 = 64 3 0.5 0.15 = 10.65 (e) 1011100.1 = 1 6 1 4 1 3 1 1 1 1 3 1 5 = 64 4 0.5 0.15 0.0315 = 9.6565 (f) 1110001.0001 = 1 6 1 5 1 4 1 0 1 4 (g) = 64 3 1 0.065 = 113.065 101. = 1 6 1 4 1 3 1 1 1 1 1 3 = 64 0.5 0.15 = 90.65 (h) 1111111.11111 = 1 6 1 5 1 4 1 3 1 1 1 1 0 1 1 1 1 3 1 4 1 5 = 64 3 4 1 0.5 0.5 0.15 0.065 0.0315 = 17.9675. (a) 1 = 3 (b) 3 1 = 7 (c) 4 1 = 15 (d) 5 1 = 31 (e) 6 1 = 63 (f) 7 1 = 17 (g) 1 = 55 (h) 9 1 = 511 (i) 10 1 = 103 (j) 11 1 = 047 9. (a) ( 4 1) < 17 < ( 5 1); 5 bits (b) ( 5 1) < 35 < ( 6 1); 6 bits (c) ( 5 1) < 49 < ( 6 1); 6 bits (d) ( 6 1) < 6 < ( 7 1); 7 bits (e) ( 6 1) < 1 < ( 7 1); 7 bits (f) ( 6 1) < 114 < ( 7 1); 7 bits (g) ( 7 1) < 13 < ( 1); bits (h) ( 7 1) < 05 < ( 1); bits 9

Chapter 10. (a) 0 through 7: 000, 001, 010, 011, 100, 101, 110, 111 (b) through 15: 1000, 1001,, 1011, 1100, 1101, 1110, 1111 (c) through 31: 10000, 10001, 10010, 10011, 0, 1, 10110, 10111, 11000, 11001, 1, 11011, 11100, 11101, 11110, 11111 (d) 3 through 63: 100000, 100001, 100010, 100011, 100100, 100101, 100110, 100111, 0, 01, 10, 11, 101100, 101101, 101110, 101111, 110000, 110001, 110010, 110011, 10, 11, 110110, 110111, 111000, 111001, 11, 111011, 111100, 111101, 111110, 111111 (e) 64 through 75: 1000000, 1000001, 1000010, 1000011, 1000100, 1000101, 1000110, 1000111, 1001000, 1001001, 100, 1001011 Section -3 Decimal-to-Binary Conversion 11. (a) 10 = = 3 1 = (b) 17 = 1 = 4 0 = 10001 (c) 4 = = 4 3 = 11000 (d) 4 = 3 = 5 4 = 110000 (e) 61 = 3 4 1 = 5 4 3 0 = 111101 (f) 93 = 64 4 1 = 6 4 3 0 = 1011101 (g) 15 = 64 3 4 1 = 6 5 4 3 0 = 1111101 (h) = 1 3 = 7 5 4 3 1 = 1011 1. (a) 0.3 0.00 0.5 0.065 0.0 0.0 0.00715 = 0.001 (b) 0.46 0.0 0.0 0.15 0.065 0.0315 0.01565 = 0.001111 (c) 0.091 0.0 0.0 0.0 0.065 0.0315 0.0 0.0 0.0039065 = 0.0001101 10

Chapter 13. (a) 15 = 7, R = 1( LSB) (b) 1 = 10, R = 1 (LSB) (c) = 14, R = 0 (LSB) 7 = 3, R = 1 10 = 5, R = 0 14 = 7, R = 0 3 = 1, R = 1 5 =, R = 1 7 = 3, R = 1 1 = 0, R = 1 (MSB) = 1, R = 0 3 = 1, R = 1 1 = 0, R = 1 (MSB) 1 = 0, R = 1 (MSB) (d) 34 = 17, R = 0 (LSB) 17 =, R = 1 = 4, R = 0 4 =, R = 0 = 1, R = 0 1 = 0, R = 1 (MSB) (e) 40 = 0, R = 0 (LSB) 0 = 10, R = 0 10 = 5, R = 0 5 =, R = 1 = 1, R = 0 1 = 0, R = 1 (MSB) (f) 59 = 9, R = 1 (LSB) 9 = 14, R = 1 14 = 7, R = 0 7 = 3, R = 1 3 = 1, R = 1 1 = 0, R = 1 (MSB) (g) 65 = 3, R = 1 (LSB) (h) 73 = 36, R = 1 (LSB) 3 =, R = 0 36 = 1, R = 0 =, R = 0 1 = 9, R = 0 = 4, R = 0 9 = 4, R = 1 4 =, R = 0 4 =, R = 0 = 1, R = 0 = 1, R = 0 1 = 0, R = 1 (MSB) 1 = 0, R = 1 (MSB) 11

Chapter 14. (a) 0.9 = 1.96 1 (MSB) (b) 0.347 = 0.694 0 (MSB) 0.96 = 1.9 1 0.694 = 1.3 1 0.9 = 1.4 1 0.3 = 0.776 0 0.4 = 1.6 1 0.776 = 1.55 1 0.6 = 1.36 1 0.55 = 1.104 1 0.36 = 0.7 0 0.104 = 0.0 0 continue if more accuracy is desired 0.0 = 0.4 0 0.111110 continue if more accuracy is desired 0.0101100 (c) 0.90 = 1.056 1 (MSB) 0.056 = 1.611 1 0.611 = 1.4 1 0.4 = 0.444 0 0.444 = 0.96 0 0.96 = 1.779 1 0.779 = 1.554 1 continue if more accuracy is desired 0.1110011 Section -4 Binary Arithmetic 15. (a) 11 01 100 (b) 10 10 100 (c) 101 011 1000 (d) 111 110 1101 (e) 1001 0101 1110 (f) 1101 1011 11000. (a) 11 01 10 (b) 101 100 001 (c) 110 101 001 (d) 1110 0011 1011 (e) 1100 1001 0011 (f) 1 10111 00011 1

Chapter 17. (a) (e) 11 11 11 11 1001 1101 1101 1101 0000 1101 1101 1001 (b) (f) 100 10 000 100 1000 1110 1101 1110 0000 1110 1110 10110110 (c) 111 101 111 000 111 100011 (d) 1001 110 0000 1001 1001 110110 1. (a) 100 1001 1100 = 010 (b) = 0011 (c) = 0011 10 0011 0100 Section -5 Complements of Binary Numbers 19. Zero is represented in 1 s complement as all 0 s (for 0) or all 1 s (for 0). 0. Zero is represented by all 0 s only in s complement. 1. (a) The 1 s complement of 101 is 010. (b) The 1 s complement of 110 is 001. (c) The 1 s complement of is 0101. (d) The 1 s complement of 1111 is 0000. (e) The 1 s complement of 111 is 000. (f) The 1 s complement of 00001 is 11110.. Take the 1 s complement and add 1: (a) 01 1 = 10 (b) 000 1 = 001 (c) 0110 1 = 0111 (d) 0010 1 = 0011 (e) 00011 1 = 00100 (f) 01100 1 = 01101 (g) 01001111 1 = 0000 (h) 11000010 1 = 11000011 Section -6 Signed Numbers 3. (a) Magnitude of 9 = 0011101 (b) Magnitude of 5 = 101 9 = 00011101 5 = 1101 (c) Magnitude of 100 10 = 1100100 (d) Magnitude of 13 = 1111011 100 = 01100100 13 = 11111011 13

Chapter 4. (a) Magnitude of 34 = 0100010 (b) Magnitude of 57 = 0111001 34 = 11011101 57 = 00111001 (c) Magnitude of 99 = 1100011 (d) Magnitude of 115 = 1110011 99 = 10011100 115 = 01110011 5. (a) Magnitude of 1 = 1100 (b) Magnitude of 6 = 1000100 1 = 00001100 6 = 10111100 (c) Magnitude of 101 10 = 1100101 (d) Magnitude of 15 = 1111101 101 10 = 01100101 15 = 10000011 6. (a) 10011001 = 5 (b) 0110 = 1 (c) 10111111 = 63 7. (a) 10011001 = (01100110) = 10 (b) 0110 = (110) = 1 (c) 10111111 = (1000000) = 64. (a) 10011001 = (1100111) = 103 (b) 0110 = (110) = 1 (c) 10111111 = (1000001) = 65 9. (a) 011111000011 sign = 0 1.1111000011 14 exponent = 17 14 141 = 10001101 Mantissa = 1111000011000000000 0100011011111000011000000000 (b) 100110000011000 sign = 1 1.10000011000 11 exponent = 17 11 = 13 = 1000 Mantissa = 11000001100000000000000 1100011000001100000000000000 30. (a) 1100000001001110001000000000 Sign = 1 Exponent = 10000001 = 19 17 = Mantissa = 1.01001001110001 = 101.001001110001 101.001001110001 = 5.15579 (b) 0110011001000011110100000000 Sign = 0 Exponent = 11001100 = 04 17 = 77 Mantissa = 1.10000111101 1.10000111101 77 14

Chapter Section -7 Arithmetic Operations with Signed Numbers 31. (a) 33 = 00100001 00100001 15 = 00001111 00001111 00110000 (c) 46 = 00101110 1010 46 = 1010 00011001 5 = 00011001 1111 (b) 56 = 00111000 00111000 7 = 00011011 11100101 7 = 11100101 00011101 (d) 110 10 = 01101110 10010010 110 10 = 10010010 1100 4 = 0100 100111110 4 = 1100 3. (a) 00010110 (b) 01110000 00110011 1111 01001001 100011111 33. (a) 10001100 (b) 11011001 00111001 11100111 11000101 11000000 34. (a) 00110011 00110011 00010000 11110000 1 00100011 (b) 01100101 01100101 1100 00011000 01111101 35. 0110 0110 11110001 00001111 0110 0110 100111110 0110 1011100110 0110 11000110110 Changing to s complement with sign: 10011100 36. 01000100 = 00000010 00011001 6 =, remainder of 1 5 Section - Hexadecimal Numbers 37. (a) 3 = 0011 1000 (b) 59 = 0101 1001 (c) A14 = 0001 0100 (d) 5C = 0101 1100 1000 (e) 4100 = 0100 0001 0000 0000 (f) FB17 = 1111 1011 0001 0111 (g) A9D = 1000 1001 1101 15

Chapter 3. (a) 1110 = E (b) 10 = (c) 0001 0111 = 17 (d) 0110 = A6 (e) 0011 1111 0000 = 3F0 (f) 1001 1000 0010 = 9 39. (a) 3 = 1 3 0 = 3 3 = 35 (b) 9 = 9 1 0 = 144 = 146 (c) 1A = 1 1 10 0 = 10 = 6 (d) D = 1 13 0 = 1 13 = 141 (e) F3 = 15 1 3 0 = 40 3 = 43 (f) EB = 14 1 11 0 = 4 11 = 35 (g) 5C = 5 1 1 0 = 10 19 = 1474 (h) 700 = 7 = 179 40. (a) = 0, remainder = hexadecimal number = (b) 14 = 0, remainder = 14 = E hexadecimal number = E (c) 33 =, remainder = 1 (LSD) (d) 5 = 3, remainder = 4 (LSD) = 0, remainder = 3 = 0, remainder = 3 hexadecimal number = 1 hexadecimal number = 34 (e) 4 = 17, remainder = 1 = C (LSD) (f) 90 = 10, remainder = 10 = A (LSD) 17 = 1, remainder = 1 10 = 11, remainder = 4 1 = 0, remainder = 1 11 = 0, remainder = 11 = B hexadecimal number = 11C hexadecimal number = B4A (g) 4019 = 51, remainder = 3 (LSD) (h) 6500 = 406, remainder = 4 (LSD) 51 = 15, remainder = 11 = B 406 = 5, remainder = 6 15 = 0, remainder = 15 = F 5 = 1, remainder = 9 hexadecimal number = FB3 1 = 0, remainder = 1 hexadecimal number = 1964 41. (a) 37 9 = 60 (b) A0 6B = 10B (c) FF BB = 1BA

Chapter 4. (a) 51 40 = 11 (b) C 3A = E (c) FD = 75 Section -9 Octal Numbers 43. (a) 1 = 1 1 0 = = 10 (b) 7 = 1 7 0 = 7 = 3 (c) 56 = 5 1 6 0 = 40 6 = 46 (d) 64 = 6 1 4 0 = 4 4 = 5 (e) 103 = 1 3 0 = 64 3 = 67 (f) 557 = 5 5 1 7 0 = 30 40 7 = 367 (g) 3 = 1 6 1 3 0 = 64 4 3 = 115 (h) 104 = 1 3 1 4 0 = 51 4 = 53 (i) 7765 = 7 3 7 6 1 5 0 = 354 44 4 5 = 405 44. (a) 15 = 1, remainder = 7 (LSD) (b) 7 = 3, remainder = 3 (LSD) 1 = 0, remainder =1 3 = 0, remainder = 3 octal number = 17 octal number = 33 (c) 46 = 5, remainder = 6 (LSD) (d) 70 =, remainder = 6 (LSD) 5 = 0, remainder = 5 = 1, remainder = 0 octal number = 56 1 = 0, remainder = 1 octal number = 106 (e) 100 = 1, remainder = 4 (LSD) (f) 14 = 17, remainder = 6 (LSD) 1 = 1, remainder = 4 17 =, remainder = 1 1 = 0, remainder = 1 octal number = 144 = 0, remainder = octal number = (g) 19 = 7, remainder = 3 (LSD) (h) 435 = 54, remainder = 3 (LSD) 7 = 3, remainder = 3 54 = 6, remainder = 6 3 = 0, remainder = 3 octal number = 333 6 = 0, remainder = 6 octal number = 663 17

45. (a) 13 = 001 011 (b) 57 = 101 111 (c) 101 = 001 000 001 (d) 31 = 011 010 001 (e) 540 = 101 100 000 (f) 4653 = 100 110 101 011 (g) 1371 = 001 011 010 111 001 (h) 45600 = 100 101 110 000 000 (i) 10013 = 001 000 000 010 001 011 46. (a) 111 = 7 (b) 010 = (c) 110 111 = 67 (d) 101 010 = 5 (e) 001 100 = 14 (f) 001 011 110 = 136 (g) 101 100 011 001 = 5431 (h) 010 110 000 011 = 603 (i) 111 111 101 111 000 = 77570 Section -10 Binary Coded Decimal (BCD) 47. (a) 10 = 0001 0000 (b) 13 = 0001 0011 (c) 1 = 0001 1000 (d) 1 = 0010 0001 (e) 5 = 0010 0101 (f) 36 = 0011 0110 (g) 44 = 0100 0100 (h) 57 = 0101 0111 (i) 69 = 0110 1001 (j) 9 = 1001 1000 (k) 15 = 0001 0010 0101 (l) 156 = 0001 0101 0110 4. (a) 10 = 4 bits binary, bits BCD (b) 13 = 1101 4 bits binary, bits BCD (c) 1 = 10010 5 bits binary, bits BCD (d) 1 = 1 5 bits binary, bits BCD (e) 5 = 11001 5 bits binary, bits BCD (f) 36 = 100100 6 bits binary, bits BCD (g) 44 = 101100 6 bits binary, bits BCD (h) 57 = 111001 6 bits binary, bits BCD (i) 69 = 1000101 7 bits binary, bits BCD (j) 9 = 1100010 7 bits binary, bits BCD (k) 15 = 1111101 7 bits binary, 1 ibts BCD (l) 156 = 10011100 bits binary, 1 bits BCD 1

Chapter 49. (a) 104 = 0001 0000 0100 (b) 1 = 0001 0010 1000 (c) 13 = 0001 0011 0010 (d) 150 = 0001 0101 0000 (e) = 0001 1000 0110 (f) 10 = 0010 0001 0000 (g) 359 = 0011 0101 1001 (h) 547 = 0101 0100 0111 (i) 1051 = 0001 0000 0101 0001 50. (a) 0001 = 1 (b) 0110 = 6 (c) 1001 = 9 (d) 0001 1000 = 1 (e) 0001 1001 = 19 (f) 0011 0010 = 3 (g) 0100 0101 = 45 (h) 1001 1000 = 9 (i) 1000 0111 0000 = 70 51. (a) 1000 0000 = 0 (b) 0010 0011 0111 = 37 (c) 0011 0100 0110 = 346 (d) 0100 0010 0001 = 41 (e) 0111 0101 0100 = 754 (f) 1000 0000 0000 = 00 (g) 1001 0111 1000 = 97 (h) 0001 0110 1000 0011 = 3 (i) 1001 0000 0001 1000 = 901 (j) 0110 0110 0110 0111 = 6667 5. (a) 0010 0001 0011 (d) 1000 0001 1001 (g) 01000000 01000111 10000111 (b) 0101 0011 1000 (e) 00011000 00010001 0001 (h) 10000101 01000111 10000111 (c) 0111 0010 1001 (f) 01100100 00110011 10010111 19

Chapter 0 53. (a) 0000 0110 1110 0110 1000 (c) 00010111 0110 10001 1000 1001 (e) 0010 0110 01001100 00100111 00100101 (g) 00011001 01100110 100101111 10010111 10011000 (b) 00010010 0110 1100 0101 0111 (d) 00010110 0110 10000 0111 1001 (f) 000100001001 0110 1001 01011000 0001 (h) 000100100101 0110 11000101 011100001000 01100001 invalid invalid invalid invalid invalid invalid invalid invalid

Chapter 54. (a) 4 3 0100 0011 0111 (c) 6 4 0110 0100 0110 00010000 (e) 3 0000 00100011 01001011 0110 0001 (g) 113 101 000100010011 000100000001 00100000 (b) 5 0101 0010 0111 (d) 17 1 00010111 00100010 0001 (f) 65 5 01100101 01011000 10111101 01100110 000100100011 (h) 95 157 0001 00010111 001111101100 01100110 01000010 Section -11 Digital Codes 55. The Gray code makes only one bit change at a time when going from one number in the sequence to the next number. Gray for 1111 = 1000 Gray for 0000 = 0000 56. (a) 1 1 0 1 1 Binary (b) 1 0 0 1 0 1 0 Binary 1 0 1 1 0 Gray 1 1 0 1 1 1 1 Gray (c) 1 1 1 1 0 1 1 1 0 1 1 1 0 Binary 1 0 0 0 1 1 0 0 1 1 0 0 1 Gray 57. (a) 1 0 1 0 Gray (b) 0 0 0 1 0 Gray 1 1 0 0 Binary 0 0 0 1 1 Binary (c) 1 1 0 0 0 0 1 0 0 0 1 Gray 1 0 0 0 0 0 1 1 1 1 0 Binary 5. (a) 1 00110001 (b) 3 00110011 (c) 6 00110110 (d) 10 0011000100110000 (e) 1 0011000100111000 (f) 9 0011001000111001 (g) 56 001100110110 (h) 75 001101110011 (i) 107 001100010011000000110111 1

Chapter 59. (a) 0011000 CAN (b) 100 J (c) 0111101 = (d) 0100011 # (e) 0111110 > (f) 1000010 B 60. 1001000 1100101 1101100 1101100 1101111 0101110 0100000 H e l l o. # 1001000 1101111 1110111 0100000 1100001 1110010 1100101 H o w # a r e 0100000 1111001 1101111 111 0111111 # y o u? 61. 1001000 1100101 1101100 1101100 1101111 0101110 0100000 4 65 6C 6C 6F E 0 1001000 1101111 1110111 0100000 1100001 1110010 1100101 4 6F 77 0 61 7 65 0100000 1111001 1101111 111 0111111 0 79 6F 75 3F 6. 30 INPUT A, B 3 0110011 33 0 0110000 30 SP 0100000 0 I 1001001 49 N 1001110 4E P 000 50 U 101 55 T 100 54 SP 0100000 0 A 1000001 41, 0101100 C B 1000010 4 Section -1 Error Codes 63. Code (b) 01110 has five 1s, so it is in error. 64. Codes (a) 11110110 and (c) 0 are in error because they have an even number of 1s. 65. (a) 1 0100 (b) 0 00001001 (c) 1 11111110

Chapter 66. (a) 1100 1011 0111 67. (a) 1100 0111 1011 (b) 1111 0100 1011 (b) 1111 1011 0100 (c) 100011100 10011001 110000101 (c) 100011100 110000101 010011001 In each case, you get the other number. 6. 101100100000 1001 1100 1100 1100 1100 Remainder = 0110 Append remainder to data. 101100100110 1001 1100 1101 1111 0000 CRC is 101100100110. 69. Error in MSB of transmitted CRC: 001100100110 1001 1100 1101 1110 1000 1011 10 Remainder is 10, indicating an error. 3