SOLI-STTE ISPLYS WITH INTEGRL TTL MSI IRUIT HIP FOR USE IN LL SYSTEMS REQUIRING ISPLY OF B T 6,9-mm (0.270-Inch) haracter Height TIL308 Has Left ecimal TIL309 Has Right ecimal Easy System Interface Wide Viewing ngle mechanical data Internal TTL MSI hip With Latch, ecoder, and river onstant-urrent rive for Light-Emitting iodes These assemblies consist of display chips and a TTL MSI chip mounted on a header with a red molded plastic body. Multiple displays may be mounted on,43-mm (0.450-inch) centers. PIN SSIGNMENTS Pin Pn 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Q B Q Q Q LS GN Pin 9 Pin 0 Pin Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 N B BI P LT Q P V Seating Plane (see Note ) 4,32 (0.70) MIN 3,56 (0.40) 2,79 (0.0) L of Pin 3,8 (0.50) 4,42 (0.74) ecimal Point TIL309 7,87 (0.30) 7,62 (0.300) 0,56 (0.022) 0,46 (0.08) I ll Pins,52 (0.060),02 (0.040) L of Pin 2,54 (0.00) 6,45 (0.254) 4,45 (0.75) 3,94 (0.55) 4 Places 0 0,66 (0.026) 3,80 (0.50) 0,66 (0.026) 3,8 (0.50) 2,54 (0.00) T.P. 4 Places (see Note ) 26,67 (.050) 25,65 (.00) Logic hip ecimal Point TIL308 TIL308 TIL309 F G B F G B TOP VIEW E E.P..P. LL LINER IMENSIONS RE IN MILLIMETERS N PRENTHETILLY IN INHES 0,67 (0.420) 9,65 (0.380) NOTES:. Lead dimensions are not controlled above the seating plane. B. enterlines of character segments and decimal points are shown as dashed lines. ssociated dimensions are nominal.. The true-position pin spacing is 2,54 mm (0.00 inch) between centerlines. Each centerline is located with 0,26 mm (0.00 inch) of its true longitudinal position relative to pins and 6. PROUTION T information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. opyright 992, Texas Instruments Incorporated POST OFFIE BOX 655303 LLS, TEXS 75265
V To Logic hip a b logic diagram BI f g LS B Latch ata Inputs P LT Latch Outputs QP Q Q QB Q c e d dp TL308 has left decimal. TL309 has right decimal. 2 POST OFFIE BOX 655303 LLS, TEXS 75265
description These internally-driven seven-segment light-emitting-diode (LE) displays contain a five-bit latch and a decoder/le driver in a single 6-pin package. description of the functions of the inputs and outputs of these devices are in the terminal function table. The TTL MSI circuits contain the equivalent of 78 gates on a single chip. Logic inputs and outputs are completely TTL/TL compatible. The buffered inputs are implemented with relatively large resistors in series with the bases of the input transistors to lower drive-current requirements to one-half of that required for a standard Series 54/74 TTL input. Some of the additional features of these displays are as follows: Latched B and decimal point logic outputs provided to drive logic processors simultaneously with the displayed data Minimum number of inputs required...4-line B plus decimal point Overriding blanking for suppressing entire display or pulse-modulation of LE brightness LE test input to simultaneously turn on all display segments and decimal point an be operated in a real-time mode or latched-update-only mode by use of the latch strobe input isplays numbers 0 through 9 as well as,, E, F, or minus sign an be blanked by entry of B 3 or by use of the blanking input ecimal point controlled independently with decimal-point latch onstant-current-source TTL-LE interface for optimum performance. The latch outputs except Q P are active pullup, and each one, except Q P, is capable of driving three standard Series 54/74 loads. The LE driver outputs are designed specifically to maintain a relatively constant on-level current of approximately 7 m through each LE segment and decimal point. ll inputs are diode-clamped to minimize transmission-line effects, thereby simplifying system design. Power dissipation is typically 575 mw with all segments on. Terminal Functions PIN ESRIPTION NME NO. BLNKING Input (BI) When low, will blank (turn off) the entire display. Mus be high for normal operation of the display. Latch ata Inputs, B,,, P Latch Outputs Q, QB, Q, Q, QP LTH STROBE Input (LS) 5, 0, 6, 7, 2 4,, 2, 3, 4 ata on these inputs are entered into the latches under the control of the latch strobe input. The binary weights of the inputs are: =, B = 2, = 4, = 8. P is decimal point latch data input. The B data that drives the decoder is stored in the five latches and is available at these outputs. The binary weights of the outputs are: Q =, QB = 2, Q = 4, Q = 8. QP is decimal point latch output. 5 When low, the data in latches follow the data on the latch inputs. When high, the data in the latches are held constant and are unaffected by new data on the latch inputs. LE TEST Input (LT) 3 When low, will turn on the entire display, overriding the data in the latches and the blanking input. Must be high for normal operation of the display. POST OFFIE BOX 655303 LLS, TEXS 75265 3
FUNTION FUNTION TBLE LTH INPUTS BLNKING LE LTH OUTPUTS ISPLY B P STROBE INPUT TEST Q Q QB Q QP TIL308 TIL309 0 L L L L L L H H L L L L L L L L H H L H H L L L H H 2 L L H L L L H H L L H L L 3 L L H H H L H H L L H H H 4 L H L L L L H H L H L L L 5 L H L H H L H H L H L H H 6 L H H L L L H H L H H L L 7 L H H H H L H H L H H H H 8 H L L L L L H H H L L L L 9 H L L H H L H H H L L H H H L H L L L H H H L H L L Minus Sign H L H H H L H H H L H H H H H L L L L H H H H L L L Blank H H L H H L H H H H L H H E H H H L L L H H H H H L L F H H H H H L H H H H H H H Blank X X X X X X L H X X X X X LE TEST (LT) X X X X X X X L X X X X X H = high level, L = low level, X = irrelevant. P input has arbitrarily been shown activated (high) on every other line of the table. absolute maximum ratings over operating case temperature range (unless otherwise noted) Supply voltage, V (see Note ): ontinuous............................................... 5.5 V Nonrepetitive peak, t w 00 ms............................... 7 V Input voltage (see Note ).................................................................. 5.5 V Operating case temperature range, T (see Note 2)..................................... 0 to 85 Storage temperature range......................................................... 25 to 85 NOTES:. Voltage values are with respect to network ground terminal. 2. ase temperature is the surface temperature of the plastic measured directly over the integrated circuit. Forced-air cooling may be required to maintain this temperature. recommended operating conditions MIN NOM MX UNIT Supply voltage, V 4.75 5 5.25 V Normalilzed fanout from each output, N (to Series 54/74 integrated circuits) Low logic level High logic level QP Q, QB, Q, Q 3 QP 3 Q, QB, Q, Q 6 Latch strobe pulse duration, tw 45 ns Setup time, tsu Latch data input (P) before latch strobe (LS) 60 ns Hold time, th Latch data input (P) after latch strobe (LS) 0 ns Operating case temperature, T 0 70 4 POST OFFIE BOX 655303 LLS, TEXS 75265
electrical characteristics at 25 case temperature PRMETER TEST ONITIONS MIN TYP MX UNIT VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VIK Input clamp voltage V = 4.75 V, II = 2 m.5 V VOH VOL High-level output voltage QP V = 4.75 V, IOH = 20 µ Q, QB, Q, Q V = 4.75 V, IOH = 240 µ Low-level output voltage QP V = 4.75 V, IOL =.6 m (see Note 3) Q, QB, Q, Q V = 4.75 V, IOL = 4.8 m 24 2.4 V 04 0.4 V II Input current at maximum input voltage V = 5.25 V, VI = 5.5 V m IIH High-level input current V = 5.25 V, VI = 2.4 V 20 µ IIL Low-level input current V = 5.25 V, VI = 0.4 V 0.8 m Q, QB, Q, Q 9 27.5 IOS Short-circuit output current V = 5.25 V m QP 3.2 I Supply current V = 5.25 V, ll inputs at 0 V 5 80 m Iv Luminous intensity (see Note 4) Figure P Input V =5V 700 200 40 70 λp Wavelength at peak emission V = 5 V, See Note 5 660 nm λ Spectral bandwidth V = 5 V, See Note 5 20 nm ll typical values are at V = 5 V. NOTES: 3. This parameter is measured with the display blanked. 4. Luminous intensity is measured with a light sensor and filter combination that approximates the IE (International ommission on Illumination) eye-response curve. 5. These parameters are measured with all LE segments and the decimal point on. switching characteristics, V = 5 V, T = 25 µcd PRMETER tplh tphl FROM (INPUT) TO (OUTPUT) TEST ONITIONS MIN TYP MX UNIT = 5 pf, RL =.2 kω, 35, B,,, P Q, QB, Q, Q, L QP See Figure 40 ns PRMETER MESUREMENT INFORMTION Output V RL From Output Under Test L = 5 pf NOTES:. L includes probe and jig capacitance. B. ll diodes are N3064.. Measurements mode with LS input grounded. Figure. Load ircuit POST OFFIE BOX 655303 LLS, TEXS 75265 5
TYPIL HRTERISTIS Relative Luminous Intensity 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0. RELTIVE SPETRL HRTERISTIS V = 5 V T = 25 0 600 620 640 660 λ Wavelength nm 680 700 = 25 Luminous Intensity Relative to Value at T 4 2 0.7 0.4 0.2 RELTIVE LUMINOUS INTENSITY vs SE TEMPERTURE V = 5 V 0. 0 0 20 30 40 50 60 70 T ase Temperature Figure 2 Figure 3 6 POST OFFIE BOX 655303 LLS, TEXS 75265
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