Supervisory Control of Manufacturing Systems with Time Specifications Alexander Schaub Institute of Automatic Control Engineering Technische Universität München Joint Advanced Student School 2008
Bibliography 1. P.C.Y. Chen, W.M. Wonham. Stable supervisory control of flexible manufacturing systems with fixed supply and demand rates. Int. J. Prod. Res., 2001, Vol. 39, No.2, 347-368. 2. B.A. Brandin and W.M. Wonham. Supervisory Control of Timed Discrete-Event Systems. IEEE Transactions on Automatic Control, Vol. 39, No. 2, February 1994. 3. P.J.G. Ramagde, W.M. Wonham. The control of Discrete Event Systems. Proceedings of the IEEE, Vol 77, No.1, January 1989. 2
Overview Introduction Methods: DES, TDES, Supervisory Control, Synchronization Operators, Procedure Scheme. CNC Machine: Model, Specifications, Resulting Supervisor, Activities. Conclusions 3
Introduction Manufacturing system: Flexible: different tasks on different types of parts. Reconfigurable processors: it takes time to initialize another task. Limited buffers. Fixed supply and demand rate. Hard-real-time: completion of a task within a given deadline is guaranteed. Supervisory controller manages the system. Both modeled as timed discrete-event systems. Formal constructive method to: 1. decide whether a stable supervisory control exists. 2. compute the stable supervisory control, if it exists. 4
Discrete Event Systems G act = (Σ act, A, δ act, a 0, A m ) Σ act : finite alphabet of event labels (events) A: Activity set containing activities a (states). δ act : Activity transition function. δ act : Σ act A A Activity transition σ : a = δ act (σ, a). a 0 : initial activity. A m A: subset of marker activities. 5
G = (Σ, Q, δ, q 0, Q m ) Timed Discrete-Event Systems q 0 Q, Q m Q Discrete time event tick: Σ := Σ act {tick} Lower l σ and upper u σ time bounds for each transition σ. Two possible types: 1. prospective events σ spe with 0 l σ u σ < 2. remote events σ rem with 0 l σ < u σ = Timed event triples Σ tim := {(σ, l σ, u σ ) σ Σ act } Every state q is related to an activity and a timer: q = (a, {t σ σ Σ act }) 6
Example of Timed Discrete-Event Systems G act = (Σ act, A, δ act, a 0, A m ) Σ act = {α, β} a 0 = 0 δ act (α,0) = δ act (β,0) = 0 A = A m = {0} 7
Example of Timed Discrete-Event Systems G = (Σ, Q, δ, q 0, Q m ) Σ = {α, β,tick} q 0 = a 0 = 0 δ act (α,0) = δ act (β,0) = 0 Q m = {0} Timed events: (α,1, 1), (β,2, 3). Q = {0} {0, 1} {0, 1, 2, 3}, Q = 8. State 0 1 2 3 4 5 6 7 [t α, t β ] [1,3] [0,2] [1,2] [0,1] [0,3] [1,1] [0,0] [1,0] 7
Supervisory Control of DES Inclusion of all possible transition sequences of (T)DES G in its language L(G). Representation of the supervisor by an automaton V monitoring G. Disablement of certain events in transition structure of G to meet certain specifications. Differentiation between controllable and uncontrollable events: Σ act = Σ c Σ u Possibility to force some events Σ for. 8
Supervisory Control of DES Specification of the control input for every possible string w of G by a supervisor map s: κ = s(w) Closed loop behavior of the system L(V G) =: K 1. ɛ K 2. wσ K iff w K,σ V (w),wσ L 8
Example for Supervisory Control of DES Supremal controllable language K : largest controllable language K K. Σ c = {α, β}, Σ u = {λ}. L = (α(αα + β)(λ + α) + β(αλ + αα + λ))β L m = (α(αα + β)α + β(αα + λ))β K = (αα + β)λβ K is called controllable if: KΣ u L K 9
Supervisory Control of TDES Considering time bounds (l σ, u σ ) as specifications. Minimal restrictive supervisor: disabling certain events only if necessary creation of largest possible subset of legal sequences. Software TTCT available to create, combine TDESs and to compute the supremal controllable sublanguage of a given language. Creation of a supervisory TDES by three main steps: sync,meet and supcon 10
Parallelisation of Generators (sync) Synchronization of two TDESs: G 3 = G 1 G 2 For all σ Σ 3,act : σ (Σ 1,act Σ 2,act ) (Σ 2,act Σ 1,act ) Timed events must be synchronisable: 1. σ Σ 1,act Σ 2,act 2. (l σ,u σ ) = (max(l 1,σ,l 2,σ ), min(u 1,σ,u 2,σ )) 11
Example: the Endangered Pedestrian G = (Σ, Q, δ, q 0, Q m ) PED = ({j}, {r, c}, {[r, j, c]}, r, {c}); Σ tim = (j,1, ) : j = jump,r = road, c = curb. CAR = ({p}, {a, g}, {[a, p, g]}, a, {g}; Σ tim = (p, 2, 2) : p = pass, a = approaching, g = gone by. 12
Example: the Endangered Pedestrian j = jump, p = pass. CP = sync(car, PED), Σ for = {j}. TDES of CP: 12
Restriction of Synchronization on Common Symbols (meet) G 3 = G 1 G 2 Finding a TDES fulfilling all conditions of different TDESs simultaneously. Special case of sync with Σ 1 = Σ 2. 13
Example: Saving the Pedestrian For safety: Jump before the car passes. SAVE = ({j, p}, {s0, s1, s2}, {[s0, j, s1], [s1, p, s2]}, s0, {s2}), Σ tim = {(j,0, ), (p, 0, )} : j = jump, p = pass. 14
Example: Saving the Pedestrian Adding the safety specification to the endangered pedestrian example. CPSAV E = meet(cp, SAV E) : 14
Computation of K (supcon) Finding the supremal controllable sublanguage for a certain model TDES G and its specification TDES S. supcon: V = Φ(G, S) Every contained sequence observes the specifications. Erasure of all undesired transitions paths. Possibility of an empty supervisor specifications too hard. 15
Procedure for computing a supervisor 16
Task Processor P, input buffers F 1, F 2 and output buffers H 1, H 2. Input rates: s 1 = 0.5 parts/min, s 2 = 1/3 parts/min. Output rates: d 1 = 1/3 parts/min, d 2 = 0.25 parts/min. 17
Model 18
Model Input buffer G F1 (α 1 = request, β 1 = enter ): Output buffer G H1 (α 3 = leave, β 3 = fetched ): 18
Model Processor reconfiguration G r (λ = reconfig, µ = finished reconfig ): 18
Model Part processing G p (γ = produce, σ = finished producing ): 18
Specification 19
Specification Output buffer specification S H1 (α 3 = leave, σ 1 = finished producing ): 19
Specification Proper configuration of processor S P (γ = produce, λ = reconfig, µ = finished reconfig ): 19
Specification Output specification for type-1 parts S O1 (α 3 = leave, β 3 = fetched ): 19
Resulting Supervisor sync all models: G w = G F1 G F2 G H1 G H2 G p G r. Model G w consists of 35280 states and 129792 transitions. Receiving V by repeated application of supcon: V = Φ(Φ(Φ(Φ(G w, S p ), S F1 S F2 ), S H1 S H2 ), S O1 S O2 ). Supervisor V consists of 2538 states and 5945 transitions. One possible sequence: α 1 β 2 α 2 σ 1 γ 1 ttβ 1 α 1 σ 1 λ 10 µ 10 λ 02 t... 20
Example s Activities Level of type-1 part input buffer: Level of type-2 part input buffer: 21
Example s Activities Level of type-1 part output buffer: Level of type-2 part output buffer: 21
Example s Activities Processor activity under supervisory control: 21
Conclusions Ability to find a supervisor containing all safe sequences. Minimally restrictive controller optimization possibility. Computation of the supremal controllable sublanguage in polynomial time. Disadvantage: exponential increase of the number of states of a composite TDES. Suggested solution in the paper: modular synthesis: set of concurrently operating modular supervisors. 22