Features and enefits Continuous-time operation Fast power-on time Low noise Stable operation over full operating temperature range Reverse battery protection Solid-state reliability Factory-programmed at end-of-line for optimum performance Robust EMC performance High ESD rating Regulator stability without a bypass capacitor Packages: 3 pin SOT23W (suffix LH), and 3 pin SIP (suffix UA) Description The Allegro A111-A114 and A116 Hall-effect switches are next generation replacements for the popular Allegro 312x and 314x lines of unipolar switches. The A11x family, produced with icmos technology, consists of devices that feature fast power-on time and low-noise operation. Device programming is performed after packaging, to ensure increased switchpoint accuracy by eliminating offsets that can be induced by package stress. Unique Hall element geometries and lowoffset amplifiers help to minimize noise and to reduce the residual offset voltage normally caused by device overmolding, temperature excursions, and thermal stress. The A111-A114 and A116 Hall-effect switches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor. The integrated voltage regulator permits operation from 3.8 to 24 V. The extensive on-board protection circuitry makes possible a ±3 V absolute maximum voltage rating for superior protection in automotive and industrial motor commutation applications, without adding Continued on the next page Not to scale Functional lock Diagram VCC Regulator To all subcircuits VOUT Amp Gain Offset Trim Control GND A111-DS, Rev. 3
Description (continued) external components. All devices in the family are identical except for magnetic switchpoint levels. The small geometries of the icmos process allow these devices to be provided in ultrasmall packages. The package styles available provide magnetically optimized solutions for most applications. Package LH is an SOT23W, a miniature low-profile surface-mount package, while package UA is a three-lead ultramini SIP for throughhole mounting. Each package is lead (Pb) free, with 1% matte tin plated leadframes. Selection Guide Part Number Packing* Mounting Ambient, T A RP (Min) OP (Max) A111ELHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A111EUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 85ºC A111LLHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A111LUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 15ºC 1 175 A112ELHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A112EUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 85ºC A112LLHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A112LUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 15ºC 6 245 A113ELHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A113EUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 85ºC A113LLHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A113LUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 15ºC 15 355 A114ELHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A114EUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 85ºC A114LLHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A114LUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 15ºC 25 45 A116ELHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A116EUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 85ºC A116LLHLT-T 7-in. reel, 3 pieces/reel 3-pin SOT23W surface mount A116LUA-T ulk, 5 pieces/bag 3-pin SIP through hole 4ºC to 15ºC 16 43 *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V CC 3 V Reverse Supply Voltage V RCC 3 V Output Off Voltage V OUT 3 V Reverse Output Voltage V ROUT.5 V Output Current I OUTSINK 25 ma Magnetic Flux Density Unlimited G Range E 4 to 85 ºC Operating Ambient Temperature T A Range L 4 to 15 ºC Maximum Junction Temperature T J (max) 165 ºC Storage Temperature T stg 65 to 17 ºC 2
ELECTRICAL OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units Supply Voltage 1 V CC Operating, T J < 165 C 3.8 24 V Output Leakage Current I OUTOFF V OUT = 24 V, < RP 1 μa Output On Voltage V OUT(SAT) I OUT = 2 ma, > OP 215 4 mv Power-On Time 2 t PO Slew rate (dv CC /dt) < 2.5 V/μs, > OP + 5 G or < RP 5 G 4 μs Output Rise Time 3 t r V CC = 12 V, R LOAD = 82 Ω, C S = 12 pf 4 ns Output Fall Time 3 t f V CC = 12 V, R LOAD = 82 Ω, C S = 12 pf 4 ns Supply Current I CCON > OP 4.1 7.5 ma I CCOFF < RP 3.8 7.5 ma Reverse attery Current I RCC V RCC = 3 V 1 ma Supply Zener Clamp Voltage V Z I CC = 1.5 ma; T A = 25 C 32 V Supply Zener Current 4 I Z V Z = 32 V; T A = 25 C 1.5 ma 1 Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section. 2 For V CC slew rates greater than 25 V/μs, and T A = 15 C, the Power-On Time can reach its maximum value. 3 C S =oscilloscope probe capacitance. 4 Maximum current limit is equal to the maximum I CC(max) + 3 ma. DEVICE QUALIFICATION PROGRAM Contact Allegro for information. EMC (Electromagnetic Compatibility) REQUIREMENTS Contact Allegro for information. Package LH Package UA, 3-pin SIP 3 1 2 1 2 3 VCC VCC GND VOUT GND VOUT Terminal List Name Description Number Package LH Package UA VCC Connects power supply to chip 1 1 VOUT Output from circuit 2 3 GND Ground 3 2 3
MAGNETIC OPERATING CHARACTERISTICS 1 over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units Operate Point Release Point Hysteresis OP RP HYS A111 A112 A113 A114 A116 A111 A112 A113 A114 A116 A111 A112 A113 A114 A116 T A = 25 C 5 1 16 G Operating Temperature Range 3 1 175 G T A = 25 C 13 18 23 G Operating Temperature Range 115 18 245 G T A = 25 C 22 28 34 G Operating Temperature Range 25 28 355 G T A = 25 C 7 35 G Operating Temperature Range 35 45 G T A = 25 C 28 34 4 G Operating Temperature Range 26 34 43 G T A = 25 C 1 45 13 G Operating Temperature Range 1 45 145 G T A = 25 C 75 125 175 G Operating Temperature Range 6 125 19 G T A = 25 C 165 225 285 G Operating Temperature Range 15 225 3 G T A = 25 C 5 33 G Operating Temperature Range 25 43 G T A = 25 C 18 24 3 G Operating Temperature Range 16 24 33 G T A = 25 C 2 55 8 G Operating Temperature Range 2 55 8 G T A = 25 C 3 55 8 G Operating Temperature Range 3 55 8 G T A = 25 C 3 55 8 G Operating Temperature Range 3 55 8 G T A = 25 C 2 55 G Operating Temperature Range 2 55 G T A = 25 C 7 15 14 G Operating Temperature Range 7 15 14 G 1 Magnetic flux density,, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of, and the sign indicates the polarity of the field (for example, a 1 G field and a 1 G field have equivalent strength, but opposite polarity). 4
Characteristic Symbol Test Conditions Value Units Package LH, 1-layer PC with copper limited to solder pads 228 ºC/W Package Thermal Resistance R θja Package LH, 2-layer PC with.463 in. 2 of copper area each side connected by thermal vias 11 ºC/W Package UA, 1-layer PC with copper limited to solder pads 165 ºC/W Maximum Allowable 25 24 23 22 21 2 19 18 17 16 15 14 13 12 11 1 9 8 7 6 5 4 3 2 Power Derating Curve T J(max) = 165ºC; I CC = I CC(max) Package LH, 2-layer PC (R JA = 11 ºC/W) Package UA, 1-layer PC (R JA = 165 ºC/W) Package LH, 1-layer PC (R JA = 228 ºC/W) 2 4 6 8 1 12 14 16 18 V CC(max) V CC(min) Power Dissipation, PD (mw) 19 18 17 16 15 14 13 12 11 1 9 8 7 6 5 4 3 2 1 Power Dissipation versus Ambient Temperature Package LH, 2-layer PC (R JA = 11 ºC/W) Package UA, 1-layer PC (R JA = 165 ºC/W) Package LH, 1-layer PC (R JA = 228 ºC/W) 2 4 6 8 1 12 14 16 18 Temperature ( C) 5
Characteristic Data Supply Current (On) versus Ambient Temperature (A111/2/3/4/6) Supply Current (On) versus Supply Voltage (A111/2/3/4/6) ICCON (ma) 8. 8. 7. 7. 6. 6. 5. 5. 4 24 4. 25 3.8 4. 15 3. 3. 2. 2. 1. 1. 5 5 1 15 5 1 15 2 25 ICCON (ma) Supply Current (Off) versus Ambient Temperature (A111/2/3/4/6) Supply Current (Off) versus Supply Voltage (A111/2/3/4/6) ICCOFF (ma) 8. 8. 7. 7. 6. 6. 5. 5. 4 24 4. 25 3.8 4. 15 3. 3. 2. 2. 1. 1. 5 5 1 15 5 1 15 2 25 ICCOFF (ma) Output Voltage (On) versus Ambient Temperature (A111/2/3/4/6) 4 4 Output Voltage (On) versus Supply Voltage (A111/2/3/4/6) 35 35 V OUT(SAT) (mv) 3 25 2 15 1 24 3.8 VOUT(SAT) (mv) 3 25 2 15 1 4 25 15 5 5 5 5 1 15 5 1 15 2 25 6
Functional Description OPERATION The output of these devices switches low (turns on) when a magnetic field (south polarity) perpendicular to the Hall sensor exceeds the operate point threshold, OP. After turn-on, the output is capable of sinking 25 ma and the output voltage is V OUT(SAT). When the magnetic field is reduced below the release point, RP, the device output goes high (turns off). The difference in the magnetic operate and release points is the hysteresis, hys, of the device. This built-in hysteresis allows clean switching of the output, even in the presence of external mechanical vibration and electrical noise. Powering-on the device in the hysteresis region, less than OP and higher than RP, allows an indeterminate output state. The correct state is attained after the first excursion beyond OP or RP. CONTINUOUS-TIME ENEFITS Continuous-time devices, such as the A11x family, offer the fastest available power-on settling time and frequency response. Due to offsets generated during the IC packaging process, continuous-time devices typically require programming after packaging to tighten magnetic parameter distributions. In contrast, chopper-stabilized switches employ an offset cancellation technique on the chip that eliminates these offsets without the need for after-packaging programming. The tradeoff is a longer settling time and reduced frequency response as a result of the chopper-stabilization offset cancellation algorithm. The choice between continuous-time and chopper-stabilized designs is solely determined by the application. attery management is an example where continuous-time is often required. In these applications, V CC is chopped with a very small duty cycle in order to conserve power (refer to figure 2). The duty cycle is controlled by the power-on time, t PO, of the device. ecause continuous-time devices have the shorter power-on time, they are the clear choice for such applications. For more information on the chopper stabilization technique, refer to Technical Paper STP 97-1, Monolithic Magnetic Hall Sensor Using Dynamic Quadrature Offset Cancellation and Technical Paper STP 99-1, Chopper-Stabilized Amplifiers with a Track-and-Hold Signal Demodulator. (A) () V+ V CC V S V OUT Switch to High RP OP SwitchtoLow + V OUT(SAT) VCC A11x VOUT GND R L Sensor Output HYS Figure 1. Switching ehavior of Unipolar Switches. On the horizontal axis, the + direction indicates increasing south polarity magnetic field strength, and the direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when using a circuit such as that shown in Panel. 7
ADDITIONAL APPLICATIONS INFORMATION Extensive applications information for Hall-effect sensors is available in: Hall-Effect IC Applications Guide, Application Note 2771 Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead Welding and Lead Forming, Application Note 2773.1 Soldering Methods for Allegro s Products SMT and Through- Hole, Application Note 269 All are provided in Allegro Electronic Data ook, AMS-72, and the Allegro Web site, www.allegromicro.com. 1 2 3 4 5 V CC t V OUT t t PO(max) Output Sampled Figure 2. Continuous-Time Application, < RP.. This figure illustrates the use of a quick cycle for chopping V CC in order to conserve battery power. Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, t PO(max). The case shown is where the correct output state is HIGH. Position 3, t PO(max) has elapsed. The device output is valid. Position 4, after the output is valid, a control unit reads the output. Position 5, power is removed from the device. 8
Power Derating Power Derating The device must be operated below the maximum junction temperature of the device, T J(max). Under certain combinations of peak conditions, reliable operation may require derating supplied power or improving the heat dissipation properties of the application. This section presents a procedure for correlating factors affecting operating T J. (Thermal data is also available on the Allegro MicroSystems Web site.) The Package Thermal Resistance, R θja, is a figure of merit summarizing the ability of the application and the device to dissipate heat from the junction (die), through all paths to the ambient air. Its primary component is the Effective Thermal Conductivity, K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R θjc, is relatively small component of R θja. Ambient air temperature, T A, and air motion are significant external factors, damped by overmolding. The effect of varying power levels (Power Dissipation, P D ), can be estimated. The following formulas represent the fundamental relationships used to estimate T J, at P D. P D = V IN I IN (1) ΔT = P D R θja (2) Example: Reliability for V CC at T A = 15 C, package UA, using minimum-k PC. Observe the worst-case ratings for the device, specifically: R θja = 165 C/W, T J(max) = 165 C, V CC(max) = 24 V, and I CC(max) = 7.5 ma. Calculate the maximum allowable power level, P D(max). First, invert equation 3: ΔT max = T J(max) T A = 165 C 15 C = 15 C This provides the allowable increase to T J resulting from internal power dissipation. Then, invert equation 2: P D(max) = ΔT max R θja = 15 C 165 C/W = 91 mw Finally, invert equation 1 with respect to voltage: V CC(est) = P D(max) I CC(max) = 91 mw 7.5 ma = 12.1 V The result indicates that, at T A, the application and device can dissipate adequate amounts of heat at voltages V CC(est). Compare V CC(est) to V CC(max). If V CC(est) V CC(max), then reliable operation between V CC(est) and V CC(max) requires enhanced R θja. If V CC(est) V CC(max), then operation between V CC(est) and V CC(max) is reliable under these conditions. T J = T A + ΔT (3) For example, given common conditions such as: T A = 25 C, V CC = 12 V, I CC = 4 ma, and R θja = 14 C/W, then: P D = V CC I CC = 12 V 4 ma = 48 mw ΔT = P D R θja = 48 mw 14 C/W = 7 C T J = T A + ΔT = 25 C + 7 C = 32 C A worst-case estimate, P D(max), represents the maximum allowable power level (V CC(max), I CC(max) ), without exceeding T J(max), at a selected R θja and T A. 9
Package LH, 3-Pin (SOT-23W) 2.975 1.49 3 A 4º.18.96 2.9 1.91.38 1 2.25 1º Seating Plane Gauge Plane 1. 1º.95.4.5 All dimensions nominal, not for tooling use Dimensions in millimeters A Active Area Depth.28 Hall element (not to scale) 1
Package UA, 3-Pin SIP 4.9 4.9 45 A 45 A 2.1 C 3X1 C 1.52 2.1 1.52 3.2 1.44 C C 3.2 1.44 C 45 45 C 1.2 MAX.79.79 2.16 MAX 14.99.41 15.75.41 1 2 3.43 1.27.43 1 2 3 1.27 Package UA, Matrix Leadframe Package UA, Conventional Leadframe All dimensions nominal, not for tooling use Dimensions in millimeters Exact case and lead configuration at supplier discretion within limits shown Note: Matrix configuration not available for A116 variants. A C Active Area Depth,.5 mm Gate and tie bar burr area (for conventional leadframe, gate burr only) Hall element, not to scale 11