HCC/HCF4042B QUAD CLOCKED D LATCH

Similar documents
HCC/HCF4093B QUAD 2-INPUT NAND SCHMIDT TRIGGERS

HCC/HCF40181B 4-BIT ARITHMETIC LOGIC UNIT

.SET-RESET CAPABILITY

.EXPANDABLE WITH MULTIPLE PACKAGES

HCC40147B HCF40147B 10 TO 4 LINE BCD PRIORITY ENCODER

HCC4527B HCF4527B BCD RATE MULTIPLEXER

HCC4543B HCF4543B BCD-TO-7 SEGMENT LATCH/DECODER/LCD DRIVER HCC/HCF4543B

Obsolete Product(s) - Obsolete Product(s)

HCF4555B DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT HIGH ON SELECT

HCF4532B 8-BIT PRIORITY ENCODER

Obsolete Product(s) - Obsolete Product(s)

HCF4035B 4 STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC133 M74HC INPUT NAND GATE. tpd = 13 ns (TYP.) at VCC =5V

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC85 M74HC85 4-BIT MAGNITUDE COMPARATOR. tpd = 22 ns (TYP.) at VCC =5V

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC148 M74HC148 8 TO 3 LINE PRIORITY ENCODER. tpd = 15 ns (TYP.

. HIGH SPEED .LOW POWER DISSIPATION .OUTPUT DRIVE CAPABILITY M54HCT138 M74HCT138 3 TO 8 LINE DECODER (INVERTING) t PD = 16 ns (TYP.

HCF4089B BINARY RATE MULTIPLIER

HCF4543B BCD-TO-7-SEGMENT LATCH/DECODER/LCD DRIVER

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC354 M74HC354 8 CHANNEL MULTIPLEXER/REGISTER (3 STATE) tpd = 24 ns (TYP.

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC137 M74HC137 3 TO 8 LINE DECODER/LATCH (INVERTING) tpd = 11 ns (TYP.

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M54HC4511 M74HC4511 BCD TO 7 SEGMENT LATCH/DECODER DRIVER. tpd = 28 ns (TYP.

M74HC20TTR DUAL 4-INPUT NAND GATE

Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s)

Obsolete Product(s) - Obsolete Product(s)

M74HCT138TTR 3 TO 8 LINE DECODER (INVERTING)

M74HCT688TTR 8 BIT EQUALITY COMPARATOR

M74HC147TTR 10 TO 4 LINE PRIORITY ENCODER

2N2904A-2N2905A 2N2906A-2N2907A

. HIGH SPEED .LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC181 ARITHMETIC LOGIC UNIT/FUNCTION GENERATOR. tpd = 13 ns (TYP.

M74HC4543TTR BCD TO 7 SEGMENT LATCH/DECODER/LCD DRIVER

74VHCT138ATTR 3 TO 8 LINE DECODER (INVERTING)

LD1117 SERIES LOW DROP FIXED AND ADJUSTABLE POSITIVE VOLTAGE REGULATORS

MC MC35172 LOW POWER DUAL BIPOLAR OPERATIONAL AMPLIFIERS.. GOOD CONSUMPTION/SPEED RATIO : ONLY 200µA/Amp FOR 2.1MHz, 2V/µs

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate

NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

CD4021BC 8-Stage Static Shift Register

Obsolete Product(s) - Obsolete Product(s)

MM74HC151 8-Channel Digital Multiplexer

Features Y Wide supply voltage range 3 0V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL fan out of 2 driving 74L

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate

NTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate

NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs

CD4013BC Dual D-Type Flip-Flop

CD4024BC 7-Stage Ripple Carry Binary Counter

TEA6422 BUS-CONTROLLED AUDIO MATRIX

MM74HC175 Quad D-Type Flip-Flop With Clear

MM74HC175 Quad D-Type Flip-Flop With Clear

MM74HC157 Quad 2-Input Multiplexer

CD40106BC Hex Schmitt Trigger

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

MM74HC00 Quad 2-Input NAND Gate

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

MM74HC373 3-STATE Octal D-Type Latch

7.5A LOW DROP POSITIVE VOLTAGE REGULATOR ADJUSTABLE AND FIXED. October 2002

MM74HC251 8-Channel 3-STATE Multiplexer

NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register

CD4028BC BCD-to-Decimal Decoder

MM74HC573 3-STATE Octal D-Type Latch

2N3904 SMALL SIGNAL NPN TRANSISTOR

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer

LD1117A SERIES LOW DROP FIXED AND ADJUSTABLE POSITIVE VOLTAGE REGULATORS

CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset

MM74HC32 Quad 2-Input OR Gate

Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics

BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA

MM74HC373 3-STATE Octal D-Type Latch

MM74HC374 3-STATE Octal D-Type Flip-Flop

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

MM74HC08 Quad 2-Input AND Gate

CD4028BC BCD-to-Decimal Decoder

MM74HC74A Dual D-Type Flip-Flop with Preset and Clear

MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet

NTE4035B Integrated Circuit CMOS, 4 Bit Parallel In/Parallel Out Shift Register

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

L78L00 SERIES POSITIVE VOLTAGE REGULATORS

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register

CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate

CD4049UBC CD4050BC Hex Inverting Buffer Hex Non-Inverting Buffer

MM74HC244 Octal 3-STATE Buffer

NTE40160B, NTE40161B NTE40162B, NTE40163B Integrated Circuit CMOS, Synchronous Programmable 4 Bit Counters

KD A LOW DROP POSITIVE VOLTAGE REGULATOR ADJUSTABLE AND FIXED

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

Features. Y Wide supply voltage range 3 0V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL fan out of 2 driving 74L

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting

LD1117A SERIES LOW DROP FIXED AND ADJUSTABLE POSITIVE VOLTAGE REGULATORS

MM74C90 MM74C93 4-Bit Decade Counter 4-Bit Binary Counter

Dual JK Flip-Flop IW4027B TECHNICAL DATA PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE. Rev. 00


MM74HC154 4-to-16 Line Decoder

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop


MM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear

Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics

Obsolete Product(s) - Obsolete Product(s)

Transcription:

QUAD CLOCKED D LATCH CLOCK POLARITY CONTROL Q AND Q OUTPUTS COMMON CLOCK LOW POWER TTL COMPATIBLE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED TO 20 FOR HCC DEICE 5, 10, AND 15 PARAMETRIC RATINGS INPUT CURRENT OF 100nA AT 18 AND 25 C. FOR HCC DEICE 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC TEN- TATIE STANDARD N 13A, STANDARD SPE- CIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEICES EY (Plastic Package) M1 (Micro Package) F (Ceramic Package) C1 (Plastic Chip Carrier) ORDER CODES : HCC4042BF HCF4042BM1 HCF4042BEY HCF4042BC1 PIN CONNECTIONS DESCRIPTION The HCC4042B (extended temperature range) and HCF4042B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The HCC/HCF4042B types contain four latch circuits, each strobed by a common clock. Complementary buffered outputs are available from each circuit. The impedance of the n- and p-channel output devices is balanced and all outputs are electrically identical. Information present at the data input is transferred to outputs Q and Q during the CLOCK level which is programmed by the POLARITY input. For PO- LARITY = 0 the transfer occurs during the 0 CLOCK level and for POLARITY = 1 the transfer occurs during the 1 CLOCK level. The outputs follow the data input providing the CLOCK and POLARITY levels defined above are present. When a CLOCK transition occurs (positive for POLARITY = 0 and negative for POLARITY = 1) the information present at the input during the CLOCK transition is retained at the outputs until an opposite CLOCK transition occurs. June 1989 1/13

FUNCTIONAL DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter alue Unit DD * Supply oltage : HCC Types HCF Types 0.5 to + 20 0.5 to + 18 i Input oltage 0.5 to DD + 0.5 I I DC Input Current (any one input) ± 10 ma P tot Total Power Dissipation (per package) Dissipation per Output Transistor for T op = Full Package-temperature Range 200 100 mw mw T op Operating Temperature : HCC Types HCF Types 55 to + 125 40to+85 T stg Storage Temperature 65 to + 150 C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability. * All voltage values are referred to SS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol Parameter alue Unit DD Supply oltage : HCC Types HCF Types 3to18 3to15 I Input oltage 0 to DD T op Operating Temperature : HCC Types HCF Types 55to+125 40to+85 C C C C 2/13

LOGIC BLOCK DIAGRAM AND TRUTH TABLE Clock Polarity Q 0 0 D / 0 Latch 1 1 D \ 1 Latch STATIC ELECTRICAL CHARACTERISTICS (over recommended operating conditions) Symbol I L OH OL IH Parameter Quiescent Current Output High oltage Output Low oltage Input High oltage HCC Types HCF Types Test Conditions alue I O I O DD T Low * 25 C T High * () () (µa) () Min. Max. Min. Typ. Max. Min. Max. 0/ 5 5 1 0.02 1 30 0/10 10 2 0.02 2 60 0/15 15 4 0.02 4 120 0/20 20 20 0.04 20 600 0/5 5 4 0.02 4 30 0/10 10 8 0.02 8 60 0/15 15 16 0.02 16 120 0/ 5 < 1 5 4.95 4.95 4.95 0/10 < 1 10 9.95 9.95 9.95 0/15 < 1 15 14.95 14.95 14.95 5/0 < 1 5 0.05 0.05 0.05 10/0 < 1 10 0.05 0.05 0.05 15/0 < 1 15 0.05 0.05 0.05 0.5/4.5 < 1 5 3.5 3.5 3.5 1/9 < 1 10 7 7 7 1.5/13.5 < 1 15 11 11 11 *T Low = 55 C for HCC device : 40 C forhcf device. *T High = + 125 C for HCC device : + 85 C for HCF device. The Noise Margin for both 1 and 0 level is : 1 min. with DD = 5, 2 min. with DD = 10, 2.5 min. with DD = 15. Unit µa 3/13

STATIC ELECTRICAL CHARACTERISTICS (continued) Test Conditions alue Symbol Parameter I O I O DD T Low * 25 C T High * Unit () () (µa) () Min. Max. Min. Typ. Max. Min. Max. IL Input Low 4.5/0.5 < 1 5 1.5 1.5 1.5 oltage 9/1 < 1 10 3 3 3 13.5/1.5 < 1 15 4 4 4 I OH Output 0/ 5 2.5 5 2 1.6 3.2 1.15 Drive HCC 0/ 5 4.6 5 0.64 0.51 1 0.36 Current Types 0/10 9.5 10 1.6 1.3 2.6 0.9 0/15 13.5 15 4.2 3.4 6.8 2.4 ma 0/ 5 2.5 5 1.53 1.36 3.2 1.1 HCF 0/ 5 4.6 5 0.52 0.44 1 0.36 Types 0/10 9.5 10 1.3 1.1 2.6 0.9 0/15 13.5 15 3.6 3.0 6.8 2.4 I OL Output 0/ 5 0.4 5 0.64 0.51 1 0.36 Sink HCC 0/10 0.5 10 1.6 1.3 2.6 0.9 Current Types 0/15 1.5 15 4.2 3.4 6.8 2.4 ma 0/ 5 0.4 5 0.52 0.44 1 0.36 HCF Types 0/10 0.5 10 1.3 1.1 2.6 0.9 0/15 1.5 15 3.6 3.0 6.8 2.4 I IH,I IL Input HCC leakage Types 0/18 18 ± 0.1 ±10-5 ± 0.1 ± 1 Any Input Curent HCF Types 0/15 15 ± 0.3 ±10-5 ± 0.3 ± 1 µa C I Input Capacitance Any Input 5 7.5 pf * TLow = 55 CforHCC device : 40 C for HCF device. * THigh = + 125 C forhcc device : + 85 CforHCF device. The Noise Margin for both 1 and 0 level is : 1 min. with DD = 5, 2 min. with DD = 10, 2.5 min. with DD = 15. DYNAMIC ELECTRICAL CHARACTERISTICS (T amb =25 C, C L = 50pF, R L = 200kΩ, typical temperature coefficient for all DD values is 0.3%/ C, all input rise and fall times = 20ns) Symbol t PLH,t PHL 4/13 Parameter Propagation Delay Time Test Conditions alue DD () Min. Typ. Max. Data in to Q 5 110 220 10 55 110 15 40 80 Data in to Q 5 150 300 10 75 150 15 50 100 Clock to Q 5 225 450 10 100 200 15 80 160 Clock to Q 5 250 500 10 115 230 15 90 180 Unit ns

DYNAMIC ELECTRICAL CHARACTERISTICS (continued) Test Conditions alue Symbol Parameter DD () Min. Typ. Max. t THL, t TLH Transition Time 5 100 200 10 50 100 15 40 80 t W Clock Pulse Width 5 200 100 10 100 50 15 60 30 t setup Setup Time 5 50 0 10 30 0 15 25 0 t hold Hold Time 5 120 60 10 60 30 15 50 25 t r,t f Clock Input Rise or Fall Time 5 10 Not Rise or Fall Time Sensitive 15 Unit ns ns ns ns µs Typical Output Low (sink) Current Characteristics. Minimum Output Low (sink) Current Characteristics. 5/13

Typical Output High (source) Current Characteristics. Minimum Output High (source) Current Characteristics. Typical Transition Time vs. Load Capacitance. Typical Propagation Delay Time vs. Load Capacitance (data to Q). Typical Propagation Delay Time vs. Load Capacitance (data to Q). Typical Propagation Delay Time vs. Load Capacitance (clock to Q). 6/13

Typical Propagation Delay Time vs. Load Capacitance (clock to Q). Typical Power Dissipation/device vs. Frequency. Dynamic Test Parameters. 7/13

TEST CIRCUITS Quiescent Device Current. Noise Immunity. Input Leakage Current. 8/13

Plastic DIP16 (0.25) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. a1 0.51 0.020 B 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050 P001C 9/13

Ceramic DIP16/1 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 20 0.787 B 7 0.276 D 3.3 0.130 E 0.38 0.015 e3 17.78 0.700 F 2.29 2.79 0.090 0.110 G 0.4 0.55 0.016 0.022 H 1.17 1.52 0.046 0.060 L 0.22 0.31 0.009 0.012 M 0.51 1.27 0.020 0.050 N 10.3 0.406 P 7.8 8.05 0.307 0.317 Q 5.08 0.200 P053D 10/13

SO16 (Narrow) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 1.75 0.068 a1 0.1 0.2 0.004 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.62 0.024 S 8 (max.) P013H 11/13

PLCC20 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A 9.78 10.03 0.385 0.395 B 8.89 9.04 0.350 0.356 D 4.2 4.57 0.165 0.180 d1 2.54 0.100 d2 0.56 0.022 E 7.37 8.38 0.290 0.330 e 1.27 0.050 e3 5.08 0.200 F 0.38 0.015 G 0.101 0.004 M 1.27 0.050 M1 1.14 0.045 P027A 12/13

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specificationsmentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronicsproducts are not authorized foruse ascritical componentsin life support devices or systems without express written approval of SGS-THOMSON Microelectonics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A 13/13