BUK78-55 GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode logic SYMBOL PARAMETER MAX. UNIT level field-effect power transistor in a plastic envelope suitable for surface V DS Drain-source voltage 55 V mounting. Using trench technology I D Drain current.7 A the device features very low on-state P tot Total power dissipation 1.8 W resistance and has integral zener T j Junction temperature 15 C diodes giving ESD protection. It is R DS(ON) Drain-source on-state mω intended for use in automotive and resistance V GS = V general purpose switching applications. PINNING - SOT223 PIN CONFIGURATION SYMBOL PIN 1 gate DESCRIPTION d 2 drain 3 source g drain (tab) 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 13) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V DS Drain-source voltage - - 55 V V DGR Drain-gate voltage R GS = 2 kω - 55 V ±V GS Gate-source voltage - - 16 V I D Drain current (DC) T sp = 25 C -.7 A I D Drain current (DC) On PCB in Fig.19-5 A T amb = 25 C I D Drain current (DC) On PCB in Fig.19-3.1 A T amb = C I DM Drain current (pulse peak value) T sp = 25 C - A P tot Total power dissipation T sp = 25 C -.7 W P tot Total power dissipation On PCB in Fig.19-1.8 W T amb = 25 C T stg, T j Storage & operating temperature - - 55 15 C ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V C Electrostatic discharge capacitor Human body model - 2 kv voltage ( pf, 1.5 kω) January 1998 1 Rev 1.
BUK78-55 THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT R th j-sp From junction to solder point Mounted on any PCB 12 15 K/W R th j-amb From junction to ambient Mounted on PCB of Fig.18-7 K/W STATIC CHARACTERISTICS T j = 25 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V (BR)DSS Drain-source breakdown V GS = V; I D =.25 ma 55 - - V voltage T j = -55 C 5 - - V V GS(TO) Gate threshold voltage V DS = V GS ; I D = 1 ma 2. 3.. V T j = 15 C 1.2 - - V T j = -55 C - -. V I DSS Zero gate voltage drain current V DS = 55 V; V GS = V; -.5 µa T j = 15 C - - µa I GSS Gate source leakage current V GS = ± V -. 1 µa T j = 15 C - - µa ±V (BR)GSS Gate source breakdown voltage I G = ±1 ma 16 - - V R DS(ON) Drain-source on-state V GS = V; I D = 5 A - 3 mω resistance T j = 15 C - - 7 mω DYNAMIC CHARACTERISTICS T mb = 25 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT g fs Forward transconductance V DS = 25 V; I D = 5 A; T j = 25 C 3 12 - S C iss Input capacitance V GS = V; V DS = 25 V; f = 1 MHz - 7 88 pf C oss Output capacitance - 2 2 pf C rss Feedback capacitance - 1 pf t d on Turn-on delay time V DD = 3 V; I D = 9 A; - 15 23 ns t r Turn-on rise time V GS = V; R g = Ω - 5 75 ns t d off Turn-off delay time - 33 5 ns t f Turn-off fall time T j = 25 C - 2 3 ns REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS T j = -55 to 175 C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT I DR Continuous reverse drain T sp = 25 C - -.7 A current I DRM Pulsed reverse drain current T sp = 25 C - - A V SD Diode forward voltage I F = 5 A; V GS = V -.85 1.1 V t rr Reverse recovery time I F = 5 A; -di F /dt = A/µs; - 5 - ns Q rr Reverse recovery charge V GS = - V; V R = 3 V -.3 - µc January 1998 2 Rev 1.
BUK78-55 AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT W DSS Drain-source non-repetitive I D = 3.6 A; V DD 25 V; - - 6 mj unclamped inductive turn-off V GS = V; R GS = 5 Ω; T sp = 25 C energy 12 1 9 8 7 6 5 3 2 PD% Normalised Power Derating 2 6 8 12 1 Tmb / C Fig.1. Normalised power dissipation. PD% = P D /P D 25 C = f(t sp ) ID/A RDS(ON) = VDS/ID 1 DC.1.1 1 VDS/V 55 tp = BUKX8-55 1 us us us 1 ms ms ms Fig.3. Safe operating area. T sp = 25 C I D & I DM = f(v DS ); I DM single pulse; parameter t p 12 1 9 8 7 6 5 3 2 ID% Normalised Current Derating 2 6 8 12 1 Tmb / C Fig.2. Normalised continuous drain current. ID% = I D /I D 25 C = f(t sp ); conditions: V GS V 1E+2 3E+1 1E+1 3E+ 1E+ 3E-1 1E-1 Zth / (K/W).5.2.1.5.2 D = T 3E-2 T t 1E-2 1E-7 1E-5 1E-3 1E-1 1E+1 t / s Fig.. Transient thermal impedance. Z th j-sp = f(t); parameter D = t p /T P D tp BUK98-55 tp January 1998 3 Rev 1.
BUK78-55 2 16 ID/A 8. 6.5 VGS/V = 6. 16 gfs/s 1 15 12 5.5 8 5.5. 2 6 8 Fig.5. Typical output characteristics, T j = 25 C. I D = f(v DS ); parameter V GS 5. 6 2 1 2 3 5 6 7 8 9 11 12 13 1 15 16 17 18 19 2 ID/A Fig.8. Typical transconductance, T j = 25 C. g fs = f(i D ); conditions: V DS = 25 V 8 RDS(ON)/mOhm VGS/V = 7 6 5.5 6 a 2.5 2 BUK98XX-55 Rds(on) normalised to 25degC 5 6.5 3 7 8 1.5 2 1 5 ID/A 15 2 25 Fig.6. Typical on-state resistance, T j = 25 C. R DS(ON) = f(i D ); parameter V GS.5 - -5 5 15 2 Tmb / degc Fig.9. Normalised drain-source on-state resistance. a = R DS(ON) /R DS(ON)25 C = f(t j ); I D = 5 A; V GS = V 2 ID/A 15 VGS(TO) / V 5 max. typ. 3 BUK78xx-55 Tj/C = 15 25 2 min. 5 1 1 2 3 VGS/V 5 6 7 Fig.7. Typical transfer characteristics. I D = f(v GS ) ; conditions: V DS = 25 V; parameter T j - -5 5 15 2 Tj / C Fig.. Gate threshold voltage. V GS(TO) = f(t j ); conditions: I D = 1 ma; V DS = V GS January 1998 Rev 1.
BUK78-55 1E-1 Sub-Threshold Conduction IF/A 2 1E-2 15 1E-3 2% typ 98% Tj/C = 15 25 1E- 5 1E-5 1E-6 1 2 3 5 Fig.11. Sub-threshold drain current. I D = f(v GS) ; conditions: T j = 25 C; V DS = V GS.2..6.8 1 1.2 1. VSDS/V Fig.1. Typical reverse diode current. I F = f(v SDS ); conditions: V GS = V; parameter T j Thousands pf 1. 1.2 1..8.6..2 Coss Crss.1.1 1 VDS/V Fig.12. Typical capacitances, C iss, C oss, C rss. C = f(v DS ); conditions: V GS = V; f = 1 MHz Ciss WDSS% 12 1 9 8 7 6 5 3 2 2 6 8 12 1 Tmb / C Fig.15. Normalised avalanche energy rating. W DSS % = f(t sp ); conditions: I D = 3.6 A 12 VGS/V L + VDD 8 6 VDS = 1V VDS = V VGS VDS T.U.T. - -ID/ 2 RGS R 1 shunt 5 QG/NC 15 2 Fig.13. Typical turn-on gate-charge characteristics. V GS = f(q G ); conditions: I D = 9 A; parameter V DS Fig.16. Avalanche energy test circuit. W DSS =.5 LI 2 D BV DSS /(BV DSS V DD ) January 1998 5 Rev 1.
BUK78-55 RD + VDD VGS VDS - RG T.U.T. Fig.17. Switching test circuit. January 1998 6 Rev 1.
BUK78-55 PRINTED CIRCUIT BOARD Dimensions in mm. 36 18 6 9.6.5 5 Fig.18. PCB for thermal resistance and power rating for SOT223. PCB: FR epoxy glass (1.6 mm thick), copper laminate (35 µm thick). 7 15 January 1998 7 Rev 1.
BUK78-55 MECHANICAL DATA Dimensions in mm Net Mass:.11 g.32.2 6.7 6.3 3.1 2.9 B.2 M A A..2 3.7 3.3 7.3 6.7 16 max 13 1.8 max max 1.5.85 1 2 3 2.3.8.6.6.1 (x) M B Fig.19. SOT223 surface mounting package. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to surface mounting instructions for SOT223 envelope. 3. Epoxy meets UL9 V at 1/8". January 1998 8 Rev 1.
BUK78-55 DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 13). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1998 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. January 1998 9 Rev 1.