Digital Logic & Computer Design CS 434 Professor Dan Moldovan Spring 2 Copyright 27 Elsevier 2-<>
Chapter 2 :: Combinational Logic Design Digital Design and Computer Architecture David Money Harris and Sarah L. Harris Copyright 27 Elsevier 2-<2>
Chapter 2 :: Topics Introduction oolean Equations oolean Algebra From Logic to Gates Multilevel Combinational Logic X s and Z s Karnaugh Maps Combinational uilding locks Timing Copyright 27 Elsevier 2-<3>
Introduction A logic circuit is composed of: Inputs Outputs Functional specification Timing specification inputs functional spec timing spec outputs Copyright 27 Elsevier 2-<4>
Circuits Nodes Inputs: A,, C Outputs:, Z Internal: n Circuit elements E, E2, E3 Each a circuit A E n E3 C E2 Z Copyright 27 Elsevier 2-<5>
Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has memory Outputs determined by previous and current values of inputs inputs functional spec timing spec outputs Copyright 27 Elsevier 2-<6>
Rules of Combinational Composition Every circuit element is itself combinational Every node of the circuit is either designated as an input to the circuit or connects to exactly one output terminal of a circuit element The circuit contains no cyclic paths: every path through the circuit visits each circuit node at most once Example: Copyright 27 Elsevier 2-<7>
oolean Equations Functional specification of outputs in terms of inputs Example: S = F(A,, C in ) C out = F(A,, C in ) A S C L C C out in S = A C in C out = A + AC in + C in Copyright 27 Elsevier 2-<8>
Some Definitions Complement: variable with a bar over it A,, C Literal: variable or its complement A, A,,, C, C Implicant: product of literals AC, AC, C Minterm: product that includes all input variables AC, AC, AC Maxterm: sum that includes all input variables (A++C), (A++C), (A++C) Copyright 27 Elsevier 2-<9>
Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A = F(A, ) = minterm A A A A Copyright 27 Elsevier 2-<>
Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A = F(A, ) = minterm A A A A Copyright 27 Elsevier 2-<>
Sum-of-Products (SOP) Form All oolean equations can be written in SOP form Each row in a truth table has a minterm A minterm is a product (AND) of literals Each minterm is TRUE for that row (and only that row) The function is formed by ORing the minterms for which the output is TRUE Thus, a sum (OR) of products (AND terms) A minterm A A A A = F(A, ) = A + A Copyright 27 Elsevier 2-<2>
Product-of-Sums (POS) Form All oolean equations can be written in POS form Each row in a truth table has a maxterm A maxterm is a sum (OR) of literals Each maxterm is FALSE for that row (and only that row) The function is formed by ANDing the maxterms for which the output is FALSE Thus, a product (AND) of sums (OR terms) A maxterm A + A + A + A + = F(A, ) = (A + )(A + ) Copyright 27 Elsevier 2-<3>
oolean Equations Example ou are going to the cafeteria for lunch ou won t eat lunch (E) If it s not open (O) or If they only serve corndogs (C) Write a truth table for determining if you will eat lunch (E). O C E Copyright 27 Elsevier 2-<4>
oolean Equations Example ou are going to the cafeteria for lunch ou won t eat lunch (E) If it s not open (O) or If they only serve corndogs (C) Write a truth table for determining if you will eat lunch (E). O C E Copyright 27 Elsevier 2-<5>
SOP & POS Form SOP sum-of-products O C E minterm O C O C O C O C POS product-of-sums O C maxterm O + C O + C O + C O + C Copyright 27 Elsevier 2-<6>
SOP & POS Form SOP sum-of-products O C E minterm O C O C O C O C = OC POS product-of-sums O C E maxterm O + C O + C O + C O + C = (O + C)(O + C)(O + C) Copyright 27 Elsevier 2-<7>
oolean Algebra Set of axioms and theorems to simplify oolean equations Like regular algebra, but in some cases simpler because variables can have only two values ( or ) Axioms and theorems obey the principles of duality: ANDs and ORs interchanged, s and s interchanged Copyright 27 Elsevier 2-<8>
oolean Axioms Copyright 27 Elsevier 2-<9>
T: Identity Theorem = + = Copyright 27 Elsevier 2-<2>
T: Identity Theorem = + = = = Copyright 27 Elsevier 2-<2>
T2: Null Element Theorem = + = Copyright 27 Elsevier 2-<22>
T2: Null Element Theorem = + = = = Copyright 27 Elsevier 2-<23>
T3: Idempotency Theorem = + = Copyright 27 Elsevier 2-<24>
T3: Idempotency Theorem = + = = = Copyright 27 Elsevier 2-<25>
T4: Identity Theorem = Copyright 27 Elsevier 2-<26>
T4: Identity Theorem = = Copyright 27 Elsevier 2-<27>
T5: Complement Theorem = + = Copyright 27 Elsevier 2-<28>
T5: Complement Theorem = + = = = Copyright 27 Elsevier 2-<29>
oolean Theorems: Summary Copyright 27 Elsevier 2-<3>
oolean Theorems of Several Variables Copyright 27 Elsevier 2-<3>
Simplifying oolean Expressions: Example = A + A Copyright 27 Elsevier 2-<32>
Simplifying oolean Expressions: Example = A + A = (A + A) T8 = () T5 = T Copyright 27 Elsevier 2-<33>
Simplifying oolean Expressions: Example 2 = A(A + AC) Copyright 27 Elsevier 2-<34>
Simplifying oolean Expressions: Example 2 = A(A + AC) = A(A( + C)) T8 = A(A()) T2 = A(A) T = (AA) T7 = A T3 Copyright 27 Elsevier 2-<35>
DeMorgan s Theorem = A = A + A A = A + = A A A Copyright 27 Elsevier 2-<36>
ubble Pushing Pushing bubbles backward (from the output) or forward (from the inputs) changes the body of the gate from AND to OR or vice versa. Pushing a bubble from the output back to the inputs puts bubbles on all gate inputs. A Pushing bubbles on all gate inputs forward toward the output puts a bubble on the output and changes the gate body. A A A Copyright 27 Elsevier 2-<37>
ubble Pushing What is the oolean expression for this circuit? A C D Copyright 27 Elsevier 2-<38>
ubble Pushing What is the oolean expression for this circuit? A C D = A + CD Copyright 27 Elsevier 2-<39>
ubble Pushing Rules egin at the output of the circuit and work toward the inputs. Push any bubbles on the final output back toward the inputs. Draw each gate in a form so that bubbles cancel. A C D Copyright 27 Elsevier 2-<4>
ubble Pushing Example A C D Copyright 27 Elsevier 2-<4>
ubble Pushing Example A no output bubble C D Copyright 27 Elsevier 2-<42>
ubble Pushing Example A no output bubble C D A bubble on input and output C D Copyright 27 Elsevier 2-<43>
ubble Pushing Example A no output bubble C D A C D A no bubble on input and output bubble on input and output C D = AC + D Copyright 27 Elsevier 2-<44>
From Logic to Gates Two-level logic: ANDs followed by ORs Example: = AC + AC + AC A C A C minterm: AC minterm: AC minterm: AC Copyright 27 Elsevier 2-<45>
Circuit Schematics with Style Inputs are on the left (or top) side of a schematic Outputs are on the right (or bottom) side of a schematic Whenever possible, gates should flow from left to right Straight wires are better to use than wires with multiple corners Copyright 27 Elsevier 2-<46>
Circuit Schematic Rules (cont.) Wires always connect at a T junction A dot where wires cross indicates a connection between the wires Wires crossing without a dot make no connection wires connect at a T junction wires connect at a dot wires crossing without a dot do not connect Copyright 27 Elsevier 2-<47>
Multiple Output Circuits Output asserted corresponding to most significant TRUE input A 3 A 2 A A PRIORIT CiIRCUIT 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<48>
Multiple Output Circuits Output asserted corresponding to most significant TRUE input A 3 A 2 A A PRIORIT CiIRCUIT 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<49>
Priority Encoder Hardware A 3 A 2 A A 3 2 A 3 A 2 A A 3 2 Copyright 27 Elsevier 2-<5>
Don t Cares A 3 A 2 A A 3 2 A 3 A 2 X A A X X X 3 2 X X Copyright 27 Elsevier 2-<5>
Contention: X Contention: circuit tries to drive the output to and Actual value may be somewhere in between Could be a legal, a legal, or in the forbidden zone Might change with voltage, temperature, time, noise Often causes excessive power dissipation A = = X = Contention usually indicates a bug. Fix it unless you are sure you know what you are doing. Warning: X is used for don t care and contention Note the same thing Look at the context to tell them apart Copyright 27 Elsevier 2-<52>
Floating: Z Floating, high impedance, open, high Z Floating output might be,, or somewhere in between A voltmeter won t indicate whether a node is floating Tristate uffer E A E A Z Z Copyright 27 Elsevier 2-<53>
Tristate usses Floating nodes are used in tristate busses Many different drivers Exactly one is active at any time processor to bus from bus en video to bus from bus Ethernet to bus from bus en2 en3 shared bus memory to bus from bus en4 Copyright 27 Elsevier 2-<54>
Karnaugh Maps (K-Maps) oolean expressions can be minimized by combining terms K-maps minimize equations graphically PA + PA = P A C C A A C AC AC AC AC AC AC AC AC Copyright 27 Elsevier 2-<55>
K-map Circle s in adjacent squares In the oolean expression, include only the literals whose true and complement form are not in the circle A C C A = A Copyright 27 Elsevier 2-<56>
3-input K-map A C AC AC AC AC AC AC AC AC A Truth Table C K-Map A C Copyright 27 Elsevier 2-<57>
3-input K-map A C AC AC AC AC AC AC AC AC A Truth Table K-Map C A C = A + C Copyright 27 Elsevier 2-<58>
K-map Definitions Complement: variable with a bar over it A,, C Literal: variable or its complement A, A,,, C, C Implicant: product of literals AC, AC, C Prime implicant: implicant corresponding to the largest circle in a K-map Copyright 27 Elsevier 2-<59>
K-map Rules Every in a K-map must be circled at least once Each circle must span a power of 2 (i.e., 2, 4) squares in each direction Each circle must be as large as possible A circle may wrap around the edges of the K-map A don't care (X) is circled only if it helps minimize the equation Copyright 27 Elsevier 2-<6>
4-input K-map A C D A CD Copyright 27 Elsevier 2-<6>
4-input K-map A C D A CD Copyright 27 Elsevier 2-<62>
4-input K-map A C D A CD = AC + AD + AC + D Copyright 27 Elsevier 2-<63>
K-maps with Don t Cares A C D X X X X X X X A CD Copyright 27 Elsevier 2-<64>
K-maps with Don t Cares A C D X X X X X X X A CD X X X X X X X Copyright 27 Elsevier 2-<65>
K-maps with Don t Cares A C D X X X X X X X A CD X X X X X = A + D + C X X Copyright 27 Elsevier 2-<66>
Combinational uilding locks Multiplexers Decoders Copyright 27 Elsevier 2-<67>
Multiplexer (Mux) Selects between one of N inputs to connect to the output. log 2 N-bit select input control input Example: 2: Mux S D D S D D Copyright 27 Elsevier 2-<68>
Multiplexer (Mux) Selects between one of N inputs to connect to the output. log 2 N-bit select input control input Example: 2: Mux S D D S D D Copyright 27 Elsevier 2-<69> S D D
Multiplexer Implementations Logic gates Sum-of-products form D D S Tristates For an N-input mux, use N tristates Turn on exactly one to select the appropriate input = D S + D S S D D S D D Copyright 27 Elsevier 2-<7>
Logic using Multiplexers Using the mux as a lookup table A = A A Copyright 27 Elsevier 2-<7>
Logic using Multiplexers Reducing the size of the mux = A A A A Copyright 27 Elsevier 2-<72>
Decoders N inputs, 2 N outputs One-hot outputs: only one output HIGH at once A A 2:4 Decoder 3 2 A A 3 2 Copyright 27 Elsevier 2-<73>
Decoder Implementation A A 3 2 Copyright 27 Elsevier 2-<74>
Logic using Decoders OR minterms A 2:4 Decoder Minterm A A A A = A + A = A Copyright 27 Elsevier 2-<75>
Timing Delay between input change and output changing How to build fast circuits? A delay A Time Copyright 27 Elsevier 2-<76>
Propagation & Contamination Delay Propagation delay: t pd = max delay from input to output Contamination delay: t cd = min delay from input to output A t pd A t cd Time Copyright 27 Elsevier 2-<77>
Propagation & Contamination Delay Delay is caused by Capacitance and resistance in a circuit Speed of light limitation Reasons why t pd and t cd may be different: Different rising and falling delays Multiple inputs and outputs, some of which are faster than others Circuits slow down when hot and speed up when cold Copyright 27 Elsevier 2-<78>
Critical (Long) and Short Paths Critical Path A C D n Short Path n2 Critical (Long) Path: t pd = 2t pd_and + t pd_or Short Path: t cd = t cd_and Copyright 27 Elsevier 2-<79>
Glitches Glitch: when a single input change causes multiple output changes Glitches don t cause problems because of synchronous design conventions (which we ll talk about in a bit) ut it s important to recognize a glitch when you see one in timing diagrams Copyright 27 Elsevier 2-<8>
Glitch Example What happens when A =, C =, falls? A C C A = A + C Copyright 27 Elsevier 2-<8>
Glitch Example (cont.) A = = C = Critical Path n n2 = Short Path n2 n glitch Time Copyright 27 Elsevier 2-<82>
Fixing the Glitch C A AC = A + C + AC A = = = C = Copyright 27 Elsevier 2-<83>
Why Understand Glitches? Glitches don t cause problems because of synchronous design conventions (which we ll talk about in Chapter 3) ut it s important to recognize a glitch when you see one in simulations or on an oscilloscope Can t get rid of all glitches simultaneous transitions on multiple inputs can also cause glitches Copyright 27 Elsevier 2-<84>