ECE 34 Lctur 38 : MOS Capacitor I Class Outli: Idal MOS Capacitor
higs you should ow wh you lav Ky Qustios What ar th diffrt ias rgios i MOS capacitors? What do th lctric fild ad lctrostatic pottial loo li? What is th Dy lgth? What dos th capacitac loo li as a fuctio of ias?
Last tim, w discussd th asic opratio of th MOSFE ++++ ++++ +++ + + + +++ - - - - - - Dpltio Rgio Chal Rgio Wh th arrir rgio is sufficitly rducd, th a currt flows from th sourc to th drai. As w put mor positiv charg o th gat, mor hols ar rplld dpltig th coctratio ar th surfac ad populatig it with lctros. h poit i th gat voltag swp wh sigificat currt gis to flow is th thrshold voltag, V. his corrspods to th poit wh th chal is formd udr th gat. Wr w to hav mad a PNP dvic th applicatio of a gativ VG would rpl lctros ad attract hol formig a chal. V G
Ad how it oprats as w vary V D ++++ ++++ +++ + + + +++ Pich off V D - - - - - - Dpltio Rgio Chal Rgio With V D swpt i small positiv icrmts, th chal mrly acts li a rsistor ad th drai currt is proportioal to th drai voltag. Past a fw tths of a volt of ias, th voltag drop from th sourc to th drai associatd with currt flow gis to gat th ivrtig ffct of th gat. Chal carrirs gis to dcras ladig to a rductio i th chal coductivity. his is du to th lctro flow ot ig through th chal ut a largr rgio aout th drai. Drai currt is said to i saturatio as chags i V D produc o chags i I D.
But w saw that th opratio i most rgims was cotrolld y th chal h chal of a MOSFE is a xampl of a MOS capacitor Usful for: Digital ad aalog logic Mmory fuctioality Imagig (CCD) ad displays (LCD) What is th structur of a MOS capacitor? Havily dopd polycrystalli Si film as th gat lctrod matrial. N-typ for -chal trasistors (NMOS). P-typ for p-chal trasistors (PMOS). SiO 2 as th gat dilctric Bad gap 9 V. Rlativ dilctric costat ε r 3.9. Si as th smicoductor matrial. P-typ for -chal dvics. N-typ for p-chal dvics.
Rmmr all of th compots Chargs oly xist at th surfac of th mtal. W assum that thr ar o chargs or dopats locatd i th oxid rgio. W caot achiv thrmal uilirium through th oxid layr. o achiv thrmal uilirium w d to us a wir to coct th mtal to th smicoductor. Lt s start with th idal situatio, Ф M Ф S
Lt s ow apply a gativ gat voltag to our MOS capacitor Applyig a gativ gat voltag dposits gativ charg o th mtal. W xpct to s this charg compsatd y a t positiv charg o th smicoductor. h applid gativ voltag dprsss th pottial of th mtal. As a rsult th lctro rgis ar raisd i th mtal rlativ to th smicoductor. Movig E FM up causs a tilt i th oxid ads ad th smicoductor ads p i Ei E F E ( x) 1 Mor hols accumulat at th surfac of th smicoductor. de dx i
Now apply a positiv gat voltag Dpositio of positiv charg o th gat ruirs compsatio y gativ chargs i th smicoductor. h gativ charg i a p- typ smicoductor ariss from th dpltio of hols from th surfac. his lavs hid ucompsatd ioizd accptors. h ads d dowward ar th smicoductor surfac (E I closr to E F ). Icrasd lctro coctratio What happs if w p icrasig th amout of positiv gat voltag w apply to th mtal rlativ to th smicoductor?
Wh V G is larg ough, th surfac is ivrtd. h -typ surfac that forms as a rsult of th applid lctric fild is th y to trasistor opratio! Dfi a pottial S which dtrmis how much ad dig thr is at th surfac. Wh S w ar i flat ad coditio. Wh S < w hav hol accumulatio at th surfac. Wh S > w hav lctro accumulatio at th surfac. Wh S > F w hav ivrsio at th surfac. Surfac should as strogly -typ as th ody is p-typ. INV S 2 INV S 2 F F F 2 2 E ul I l l E N N F i i A D
Idal MOS Capacitor What othr physical iformatio ca w otai from this structur? Elctro ad hol coctratios ar rlatd to th pottial i E E i F I F W th ow th lctro (hol) coctratio at ay x ( ) F p p Elctros Hols But w still d th pottial, how do w gt it? Poisso Euatio otal Charg Dsity
Idal MOS Capacitor Us Poisso uatio ad total charg dsity to gt th total charg Sustitut i our owldg of carrir coctratios ad w gt 1 1 2 2 S p x x x ε Elctric Fild Itgrat from th ul (whr th ads ar flat, thr ar o lctric filds, ad th dopig alo sts th carrir coctratios) towards th surfac ε 1 1 d p x d x S dx d W ow itgrat ad xami th rsult at th surfac (x ) whr th prpdicular lctric fild coms Dy lgth distac at which charg fluctuatios ar scrd out to loo li utral titis.
So what dos th surfac charg dsity loo li? Us Gauss Law to fid th charg: Q s ε At s thr is o spac charg. Wh s is gativ w accumulat majority hols at th surfac. Wh s is positiv iitially th liar trm i th lctric fild solutio domiats as a rsult of th xposd, immoil dopats. Dpltio xtds ovr svral hudrd m util w rach strog ivrsio ad th xpotial fild trm domiats. s ξ s
What is th charg distriutio o a ivrtd surfac? For simplicity, lt s assum complt dpltio for < x < W ad utral matrial for x > W. Charg du to ucompsatd accptors is N a W. Positiv charg o th mtal Q M is alacd y gativ charg Q S i th smicoductor which is th dpltio layr charg plus th charg du to th ivrsio rgio Q N. Q M Q S N W Q a N h dpltio width hr is xaggratd ad is typically oly o th ordr of 1 m.
What aout th lctric fild ad th pottial? h lctric fild dos ot ptrat th mtal. It is costat across th oxid as thr ar o chargs or impuritis i th oxid. h lctric fild i th smicoductor drops liarly, as w would xpct. h pottial is costat i th mtal. It is drops liarly across th oxid (V I ). h pottial is also droppd across th dpltio rgio of th smicoductor, S. Q S will gativ for a -chal givig a positiv V I.
Lt s xplor th dpltio rgio mor From cosidratios asd o othr systms (p- juctio), w ca us th dpltio approximatio to show that Lgth of dpltio rgio h dpltio rgio grows with voltag util strog ivrsio is rachd. So what is th maximum valu of th dpltio width? Ad th charg i th dpltio rgio at strog ivrsio. Which must driv y a applid voltag. h applid voltag ruird for strog ivrsio is Assums gativ charg at surfac is du to dpltio charg.
What aout th capacitac of our structur? h capacitac dpds o th voltag MOS Capacitor is th sris comiatio of th oxid ad th voltag dpdt smicoductor capacitacs. I accumulatio: h capacitac is hug. Structur acts li a paralll plat capacitor pilig hols up at th surfac.
Start icrasig th voltag across th capacitor h surfac coms dpltd ad th dpltio layr capacitac ds to addd i otal capacitac: I dpltio: Capacitac dcrass as W grows util ivrsio is rachd. Charg i dpltio layr of MOS capacitor icrass as ~ ( S ) 1/2 so dpltio capacitac dcrass as th ivrs. If sigal applid to ma masurmt is too fast, ivrsio layr carrirs ca t rspod ad do ot cotriut. Slowly varyig sigals allow tim for miority carrirs to gratd, drift across dpltio rgio, or rcomi. Majority carrirs i th accumulatio rgio rspod much fastr.