74F537 1-of-10 Decoder with 3-STATE Outputs

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1-of-10 Decoder with 3-STATE Outputs General Description The 74F537 is one-of-ten decoder/demultiplexer with four active HIGH BCD inputs and ten mutually exclusive outputs. A polarity control input determines whether the outputs are active LOW or active HIGH. The 74F537 has 3- STATE outputs, and a HIGH signal on the Output Enable (OE) input forces all outputs to the high impedance state. Ordering Code: April 1988 Revised August 1999 Two input enables, active HIGH E 2 and active LOW E 1, are available for demultiplexing data to the selected output in either non-inverted or inverted form. Input codes greater than BCD nine cause all outputs to go to the inactive state (i.e., same polarity as the P input). Order Number Package Number Package Description 74F537SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F537PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Logic Symbols Connection Diagram 74F537 1-of-10 Decoder with 3-STATE Outputs IEEE/IEC 1999 Fairchild Semiconductor Corporation DS009550 www.fairchildsemi.com

Unit Loading/Fan Out Pin Names Description U.L. HIGH/LOW Input I IH /I IL Output I OH /I OL Truth Table A 0 A 3 Address Inputs 1.0/1.0 20 µa/ 0.6 ma E 1 Enable Input (Active LOW) 1.0/1.0 20 µa/ 0.6 ma E 2 Enable Input (Active HIGH) 1.0/1.0 20 µa/ 0.6 ma OE Output Enable Input (Active LOW) 1.0/1.0 20 µa/ 0.6 ma P Polarity Control Input 1.0/1.0 20 µa/ 0.6 ma O 0 O 9 3-STATE Outputs 150/40 (33.3) 3 ma/24 ma (20 ma) Inputs Outputs Function OE E 1 E 2 A 3 A 2 A 1 A 0 O 0 O 1 O 2 O 3 O 4 O 5 O 6 O 7 O 8 O 9 High Impedance H X X X X X X Z Z Z Z Z Z Z Z Z Z Disable L H X X X X X L X L X X X X Outputs Equal P Input Active HIGH L L H L L L L H L L L L L L L L L Output L L H L L L H L H L L L L L L L L (P = L) L L H L L H L L L H L L L L L L L L L H L L H H L L L H L L L L L L L L H L H L L L L L L H L L L L L L L H L H L H L L L L L H L L L L L L H L H H L L L L L L L H L L L L L H L H H H L L L L L L L H L L L L H H L L L L L L L L L L L H L L L H H L L H L L L L L L L L L H L L H H X H X L L L L L L L L L L L L H H H X X L L L L L L L L L L Active LOW L L H L L L L L H H H H H H H H H Output L L H L L L H H L H H H H H H H H (P = H) L L H L L H L H H L H H H H H H H L L H L L H H H H H L H H H H H H L L H L H L L H H H H L H H H H H L L H L H L H H H H H H L H H H H L L H L H H L H H H H H H L H H H L L H L H H H H H H H H H H L H H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance L L H H L L L H H H H H H H H L H L L H H L L H H H H H H H H H H L L L H H X H X H H H H H H H H H H L L H H H X X H H H H H H H H H H www.fairchildsemi.com 2

Logic Diagram 74F537 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com

Absolute Maximum Ratings(Note 1) Storage Temperature 65 C to +150 C Ambient Temperature under Bias 55 C to +125 C Junction Temperature under Bias 55 C to +150 C V CC Pin Potential to Ground Pin 0.5V to +7.0V Input Voltage (Note 2) 0.5V to +7.0V Input Current (Note 2) 30 ma to +5.0 ma Voltage Applied to Output in HIGH State (with V CC = 0V) Standard Output 0.5V to V CC 3-STATE Output 0.5V to +5.5V Current Applied to Output in LOW State (Max) twice the rated I OL (ma) Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0 C to +70 C +4.5V to +5.5V Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol Parameter Min Typ Max Units V CC Conditions V IH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal V IL Input LOW Voltage 0.8 V Recognized as a LOW Signal V CD Input Clamp Diode Voltage 1.2 V Min I IN = 18 ma V OH Output HIGH 10% V CC 2.5 I OH = 1 ma Voltage 10% V CC 2.4 I OH = 3 ma V Min 5% V CC 2.7 I OH = 1 ma 5% V CC 2.7 I OH = 3 ma V OL Output LOW Voltage 10% V CC 0.5 V Min I OL = 24 ma I IH Input HIGH Current 5.0 µa Max V IN = 2.7V I BVI Input HIGH Current Breakdown Test 7.0 µa Max V IN = 7.0V I CEX Output HIGH Leakage Current 50 µa Max V OUT = V CC V ID Input Leakage I ID = 1.9 µa 4.75 V 0.0 Test All Other Pins Grounded I OD Output Leakage V IOD = 150 mv 3.75 µa 0.0 Circuit Current All Other Pins Grounded I IL Input LOW Current 0.6 ma Max V IN = 0.5V I OZH Output Leakage Current 50 µa Max V OUT = 2.7V I OZL Output Leakage Current 50 µa Max V OUT = 0.5V I OS Output Short-Circuit Current 60 150 ma Max V OUT = 0V I ZZ Bus Drainage Test 500 µa 0.0V V OUT = 5.25V I CCH Power Supply Current 56 ma Max V O = HIGH I CCZ Power Supply Current 44 66 ma Max V O = HIGH Z www.fairchildsemi.com 4

AC Electrical Characteristics T A = +25 C T A = 0 C to +70 C 74F537 Symbol Parameter V CC = +5.0V C L = 50 pf V CC = +5.0V C L = 50 pf Units Min Typ Max Min Max t PLH Propagation Delay 6.0 11.0 16.0 6.0 17.0 t PHL A n to O n 4.0 7.5 11.0 4.0 12.0 t PLH Propagation Delay 5.0 8.5 14.5 5.0 15.5 t PHL E 1 to O n 4.0 6.5 9.0 4.0 10.0 t PLH Propagation Delay 6.0 11.0 16.0 6.0 17.0 t PHL E 2 to O n 5.0 10.0 14.0 5.0 15.0 t PLH Propagation Delay 6.0 11.5 18.0 6.0 20.0 t PHL P to O n 6.0 11.0 16.0 6.0 17.0 t PZH Output Enable Time 3.0 5.5 10.5 3.0 11.5 t PZL OE to O n 5.0 9.0 13.0 5.0 14.0 t PHZ Output Disable Time 2.0 4.0 6.0 2.0 7.0 t PLZ OE to O n 3.0 5.0 7.0 3.0 8.0 ns ns ns 5 www.fairchildsemi.com

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A 74F537 1-of-10 Decoder with 3-STATE Outputs Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 7 www.fairchildsemi.com