EE 505 Lecture 11. Statistical Circuit Modeling. R-string Example Offset Voltages

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Transcription:

EE 505 Lecture 11 Statistical Circuit Modeling -string Example Offset oltages

eview from previous lecture: Current Steering DAC Statistical Characterization Binary Weighted IL b=<1000..0> 1 1 IGk 1 1 I LSBX FF XI n I1 S1 I S I3 S3 In Sn OUT ILMAX ILb=<1,0,...0> I I G LSBX ote this is the same result as obtained for the unary DAC But closed form expressions do not exist for the IL of this DAC since the IL is an order statistic

eview from previous lecture: Statistical Modeling of Current Sources I D I X GS Simple Square-Law MOSFET Model Usually Adequate for static Statistical Modeling Assumption: Layout used to eliminate gradient effects, contact resistance and drain/source resistance neglected μc W I = - L OX D GS TH andom ariables: µ, C OX, TH, W,L eed: I I D D Thus I D is a random variable

eview from previous lecture: Statistical Modeling of Current Sources 4 TH ID μ C I μ C GS TH D OX TH OX TH or I D μ C I μ C GS TH D OX TH OX It will be argued that μ μ C C OX OX T 0 TH A WL ACox WL A WL A µ,a Cox,A T0 are process parameters 1 4 A A A ID Cox T 0 I WL EB D Define A A A Cox Thus 1 4 A ID T 0 I WL EB D A Often only A β is available

eview from previous lecture: Statistical Modeling of Current Sources 1 4 A ID T 0 I WL EB D A Standard Deviation Decreases with Sqrt of A Large EB reduces standard deviation Operating near cutoff results in large mismatch Often threshold voltage variations dominate mismatch ID T 0 I EB WL D A

eview from previous lecture: Statistical Modeling of Circuits The previous statistical analysis was somewhat tedious Will try to formalize the process Assume Y is a function of n random variables x 1, x n where the mean and variance of x i are small Y = f x, x,... x 1 n n f Y = f X + x + x x x X 0 x,,... j1 j X 0 x x X =... x 1 n j 1 n where x, x,... x 1 n small

eview from previous lecture: Statistical Modeling of Circuits Alternatively, if we define S f xj = x Y i f x j X 0 we thus obtain n = f S Y xj x Y j1 x j i

eview from previous lecture:

eview from previous lecture:

eview from previous lecture: CDF showing random variable mapping of x 1 from U(0,1) 1 F x 1 x F -1 (x 1 )

Example: Determine the area required for the resistors for an n-bit -string DAC to achieve a yield of P if the device is marketable provided 1 IL kmax LSB Assume the area of each resistor is WL A A OM A WL

Since P is fixed, can solve for X

P F X 1 where F (X ) is the CDF on (0,1) 1 P 1 X F X 1 x 1 A WL X 1 X A WL WL A X 1 P 1 WL A F

1 P 1 WL A F WL A X Total area n n n n 3n TOT A WL A X A X A X A 3 n TOT A X or equivalently 3n 1 P 1 ATOT A F

Offset oltages All ADCs have comparators and many ADCs and DACs have operational amplifiers The offset voltages of both amplifiers and comparators are random variables and invariably are key factors affecting the performance of a data converter Operational Amplifiers: Generally differential amplifiers whose offset is dominantly determined by randomness in the first stage Comparators: High Gain Operational Amplifiers Latching Structures (often clocked) Combination of High Gain Amplifiers and Latching Structures Offset voltages of high-gain amplifiers well understood Offset voltage of Latching Structures often difficult to determine and can be very large

Consider First Offset in Operational Amplifiers Input-referred Offset oltage: Differential oltage that must be applied to the input to make the output assume its desired value ote: With a good design, a designer will have OUT at the desired value if the components assume the values used in the design Any difference in the output from what is desired when components assume the nominal values used in a design is attributable to a systematic offset voltage

O XX

Analysis of Offset oltage Since I I D1 D3 L C W 1 p3 OX 3 3 1 S T1 X DD T 3 L3n 1C OX1W 1 Since I I D D4 L C W p4 OX 4 4 S Tn X DD Tp4 L4n COX W

Analysis of Offset oltage Define: L1 p3cox 3W3 a L C W 3 n1 OX1 1 b L C W p4 OX 4 4 L C W 4 n OX Substituting for a and b, it follows that b a a b OS 1 Tn Tn1 X DD Tp3 Tp4 Assume X X X a a a b b b Tni Tn Tni i 1, i 3,4 Tpi Tp Tpi Observe a =b and X - DD - Tp = EB3 It follows that b a a OS Tn Tn EB3 Tp3 Tp 4 a EB3 OS Tn Tp 3 a b Will now obtain a and b

Analysis of Offset oltage b a a OS Tn Tn EB3 Tp3 Tp 4 a L 1 L1 p3 3 COX 3 COX 3 W 3 W3 L L C C W W 3 3 n1 1 OX1 OX1 1 1 x ecall for x small, 1 x 1 Likewise b 1 1 1 x x L W 1 L L C C W W a 1 L W L L C C W W Thus L 1 3W 3 p 1 L1 L 3 3 1 3 1 3 3 3 1 1 C C W W a OX OX L n W L 1 L 3 3 1 COX 3 COX 1 W 3 W 3 a 1 p 3 3 1 3 3 1 OX 3 OX 1 3 3 3 n1 1 1 3 p3 n1 OX 3 OX1 3 3 L L 1 p3 3 W W 3 n1 1 L W 1 L L C C W W L W L L C C W W 1 p3 3 4 4 OX 4 OX 4 3 n1 1 4 p4 n OX 4 OX 4

Analysis of Offset oltage a b L1 L L 4 L3 3 4 1 L 1p3W 3 1 L 1 L L 4 L 3 p3 p4 n n1 L W C C C C W W W W C C C C W W W W 3 n1 1 OX3 OX 4 OX OX1 3 4 3 OX 3 OX 4 OX OX1 3 4 3 L W 1 1 p3 3 a b L L C C W W 3 n1 1 L L C C W W 1 3 3 3 1 3 1 L W OX OX 1 3 p3 n OX 3 OX 1 3 1 Thus L W 1 p3 3 L 3n1W 1 OS Tn Tp 3 L W 1 1 p3 3 EB3 L L C C W W L 3n1W 1 L L C C W W 1 3 3 OX 3 OX1 3 1 1 3 p3 n OX 3 OX1 3 1

Analysis of Offset oltage but A AT 0 ACox AL AW T C OX L W WL WL WL WL W L C L W OX So the offset variance can be expressed as L A ATn0 p 1 Tp0 OS W1L 1 nw1 L3 plw 1 3 1 A A 1 1 n p EB 3 ACox AW AL nl3w 1 W3L3 W1L 1 W3L3 W1L 1 W3 L3 W1 L1 W1L 1 W3L3 Often this can be approximated by A 0 pl1 ATp 0 plw 1 3 1 A Tn 1 1 n p OS EB3 ACox W1L 1 nw1 L3 nl3w 1 W3L3 W1L 1 W3L3 W1L 1 Or even approximated by L A ATn0 p 1 Tp0 OS W1L 1 nw1 L3 A

End of Lecture 11

Statistical Characterization of esistors some additional issue From previous model: OM A WL B W L B ote: Have neglected edge roughness, contact resistance interconnect resistance

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