CSE 140, Lecture 2 Combinational Logic CK Cheng CSE Dept. UC San Diego

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CSE 140, Lecture 2 Combinational Logic CK Cheng CSE Dept. UC San Diego 1

Combinational Logic Outlines 1. Introduction 1. Scope 2. Review of Boolean lgebra 3. Review: Laws/Theorems and Digital Logic 2. Specification 3. Synthesis 2

1.1 Combinational Logic: Scope Description Language: e.g. C Programming, Verilog, VHDL Boolean algebra Truth table Design Goal Schematic Diagram Inputs, Gates, Nets, Outputs Validity: correctness, turnaround time Performance: power, timing, cost Testability: yield, diagnosis, robustness 3

Scope: Boolean lgebra for Logic a b c d e Schematic Diagram: 5 primary inputs 1 primary output 4 gates (3 NDs, 1 OR) 9 signal nets a b c d Cost: #gates, #nets, #pins a b + c d Boolean lgebra: 5 variables 1 expression y=e (a b+c d) 4 operators (3 NDs, 1 OR) 5 literals 4

Scope: Boolean lgebra for Logic Schematic Diagram: 5 primary inputs 4 components (gates) 9 signal nets 12 pins. #inputs B. #gates C. #nets D. #pins E. None a b c d e a b c d a b + c d y=e (a b+c d) Boolean lgebra: 5 literals 4 operators I. #operators II. #literals + #operators III. #literals + 2 #operators - 1 5

Schematic Diagram vs. Boolean Expression Boolean Expression: #literals, #operators Schematic Diagram: #gates, #nets, #pins One more example? 6

1.2 George Boole, 1815-1864 Born to working class parents Taught himself mathematics and joined the faculty of Queen s College in Ireland. Wrote n Investigation of the Laws of Thought (1854) Introduced binary variables Introduced the three fundamental logic operations: ND, OR, and NOT. Copyright 2007 Elsevier 1-<7>

Switching lgebra Boolean lgebra: multiple-valued logic, i.e. each variable have multiple values. Switching lgebra: binary logic, i.e. each variable can be either 1 or 0. Boolean lgebra Switching lgebra Boolean lgebra Switching lgebra BB Two Level Logic <8>

Scope: Binary Values Typically consider only two discrete values: 1 s and 0 s 1, TRUE, HIGH 0, FLSE, LOW 1 and 0 can be represented by specific voltage levels, rotating gears, fluid levels, etc. Digital circuits usually depend on specific voltage levels to represent 1 and 0 Bit: Binary digit Copyright 2007 Elsevier 1-<9> 9

Switching lgebra Two Level Logic: Sum of products, or product of sums, e.g. ab + a c + a b, (a +c )(a+b )(a+b+c ) Multiple Level Logic: Many layers of two level logic with some inverters, e.g. (((a+bc) +ab )+b c+c d) bc+c e Features of Digital Logic Design Multiple Outputs Don t care sets Handy Tools: DeMorgan s Law: Complements Consensus Theorem Shannon s Expansion Truth Table Karnaugh Map (single output, two level logic) Boolean lgebra Switching lgebra BB Two Level Logic <10>

Review of Boolean lgebra Let B be a nonempty set with two 2-input operations, a 1-input operation `, and two distinct elements 0 and 1. Then B is called a Boolean algebra if the following axioms hold. Commutative laws: a+b=b+a, a b=b a Distributive laws: a+(b c)=(a+b) (a+c), a (b+c)=a b+a c Identity laws: a+0=a, a 1=a Complement laws: a+a =1, a a =0 <11>

1.3 Boolean algebra and switching functions: Operators and Digital Logic Gates Two-input operator ND (, ) ND B Y 0 0 0 0 1 0 1 0 0 1 1 1 1 0 0 0 dominates in ND 0 blocks the output 1 passes signal Two-input operator OR (, + ) OR 1 0 B Y 0 0 0 0 1 1 1 0 1 1 1 1 1 1 dominates in OR 1 blocks the output 0 passes signal One-input operator NOT (Complement, ` ) NOT Y 0 1 1 0 12

Review: Laws and Digital Logic 1. Identity * 1 = + 1 = 1 * 0 = 0 + 0 = 2. Complement + = 1 * = 0 T8. Distributive Law (B+C) = B + C +BC = (+B)(+C) B C B C B C B C 13

Review: Laws and Digital Logic T7. ssociativity (+B) + C = + (B+C) (B)C = (BC) C B C B B C B C 14

DeMorgan s Theorem and Digital Logic T12. DeMorgan s Theorem (+B) = B (B) = + B Y = (B) = + B B B Y Y Y = ( + B) = B B B Y Y 1-<15>

DeMorgan s Theorem: Bubble Pushing Pushing bubbles backward (from the output) or forward (from the inputs) changes the body of the gate from ND to OR or vice versa. Pushing a bubble from the output back to the inputs puts bubbles on all gate inputs. B B Y Y Pushing bubbles on all gate inputs forward toward the output puts a bubble on the output and changes the gate body. B B Y Y 1-<16>

Consensus Theorem B+C+B C (+B)(+C)(B +C) =B+B C =(+B)(B +C) The consensus of B, B C is:? Exercise: to prove the reduction using (1) Venn Diagrams, (2) Boolean algebra, (3) Logic simulation and (4) Shannon s expansion 1-<17>

Consensus Theorem: Venn Diagrams B+C+B C : B+B C B C B C 1-<18>

Consensus Theorem: Boolean lgebra B+C+B C =B+B C B+C+B C =B+C1+B C =B+C(B+B )+B C =B+BC+B C+B C =B(1+C)+(+1)B C =B+B C (+B)(+C)(B +C) =(+B)(B +C) 1-<19>

Consensus Theorem: Logic Simulation f(,b,c)= B+C+B C g(,b,c)=b+b C Index B C B C B C f g 0 0 0 0 0 0 0 1 0 0 1 0 0 1 2 0 1 0 0 0 0 3 0 1 1 0 0 0 4 1 0 0 0 0 0 5 1 0 1 0 1 1 6 1 1 0 1 0 0 7 1 1 1 1 1 0 1-<20>

1-<21>

1-<22>

Shannon s Expansion Shannon s expansion assumes a switching algebra system Divide a switching function into smaller functions Pick a variable x, partition the switching function into two cases: x=1 and x=0 f(x,y,z, )= xf(x=1,y,z, ) + x f(x=0,y,z, ) For example f(x)=xf(1)+x f(0) f(x,y)=xf(1,y)+x f(0,y) <23>

Shannon s Expansion: Example f(x,y,z)=xf(?,y,z)+x f(?,y,z).?=0 B.?=1. f(x,y)=(x+f(?,y))(x +f(?,y)).?=0 B.?=1. <24>

Shannon s Expansion Decompose the switching function into minterms f x, y = xf 1, y + x f 0, y = x yf 1,1 + y f 1,0 + x (y f 0,1 + y f 0,0 = xyf 1,1 + xy f 1,0 + x yf 0,1 + x y f 0,0. Decompose the switching function into maxterms f x, y = (x + f 1, y )(x + f 0, y ) = (x + (y + f 1,1 y + f 1,0 ) (x + y + f 0,1 y + f 0,0 ) = x + y + f 1,1 x + y + f 1,0 x + y + f 0,1 x + y + f 0,0 1-<25>

Shannon s Expansion: Example Which term in B +C+BC can be deleted?. B B. C C. BC D. None of the above 1-<26>

1-<27>

Review Summary: Switching lgebra and Karnaugh Map Shannon s expansion and consensus theorem are used for logic optimization Shannon s expansion divides the problem into smaller functions Consensus theorem finds common terms when we merge small functions Karnaugh map mimics the above two operations in two dimensional space as a visual aid. 1-<28>

Part I. Combinational Logic II) Specification 1. Language 2. Boolean lgebra Canonical Expression: Sum of minterms and Product of maxterms 3. Truth Table 4. Incompletely Specified Function 29

II. Specification Decimal ddition 5 + 7 1 2 Carry Binary ddition Sum 1 1 1 1 0 1 + 1 1 1 1 1 0 0 Carryout Sums Carry bits 5 7 12 30

Binary ddition: Hardware Half dder: Two inputs (a,b) and two outputs (carry, sum). Full dder: Three inputs (a,b,c in ) and two outputs (carry, sum). 31

Half dder a b Sum Carry Truth Table a b carry sum 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 32

Switching Function Switching Expressions: Sum (a,b) = a b + a b Carry (a, b) = a b Ex: Sum (0,0) = 0 0 + 0 0 = 0 + 0 = 0 Sum (0,1) = 0 1 + 0 1 = 1 + 0 = 1 Sum (1,1) = 1 1 + 1 1 = 0 + 0 = 0 a b sum a b carry 33

Full dder Truth Table Cin Id a b c in carry sum a b Sum Carry 0 0 0 0 0 0 1 0 0 1 0 1 2 0 1 0 0 1 3 0 1 1 1 0 4 1 0 0 0 1 5 1 0 1 1 0 6 1 1 0 1 0 7 1 1 1 1 1 34

35

Minterm and Maxterm Id a b c carryout 0 0 0 0 0 a+b+c 1 0 0 1 0 a+b+c 2 0 1 0 0 a+b +c 3 0 1 1 1 a b c 4 1 0 0 0 a +b+c maxterm 5 1 0 1 1 a b c 6 1 1 0 1 a b c 7 1 1 1 1 a b c 36

Minterms f1(a,b,c) = a bc + ab c + abc + abc a bc = 1 iff (a,b,c,) = (0,1,1) ab c = 1 iff (a,b,c,) = (1,0,1) abc = 1 iff (a,b,c,) = (1,1,0) abc = 1 iff (a,b,c,) = (1,1,1) f1(a,b,c) = 1 iff (a,b,c) = (0,1,1), (1,0,1), (1,1,0), or (1,1,1) Ex: f1(1,0,1) = 1 01 + 10 1 + 101 + 101 = 1 f1(1,0,0) = 1 00 + 10 0 + 100 + 100 = 0 37

Maxterms f2(a,b,c) = (a+b+c)(a+b+c )(a+b +c)(a +b+c) a + b + c = 0 iff (a,b,c,) = (0,0,0) a + b + c = 0 iff (a,b,c,) = (0,0,1) a + b + c = 0 iff (a,b,c,) = (0,1,0) a + b + c = 0 iff (a,b,c,) = (1,0,0) f2(a,b,c) = 0 iff (a,b,c) = (0,0,0), (0,0,1), (0,1,0), (1,0,0) Ex: f2(1,0,1) = (1+0+1)(1+0+1 )(1+0 +1)(1 +0+1) = 1 f2(0,1,0) = (0+1+0)(0+1+0 )(0+1 +0)(0 +1+0) = 0 38

f1(a,b,c) = a bc + ab c + abc + abc f2(a,b,c) = (a+b+c)(a+b+c )(a+b +c)(a +b+c) f1(a, b, c) = m 3 + m 5 + m 6 + m 7 = Sm(3,5,6,7) f2(a, b, c) = M 0 M 1 M 2 M 4 = PM(0, 1, 2, 4) iclicker: Does f1 = f2?. Yes B. No. 39

The coverage of a single minterm. e.g. m 4 = ab c Id a b c in carry minterm 4 = ab c 0 0 0 0 0 0 1 0 0 1 0 0 2 0 1 0 0 0 3 0 1 1 1 0 4 1 0 0 0 1 5 1 0 1 1 0 6 1 1 0 1 0 7 1 1 1 1 0 Only one row has a 1. 40

The coverage of a single maxterm. E.g. M 4 = a +b+c Id a b c in carry maxterm 4 = a+b+c 0 0 0 0 0 1 1 0 0 1 0 1 2 0 1 0 0 1 3 0 1 1 1 1 4 1 0 0 0 0 5 1 0 1 1 1 6 1 1 0 1 1 7 1 1 1 1 1 Only one row has a 0. 41

Id a b f (a, b) 0 0 0 1 1 0 1 0 2 1 0 1 3 1 1 - Incompletely Specified Function Don t care set is important because it allows us to minimize the function 1) The input does not happen. 2) The input happens, but the output is ignored. Examples: -Decimal number 0 9 uses 4 bits. (1,1,1,1) does not happen. -Final carry out bit (output is ignored). 42

Incompletely Specified Function Id a b c g(a,b,c) 0 0 0 0 0 1 0 0 1 1 2 0 1 0-3 0 1 1 1 4 1 0 0 1 5 1 0 1-6 1 1 0 0 7 1 1 1 1 g1(a,b,c)=a b c+a bc+ab b +abc =m 1 +m 3 +m 4 +m 7 = m(1,3,4,7) g 2 (a,b,c)=(a+b+c)(a +b +c) =M 0 M 6 = M(0,6) Exercise: Does g1(a,b,c) = g2(a,b,c)? 43