EEE3410 - Lecture 1-1-
1. PC -> Address Move content of the Program Counter to Address Bus 2. Mem(Add) -> ID Move the Data at Location Add from main memory to Instruction Decoder (ID) 3. Acc s -> ALU Move data from registers Acc A and Acc B to the Input of ALU 4. Select ALU function 5. ALU -> Acc A Store the output of ALU to Acc A -2-
EEE3410 - Lecture 2 EEE3410 Microcontroller Applications d n d n-1 d 2 d 1 d 0 2 n 2 n-1. 2 2 2 1 2 0 2 8 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 0 256 128 64 32 16 8 4 2 1-3-
Classwork 1 Convert the following binary numbers into decimal: (a) 1001100 (2) ; (b) 1101011 (2) Solution (a) 1001100 (2) = 1 x 2 6 + 0 x 2 5 + 0 x 2 4 + 1 x 2 3 + 1 x 2 2 + 0 x 2 1 + 0 x 2 0 = 76 (10) (b) 1101011 (2) = 1 x 2 6 + 1 x 2 5 + 0 x 2 4 + 1 x 2 3 + 0 x 2 2 + 1 x 2 1 + 1 x 2 0 = 107 (10) Classwork 2 Convert the following octal numbers to decimal equivalent: (a) 76543 (8) ; (b) 666666 (8) Solution (a) 76543 (8) = 7 x 8 4 + 6 x 8 3 + 5 x 8 2 + 4 x 8 1 + 3 x 8 0 = 32099 (10) (b) 666666 (8) = 6 x 8 5 + 6 x 8 4 + 6 x 8 3 + 6 x 8 2 + 6 x 8 1 + 6 x 8 0 = 224694 (10) Classwork 3 A=10, B = 11, C = 12, D = 13, E = 14, F = 15 Convert the following hexadecimal numbers to decimal: (a) ABCD (16) ; (b) F4240 (16) Solution (a) ABCD (16) = 10 x 16 3 + 11 x 16 2 + 12 x 16 1 + 13 x 16 0 = 43981 (10) (b) F4240 (16) = 15 x 16 4 + 4 x 16 3 + 2 x 16 2 + 4 x 16 1 + 0 x 16 0 = 1000000 (10) -4-
12345 (10) = 1x10 4 +2x10 3 +3x10 2 +4x10 1 +5x10 0 12345 (10) / 10 = 1x10 3 +2x10 2 +3x10 1 +4x10 0 +5 / 10 Divided by 10 Quotient Remainder 1234 5 Divided by 10 123 4 12 3 1 2 1 Example 1 (With the Aids of Calculator) 1234 (10) Hex 1234 / 16 Quotient, Remainder? Using Calculator 1234 / 16 = 77.125 Quotient = 77, Remainder = 0.125 x 16 = 2 1234 = 77 x 16 + 2 77 / 16 = 4.8125 Quotient = 4, Remainder = 0.8125x16=13= D 1234 (10) = 4D2 (16) = 4 x 16 2 + 13 x 16 1 + 2 x 16 0-5-
N (R) = d n R n + d n-1 R n-1 + + d 2 R 2 + d 1 R 1 + d 0 R 0 Step 1 N (R) / R ={ d n R n + d n-1 R n-1 + + d 2 R 2 + d 1 R 1 + d 0 R 0 } /R N (R) / R = d n R n-1 + d n-1 R n-2 + + d 2 R 1 + d 1 R 0 + d 0 /R Since d n, d n-1,.., d 2, d 1, d 0 are all less than R 1 d 0 is the REMAINDER of the operation in Step 1 Step 2 - Repeat the step again { d n R n-1 + d n-1 R n-2 + + d 2 R 1 + d 1 R 0 }/ R d n R n-2 + d n-1 R n-1 + + d 2 R 0 + d 1 /R d 1 is the REMAINDER of the operation in Step 2 Classwork 4 Convert the following decimal numbers to binary: (a) 100 (10) ; (b) 1357 (10) Solution 2 )100 2 ) 50 0 2 ) 25 0 2 ) 12 1 2 ) 6 0 2 ) 3 0 2 1 1 100 (10) = 1100100 (2) 2 )1357 2 ) 678 1 2 ) 339 0 2 ) 169 1 2 ) 84 1 2 ) 42 0 2 ) 21 0 2 ) 10 1 2 ) 5 0 2 ) 2 1 1 0 1357 (10) =10101001101 (2) Convert 100 (10) to Hex first Step Q Remainder Symbol 100 / 16 6 4 4 6 / 16 0 6 6 100 (10) = 64 (16) 4 0100 6 0110 100 (10) = 64 (16) = 01100100 (2) -6-
Step Q Remainder Symbol 100 / 2 50 0 0 50 / 2 25 0 0 25 / 2 12 1 1 12 / 2 6 0 0 6 / 2 3 0 0 3 / 2 1 1 1 1 / 2 0 1 1 (b) 1357 (10) = 54D (16) =? Classwork 5 (a) Convert 63440 (10) to octal 8 )63440 8 ) 7930 0 8 ) 991 2 8 ) 123 7 8 ) 15 3 1 7 63440 (10) = 173720 (8) 8 )999999 8 )124999 7 8 ) 15624 7 8 ) 1953 0 8 ) 244 1 8 ) 30 4 3 6 Since 3 < 8 last row 999999 (10) = 3641077 (8) Step Q Remainder Symbol 63440 / 8 7930 0 0 7930 / 8 991 2 2 991 / 8 123 7 7 123 / 8 15 3 3 15 / 8 1 7 7 1 / 8 0 1 1 63440 (10) = 173720 (8) Classwork 6 Convert the following decimal numbers to hexadecimal: (a) 63440 (10) ; (b) 999999 (10) -7-
Solution (A=10, B=11, C=12, D=13, E=14, F=15) 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F 16 )63440 No. Lab 16 )999999 No. Lab 16 ) 3965 0 0 16 ) 62499 15 F 16 ) 247 13 D 16 ) 3906 3 3 15 7 7 16 ) 244 2 2 (F) 15 4 4 63440 (10) = F7D0 (16) (F) 999999 (10) = F423F (16) (a) Step Ans. Q Remainder Symbol 63440 / 16 3965 3965 0 0 3965 / 16 247.8125 247 0.8125x16=13 D 247 / 16 15.4375 15 0.4375x16=7 7 15 / 16 0 15 F 63440 (10) = F7D0 (16) (a) Step Ans. Q Remainder Symbol 999999/16 62499.9375 62499 15 F 62499/16 3906.1875 3906 3 3 3906/16 244.125 244 2 2 244/16 15.25 15 4 4 15 / 16 0 15 F 999999 (10) = F423F (16) -8-
Classwork 8 - Convert the following binary numbers to octal: (a) 101010110000 (2) ; (b) 1110111011000101 (2) Solution (a) 101 010 110 000 (2) ; 5 2 6 0 (8) (b) 001 110 111 011 000 101 (2) 1 6 7 3 0 5 (8) Classwork 9 - Convert the following octal numbers to binary: (a) 7654 (8) ; (b) 12345 (8) Solution (a) 7 6 5 4 (8) 111 110 101 100 (2) (b) 1 2 3 4 5 (8) 001 010 011 100 101 (2) Classwork 10 - Convert the following binary numbers to hexadecimal: (a) 101010110000 (2) ; (b) 110111011000101 (2) (a) Solution 1010 1011 0000 (2) A B 0 (16) (b) 0110 1110 1100 0101 (2) 6 E C 5 (16) Classwork 11 - Convert the following hexadecimal numbers to binary: (a) CDEF (16) ; (b) 12345 (16) Soln. (a) C D E F (16) 1100 1101 1110 1111 (2) (b) 1 2 3 4 5 (16) 0001 0010 0011 0100 0101 (2) -9-
0000 0000 Decimal 0 : 1111 1111 Decimal 255 Binary Arithmetic (Lecture 3) 1 2 x 3 4 3 6 0 4 8 4 0 8 12 x 34 = 12 x (30 + 4) = 12 x 30 + 12 x 4 = 360 + 48 =408 Decimal System 100 x 10 = 100 + 100 +. + 100 (Add ten times)=1000 Binary System 0100 x 010 = 0100 + 0100 (Add two times)=1000 0100 x 110 = 0100 x (100 + 010) = 0100 x 100 + 0100 x 010 = 10000 + 1000 = 11000 0 1 0 0 x 1 1 0 1 0 0 0 0 1 0 0 0 0 0 0 + 1 1 0 0 0 Multiplier: Use Adder and Shift Register -10-
Example 1 Perform the following calculation with binary arithmetic. (a) 110101001 (2) + 000111011 (2) (b) 11011001 (2) 10101011 (2) (c) 0001 1011 (2) x 0000 0111 (2) (a) 0+0=0 0+1=1 1+0=1 1+1=0 carry=1 1 1 0 1 0 1 0 0 1 + 0 0 0 1 1 1 1 1 1 0 1 1 1 1 = 1 1 1 1 0 0 1 0 0 (b)0-0=0 0-1=1 borrow=1 1-0=1 1-1=0 1 1 0 1 1 0 0 1-1 0 1 1 0 1 1 1 0 1 1 1 = 0 0 1 0 1 1 1 0 (c) 0 0 0 1 1 0 1 1 x 0 0 0 0 0 1 1 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 + 0 0 0 1 1 0 1 1 = 1 0 1 1 1 1 0 1-11-
Classwork 1 (a) 34 (10) + 75 (10) (b) 23 (16) + 53 (10) (b) 112 (10) 49 (10) (c )71 (16) 71 (10) (d)28 (10) x 6 (10) (a) 34 (10) + 75 (10) = 100010 (2) + 1001011 (2) 1 0 0 0 1 0 + 1 0 0 1 01 1 1 = 1 1 0 1 1 0 1 (b) 23 (16) + 53 (10) = 0010 0011 (2) + 00110101 (2) 0 0 1 0 0 0 1 1 + 0 01 1 1 01 11 01 1 = 1 0 1 1 0 0 0 (c) 112 (10) 49 (10) = 1110000 (2) -110001 (2) 1 1 1 0 0 0 0-1 11 11 01 01 01 1 = 0 1 1 1 1 1 1 (d) 71 (16) 71 (10) = 1110001 (2) -1000111 (2) 1 1 1 0 0 0 1-1 0 0 0 11 1 1 = 0 1 0 1 0 1 0 (e) 28 (10) x 6 (10) = 11100 (2) x110 (2) 1 1 1 0 0 x 1 1 0 1 1 1 0 0 + 1 1 1 0 0 1 0 1 0 1 0 0 0-12-
2 7 =128 Signed bit representation -127. -1 0 1. 127 1 111 1111-127 : 1 000 0010-2 1 000 0001-1 1 000 0000-0 0 000 0000 +0 0 000 0001 +1 0 000 0010 +2 : 0 111 1111 +127 128 patterns 128 patterns 1 s complement representation -127. -1 0 1. 127 Sign Magnitude 1 111 1111-0 - 0000 0000 1 111 1110-1 : 1 000 0010-125 - 0111 1101 1 000 0001-126 - 0111 1110 1 000 0000-127 - 0111 1111 0 000 0000 +0 + 0 000 0001 +1 + 0 000 0010 +2 + : 0 111 1111 +127 + 128 patterns 128 patterns -13-
2 s complement representation -128. -1 0 1. 127 Sign Magnitude 1 111 1111-1 - : : : 1 000 0010-126 - 1 000 0001-127 - 1 000 0000-128 - 0 000 0000 +0 0 000 0001 +1 0 000 0010 +2 : 0 111 1111 +127 2 s complement = 1000 0000 1 s complement = 1000 0000 1 = 0111 1111 Invert all bits find the magnitude = 1000 0000 +1 (dec) =0000 0001 (2) 1 s complement -1 = 1111 1110 2 s complement -1 = 1 s complement+1=1111 1111 1 0000 0000 +127+(-126)=0111 1111 + 1000 0010=1 0000 0001 Signed Magnitude: -127 0 +127 1 s Complement: -127 0 +127 2 s Complement: -128 0 +127 8-bit Number Representation Unsigned No. 0 255 Signed Magnitude No. -127 0 + 127 1 s complement -127 0 + 127 2 s complement -128 0 + 127-14-
Classwork 2 Determine the value of the following 6-bit Signed Magnitude numbers: (a) 010101; (b) 101010 (a) 0 10101 Sign bit 0 Positive Magnitude = 10101 (bin) = 21 (dec) +21 (dec) (b) 101010 Sign bit 1 Negative Magnitude = 01010 (bin) = 10 (dec) -10 (dec) Classwork 3 Convert the following numbers into 8-bit Signed Magnitude form: (a) 48; (b) 100 (a) +48, Sign bit = 0, Magnitude = 48(dec)=0110000(bin) (7 bits for magnitude) 0 0110000 (b) -100, Sign bit = 1 Magnitude = 100 (dec)=1100100 (7 bit for magnitude) 1 1100100 Signed Magnitude No. Signed Magnitude No. Binary Addition Invalid Signed Magnitude No. -15-
Classwork 4 Represent the following numbers with 8-bit 1 s complement form: (a) 78 ; (b) 100 +78(dec) = 0100 1110-78(dec) = 1011 0001 +100(dec) = 0110 0100-100(dec) = 1001 1011 (1) Convert the magnitude into normal binary form (2) If the no. is positive, no change is needed! (3) If the no. is negative, invert all bits! Classwork 5 What is the value of the following binary numbers if they are 8-bit 1 s complement form: (a) 00101010 ; (b) 11010011 (a) 00101010 = +42(dec) (b) 11010011 Negative No., invert all bits (0 1, 1 0) Magnitude = 0010 1100 =44 No. = -44 Let X be a 8 bits Positive binary No. X + (1 s Complement of X) = 1111 1111 = 255 = 256-1 X + (-X in 1 s complement)=255=256-1 -16-
Classwork 6 Represent the following numbers with 8-bit 2 s complement form: (a) 78 ; (b) 100 (a) 78 : Positive No. 01001110 (b) -100 : Negative No. bit 7 = 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 D7 D6 D5 D4 D3 D2 D1 D0 Magnitude = 100(dec)=0110 0100(bin), +100 = 0110 0100 (Invert all bits) 1 s complement = 1001 1011 2 s complement = 1 s complement + 1 = 1001 1100 Classwork 7 What is the value of the following binary numbers if they are in 8- bit 2 s complement form: (a) 00101010; (b) 11010011 (a) 00101010 = +42 (b) 11010011 = 2 s complement = 1 s complement + 1 1 s complement =11010011 1 = 1101 0010 Invert all bits Magnitude is 0010 1101=45 No. is -45-17-
Classwork 8 Perform the following binary arithmetic using 2 s complement calculation 1. 109 (10) 69 (10) 2. 69 (10) 109 (10) 3. 79 (10) + 67 (10) 4. 79 (10) 67 (10) Classwork 8 Solution 1 s Complement 2 s complement 109 (10) = 01101101-109 (10) = 10010010+1 = 10010011 69 (10) = 01000101-69 (10) =10111010+1=10111011 (1) 109 69 = 40 (10) = 00101000 0 1 1 0 1 1 0 1 + 1 0 1 1 1 0 1 1 = 1 0 0 1 0 1 0 0 0 (2) 69 109 = -40 (10) Result in 2 s complement form = 11011000 Result in 1 s complement=11011000-1 = 11010111 Invert all bits of 1 s complement result 1101 0111 0010 1000 Magnitude = 00101000 = 40 2 s complement 1101 1000 = -40 0 1 0 0 0 1 0 1 + 1 0 0 1 0 0 1 1 = 1 1 0 1 1 0 0 0 (3) Since 79+67=146 > 127 and (4) -79 67 = -146 < -128, this method cannot be used. Example 9 2 s complement = 1110 0101 1 s complement = 1110 0101 1 = 1110 0100 Invert all bits, magnitude = 0001 1011 = 27 No = -27 2 s complement = 1000 1111-18-
1 s complement = 1000 1111 1 = 1000 1110 Invert all bits, magnitude = 0111 0001=113, No. = -113-19-
-20-
-21-
-22-
PUSH 6 ;SP=SP+1, [SP] = [6] ;Move data from location 6 to location pointed by SP, top of stack MOV R6, #25H ;R6=25H MOV R1, #12H ;R1=12H MOV R4, #0F3H ;R4=F3H PUSH 6 ;SP=SP+1, Push data from location 6 to location pointed by SP PUSH 1 ;SP=SP+1, Push data from location 1 to location pointed by SP PUSH 4 ;SP=SP+1, Push data from location 4 to location pointed by SP POP 3 ;POP data from location pointed by SP into location 3, SP=SP-1 POP 5 ;POP data from location pointed by SP into location 5, SP=SP-1 POP 2 ;POP data from location pointed by SP into location 2, SP=SP-1 MOV A, #55H ;A = 55H=0101 0101b BACK: MOV P0, A ;Move A to Port 0 ACALL DELAY ;Call Delay routine (sub-program) CPL A ;Complement A, 0101 0101b 1010 1010b ;Complement 55H AAH ;Complement AAH 55H SJMP BACK ;Jump to label BACK Port 0, bit 0-23-
MOV A, #0FFH ;Write 1 to Port 0 ;F F H =1111 1111 b MOV P0, A ;Set Port 0 as input BACK: MOV A, P0 ;Read Port 0, move data to A MOV P1, A ;Move data from A to Port 1 SJMP BACK ;Jump to label BACK MOV A, #0FFH ;Set Port 1 MOV P1, A ;as input MOV A, P1 ;Read P1, A = P1 MOV R7, A ;R7 = A = P1 ACALL DELAY ;Call Delay MOV A, P1 ;A=P1 MOV R6, A ;R6 = A = P1 ACALL DELAY ;Call Delay MOV A, P1 ;A = P1 MOV R5, A ;R5 = A = P1 MOV A, #55H ;A= 0101 0101 BACK: MOV P1, A ;P1 = A ACALL DELAY ;Delay CPL A ;Complement A 1010 1010 SJMP BACK ;Jump Back MOV A, #0FFH ;Set Port 2 MOV P2, A ;as Input Port BACK: MOV A, P2 ;Read Port 2, A=P2 MOV P1, A ;Move P2 data to P1, P1=A SJMP BACK ;Jump Back Port Main Other Functions Port 0 I/O Address or Data (External) Port 1 I/O NIL Port 2 I/O Address (External) Port 3 I/O Special Functions RxD Receive (Com port) TxD Transmit (Com port) INT0 Interrupt 0 INT1 Interrupt 1 T0 Timer 0 T1 Timer 1 WR Write (external memory) RD Read (external memory) Exclusive OR OR -24-
X Y XOR X Y OR 0 0 0 0 0 0 0 1 1 0 1 1 1 0 1 1 0 1 1 1 0 1 1 1 MOV P1, #55H ;P1 = 0101 0101 AGAIN: XRL P1, #0FFH ;XRL : exclusive OR ;0101 0101 XOR 1111 1111 Result = 1010 1010 ;1010 1010 XOR 1111 1111 Result = 0101 0101 ACALL DELAY SJMP AGAIN BACK: CPL P1.2 ;Complement Port 1 Bit 2 ACALL DELAY SJMP BACK SETB P1.2 ;Set Port 1 Bit 2 to 1 MOV A, #45H ;A = 45H AGAIN: JNB P1.2, AGAIN ;JNB Jump, if bit equal to 0 ;If Bit 2 of Port 1 is 0 (NOT BIT), jump back to again ;Wait if Bit 2 of Port 1 is 0 MOV P0,A ;If P1.2 is 1, P0 = A=45H SETB P2.3 ;Set bit 3 of port 2 CLR P2.3 ;Clear bit 3 of Port 2-25-
MOV 81h, #30h ; Copy the immediate data 30h to SP -26-
MOV R0, #0ACh ; Copy the immediate data ACh to R0 ; (i.e. 00h) PUSH 00h ; SP=31h, address 31h contains the ; number Ach ;SP = SP + 1, [00] [SP], ;push data at location 00 to stack location pointed by SP PUSH 00h ; SP=32h, address 32h contains the ; number ACh POP 01h ; SP=31h, address R1 (i.e. 01h) ; contains the number ACh ;POP data from stack location pointed by SP to ;memory location 01, then SP=SP-1 POP 80h ; SP=30h, port 0 latch (i.e. 80h) ; contains the number Ach ;POP data from stack location pointed by SP to ;memory location 80, then SP=SP-1 ADDITION 0 + 0 0 0 + 1 1 1 + 0 1 1 + 1 1 0 SUBTRACTION 0-0 0 1-0 1 1 0-1 1 1-1 0-27-
R7 7D 40h EB 41h + C5 42h A MOV A, 40h ; set A = RAM location 40h MOV R7, #0 ; set R7 = 0, set high byte of sum=0 ADD A, 41h ; add A with RAM location 41h ;A=A+[41h] JNC NEXT ; if CY = 0 don t accumulate carry ;Jump to NEXT if NO CARRY INC R7 ; keep track of carry, R7=R7+1, Increment NEXT: ADD A, 42h ; add A with RAM location 42h ;A=A+[42h] JNC NEXT1 ; if CY = 0 don t accumulate carry INC R7 ; keep track of carry NEXT1: END 3C E7 + 3B ADDC + 8D ADD High Byte R7 Low Byte R6 CLR C ; make C=0, Clear CARRY MOV A, #0E7h ; load the low byte now A=E7h ;0E7 = Hex No. (not variable / label name) ADD A, #8Dh ; add the low byte now A=74h and C=1, A=A+ constant 8Dh MOV R6, A ; save the low byte of the sum in R6 MOV A, #3Ch ; load the high byte ADDC A, #3Bh ; add with the carry ; 3B + 3C + 1 = 78 (all in hex) MOV R7, A ; save the high byte of the sum -28-
2 3 2 2 2 1 2 0 8 4 2 1 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1 10 1 0 1 0 11 1 0 1 1 12 1 1 0 0 13 1 1 0 1 14 1 1 1 0 15 1 1 1 1 A B A XOR B 0 0 0 0 1 1 1 0 1 1 1 0 If you perform the following operation: A XOR #FF, if bit = 0 1, bit = 1 0 A7 A6 A5 A4 A3 A2 A1 A0 1 1 1 1 1 1 1 1-29-
Lecture 5 MOV A, #47h ; A=47h first BCD operand MOV B, #25h ; B=25h second BCD operand Decimal Addition 47 decimal + 25 decimal = 72 ADD A, B ; hex (binary) addition (A=6Ch) Binary Addition: 47h + 25h=6Ch Convert 6Ch to corresponding BCD DA A ; adjust for BCD addition (A=72h) BCD data 1+BCD data 2 => Binary Addition =>Result IS NOT in BCD form, Convert the result into BCD (Decimal Adjust) Remarks: 6Ch, C = 12 is not a BCD digit C / 10 decimal (1) => Remainder -> Lower Nipple -> Upper Nipple 6 + Quotient from (1) If we interpret 72h as a binary number then 72h 6Ch = 6 => Add 6 after binary addition -30-
Lecture 6 3C E7 + 3B 8D Y X DA A The action is to decimal adjust the register A Used after the addition of two BCD numbers Example 6.4 : MOV A, #47h ; A=47h first BCD operand MOV B, #25h ; B=25h second BCD operand ADD A, B ; hex (binary) addition (A=6Ch) DA A ;adjust for BCD addition (A=72h) X(BCD) + Y(BCD) BCD Result! (but a Binary result) (Binary Addition) If we ADD 6 to the above result, the final result will be a correct BCD number MUL AB Uses registers A and B as both source and destination registers Numbers in A and B are multiplied, then put the lower-order byte of the product in A and the high-order byte in B The OV flag is set to 1 if the product > FFh Note that the C flag is 0 at all times -31-
A7 A6 A5 A4 A3 A2 A1 A0 X B7 B6 B5 B4 B3 B2 B1 B0 (8 bits number) x (8 bits number) = result (with 16 bits) A x B = Result B A High byte Low byte DIV AB The number in A is divided by B. The quotient is put in A and the remainder (if any) is put in B A B = Quotient & Remainder A B Format Addressing mode # Constant Immediate Register Name Register R?, A, B Hexadecimal Direct No. without # @ only Register Indirect @R? Address in R? @ and + Indexed @A+DPTR A+DPTR=Address Jump Relative Instruction ACALL, Absolute AJUMP LCALL Long LJUMP -32-
Lecture 7 ORG 800H DELAY: MOV R1, #200 1 { 1+ LOOP: MOV R2,#255 1 [ 1+ HERE: DJNZ R2, HERE 2 (2)x255+ DJNZ R1, LOOP 2 2 ]x200+ RET 2 2 } END {1+[1+(2x255)+2]x200+2} Cycle Calculation DELAY: MOV R2, #200 1 {1+ HERE1: MOV R3,#250 1 [ 1 + HERE2: DJNZ R3, HERE2 2 (2)x250 + DJNZ R2, HERE1 2 2 ]x200+ RET 2 2} END =100603 1 + [1 + (2) x 250+ 2] x200+ 2 = 100603 RL A 1 0 0 1 1 1 0 0 0 0 1 1 1 0 0 1-33-
VAR1 EQU 1 VAR2 EQU 2 MOV R1,#6 MOV R2,#8 MOV A,VAR1 ; get VAR1 to A IFTEST: CJNE A, #5, NOT_EQ1 ; if VAR1 = 5 skip the THEN part SJMP ELSE1 ; and do ELSE part NOT_EQ1: JC ELSE1 ; if VAR1 < 5 do ELSE part too MOV A,VAR2 ; now the && part of conditional, CJNE A, #10, NOT_EQ2 ; i.e. checking VAR2 JMP ELSE1 ; if equal do ELSE part NOT_EQ2: JNC ELSE1 ; if VAR2 > 10 do ELSE part THEN: INC R7 ; finally, if (VAR1 > 0) && (VAR2 < 10) SJMP CONTINUE ELSE1: DEC R7 ; perform ELSE part i.e. SUM = SUM V 1 CONTINUE: SJMP CONTINUE END MAX EQU 1 NEW EQU 2 MOV R1,#20 MOV R2,#30 MOV A, NEW ; get NEW IFTEST: CJNE A, MAX, NOT_EQ ; condition testing SJMP CONTINUE ;If EQUAL EXIT NOT_EQ: JC CONTINUE ; jump if NEW < MAX THEN: MOV MAX, A ; do then part since NEW > MAX CONTINUE: SJMP CONTINUE ;; the rest of the program END SUM EQU 0 COUNT EQU 1 ORG 0H MOV SUM,#0 ; initialize SUM MOV A,SUM ; use A as the temporary storage ; for SUM MOV COUNT,#10 ; initialize COUNT FOR_LP: ADD A, COUNT ;A=A+Count DJNZ COUNT,FOR_LP ;COUNT=COUNT-1 END_FOR: SJMP CONTINUE CONTINUE: SJMP CONTINUE ;; the rest of the program END -34-
Lecture 8 1. Timer Counter Counter Value increment at each cycle 0000H FFFFH (16 bits), TH, TL 2. Timer Control Timer ON/OFF, TCON 3. Timer Mode Mode settings of timer, TMOD GATE=ON, Timer 0 Enable when TR0=High AND INT0=High GATE=OFF, Timer 0 Enable when TR0=High GATE Use External INT0 signal as ON/OFF control? C/T Timer or Counter? M1,M0 Mode Bit -35-
INTERRUPT AND TIMER Example 8.7 : (a) Program the IP register to assign the highest priority to INT1, (b) Discuss what happens if INT0, INT1 and TF0 are activated at the same time. (Ans: Same as the priority after RESET) Original INT0 TF0 INT1 TF1 RI+TI INT0 > TF0 > INT1 > TF1 > RI+TI After INT1 INT0 TF0 TF1 RI+TI INT1 > INT0 > TF0 > TF1 > RI+TI Example 8.8 : The IP register is set by the instruction MOV IP, #00001100B after reset. Discuss the sequence in which the interrupts are serviced. MOV IP, #00001100B instruction sets INT1 & TF1 to a higher priority level compared with the rest of the interrupts Original INT0 TF0 INT1 TF1 RI+TI INT0 > TF0 > INT1 > TF1 > RI+TI After INT1 TF1 INT0 TF0 RI+TI INT1 > TF1 > INT0 > TF0 > Serial -36-
ORG 0000H START: MOV R0, #OK DATA+1 ;R0 = No. of byte in table MOV DPTR, #DATA ;DPTR = table start address MOV R1, #00H ;R1 = Index to row of the table LOOP: MOV A, R1 MOVC A, @A+DPTR ;Move [R1+DPTR] to A MOV P1, A ACALL DELAY INC R1 ;Move to next row, R1=R1+1 DJNZ R0, LOOP ;No. of bytes remain=0? AJMP START ; DELAY: MOV R5, #2 DL1: MOV R6, #250 DL2: MOV R7, #200 DL3: DJNZ R7, DL3 DJNZ R6, DL2 DJNZ R5, DL1 ; DATA: OK: END RET DB 01111110B DB 00111100B DB 00011000B DB 00000000B DB 00011000B DB 00111100B DB 01111110B DB 11111111B DB 01111110B DB 00111100B DB 00011000B DB 00000000B DB 00011000B DB 00111100B DB 01111110B DB 11111111B DB 00000000B DB 11111111B DB 00000000B DB 11111111B -37-
ORG 0000H MOV R1, #00000000B ; LED ON/OFF Patterns MOV R2, #01010101B MOV R3, #00001111B MOV R4, #11110000B TEST: ORL P3, #0FFH ; Set all bits in P3 to 1, input port JNB P3.7, CASE1 ; Jump Not bit, if P3.7 is low, jump to CASE1 JNB P3.6, CASE2 JNB P3.5, CASE3 JNB P3.4, CASE4 AJMP TEST CASE1: MOV A, R1 ;A=0000 0000 MOV P1, A ACALL DELAY XRL A, #11111111B ;A= 1111 1111 MOV P1, A AJMP TEST CASE2 MOV A, R2 ;A=0101 0101 MOV P1, A ACALL DELAY XRL A, #10101010B ;A=1111 1111 Turn OFF led MOV P1, A AJMP TEST CASE3 MOV A, R3 ;A=0000 1111 MOV P1, A ACALL DELAY XRL A, #11110000B ;A=1111 1111 MOV P1, A AJMP TEST CASE4 MOV A, R4 ; A=11110000 MOV P1, A ACALL DELAY XRL A, #00001111B ;A=1111 1111 MOV P1, A AJMP TEST DELAY:.. END -38-
ORG 0000H MOV R3, #00H ;R3 Data to be displayed LOOP: MOV DPTR, #TABLE ;DPTR = Table Start Address MOV A, R3 ; MOVC A, @A+DPTR ;Look up [DPTR+R3] entry at data table ; Display numbers on 7-segment display MOV P1, A ;Move ON/OFF pattern to Port 1 ACALL DELAY ; Increase R3 by 1 and loop back MOV A, R3 ADD A, #1 ;R3 = R3 + 1 DA A ;Decimal Adjust ;A=0000 1010 = 10 decimal after DA 0001 0000 ANL A, #0FH ;A=???????? AND 0000 1111 0000???? ;A reset to 0000 0000H after ANL A,#0FH MOV R3, A ;Version 2 INC R3 CJNE R3,#10,CONT1 MOV R3,#0H CONT1: AJMP LOOP ; DELAY:.. TABLE: DB 11000000B ; 0 ;7-Segment LED Patterns DB 11111001B ; 1 DB 10100100B ; 2 DB 10110000B ; 3 DB 10011001B ; 4 DB 10010010B ; 5 DB 10000010B ; 6 DB 11111000B ; 7 DB 10000000B ; 8 DB 10010000B ; 9 ; END -39-
Lecture 9 CS (Chip Select) Active low input used to activate the ADC0804 chip. [CS=LOW, turn ON ADC0804] RD (data enable) Active low input used to get converted data out of the ADC0804 chip. When CS = 0, if a high-tolow pulse is applied to the RD pin, the 8-bit digital output shows up at the D0-D7 data pins. [CS=0, HIGH-TO-LOW pulse to RD, Read Data at D0-D7] WR (start conversion) [CS=0, LOW-TO-HIGH pulse to WR (Write), ADC start converting data] Active low input used to inform the ADC0804 to start the conversion process. If CS = 0 when WR makes a low-to-high transition, the ADC0804 starts converting the analog input value of Vin to an 8-bit digital number. When the data conversion is complete, the INTR pin is forced low by the ADC0804. (Conversion completed=> INTR=0) CLK IN and CLK R Connect to external capacitor and resistor for self-clocking, f = 1/(1.1RC). The clock affect the conversion time and this time cannot be faster than 110µs. INTR (end of conversion) This is an active low output pin. When the conversion is finished, it goes low to signal the CPU that the converted data is ready to be picked up. After INTR goes low, we make CS = 0 and send a high-to-low pulse to the RD pin to get the data out of the ADC0804 chip. Vin (+) and Vin ( ) These are the differential analog inputs where Vin = Vin (+) Vin ( ). Often the Vin ( ) pin is connected to ground and the Vin (+) pin is used as the analog input to be converted to digital. D 7 D6 D5 D 4 D3 D 2 D1 D0 I out = I ref + + + + + + + 2 4 8 16 32 64 128 256 128 D7 64 D6 32 D5 16 D4 8 D3 4 D2 2D1 D0 I out = I ref + + + + + + + 256 256 256 256 256 256 256 256 Iout = Iref (128 D7 + 64 D6 + 32 D5 + 16 D4 + 8 D3 + 4 D2 + D0) / 256 I out = I ref (2 7 D 7 +2 6 D 6 +2 5 D 5 +2 4 D 4 +2 3 D 3 +2 2 D 2 +2 1 D 1 +2 0 D 0 ) / 256 I out = I ref (Convert D0-D7 from binary to Decimal)/256 256 is full scale Iout is proportional to the decimal value of D0-D7 D 7 D6 D5 D 4 D3 D 2 D1 D0 I out = I ref + + + + + + + 2 4 8 16 32 64 128 256 I out = I ref (2 7 D 7 +2 6 D 6 +2 5 D 5 +2 4 D 4 +2 3 D 3 +2 2 D 2 +2 1 D 1 +2 0 D 0 ) / 256 I out = I ref (Convert D0-D7 from binary to Decimal)/256 I out = (D0-D7 in decimal form) / 256 x I ref 256 is full scale, I out is proportional to the decimal value of D0-D7-40-
Lecture 10-41-
Step # Winding A Winding B Winding A Winding B 1 1 0 0 1 2 1 1 0 0 3 0 1 1 0 4 0 0 1 1 Step # Winding A Winding B Winding A Winding B 1 1 0 0 1 1 0 0 0 2 1 1 0 0 0 1 0 0 3 0 1 1 0 0 0 1 0 4 0 0 1 1 0 0 0 1 Step # Winding Winding Winding Winding Winding Winding Winding Winding A B A B A B A B 1 1 0 0 1 1 0 0 1 2 1 1 0 0 1 1 0 0 3 0 1 1 0 0 1 1 0 4 0 0 1 1 0 0 1 1 Step # Winding Winding Winding Winding Winding Winding Winding Winding A B A B A B A B 1 1 0 0 1 1 0 0 1 2 1 0 0 0 1 0 0 0 3 1 1 0 0 1 1 0 0 4 0 1 0 0 0 1 0 0 5 0 1 1 0 0 1 1 0 6 0 0 1 0 0 0 1 0 7 0 0 1 1 0 0 1 1 8 0 0 0 1 0 0 0 1-42-
-43-