SINGLECHANNEL: PACKAGE SCHEMATIC N/C V CC + V CC V F + V F 7 V B _ 7 V 0 _ V O _ V 0 V F N/C 4 5 GND + 4 5 GND,,, Pin 7 is not connected in Part Number / DESCRIPTION The /, / and / optocouplers consist of an AlGaAs LED optically coupled to a high speed photodetector transistor. A separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the basecollector capacitance of the input transistor. An internal noise shield provides superior common mode rejection of 0kV/µs. An improved package allows superior insulation permitting a 40 V working voltage compared to industry standard of 0 V. FEATURES High speed MBit/s Superior CMR0 kv/µs DualChannel / Double working voltage40v RMS CTR guaranteed 070 C U.L. recognized (File # E90700) APPLICATIONS Line receivers Pulse transformer replacement Output interface to CMOSLSTTLTTL Wide bandwidth analog coupling Page of
SINGLECHANNEL: ABSOLUTE MAXIMUM RATINGS (T A = 5 C unless otherwise specified) Parameter Symbol Value Units Storage Temperature T STG 55 to +5 C Operating Temperature T OPR 55 to +00 C Lead Solder Temperature T SOL 0 for 0 sec C EMITTER DC/Average Forward Input Current Each Channel (Note ) I F (avg) 5 ma Peak Forward Input Current (50% duty cycle, ms P.W.) Each Channel (Note ) I F (pk) 50 ma Peak Transient Input Current ( µs P.W., 00 pps) Each Channel I F (trans).0 A Reverse Input Voltage Each Channel V R 5 V Input Power Dissipation (/ and /450) (/5 ) Each Channel (Note ) DETECTOR P D 00 45 Average Output Current Each Channel I O (avg) ma Peak Output Current Each Channel I O (pk) ma EmitterBase Reverse Voltage (, and only) V EBR 5 V Supply Voltage V CC 0.5 to 0 V Output Voltage V O 0.5 to 0 V Base Current (, and only) I B 5 ma Output power dissipation (,,, ) (Note 4) 00 mw P D (, ) Each Channel 5 mw mw Page of
SINGLECHANNEL: ELECTRICAL CHARACTERISTICS (T A = 0 to 70 C Unless otherwise specified) INDIVIDUAL COMPONENT CHARACTERISTICS Parameter Test Conditions Symbol Device Min Typ** Max Unit EMITTER (I F = ma, T A =5 C).45.7 V F V Input Forward Voltage (I F = ma). Input Reverse Breakdown Voltage (I R = 0 µa) B VR 5.0 V Temperature coefficient of (I forward voltage F = ma) ( V F / T A ). mv/ C DETECTOR Logic high output current Logic low supply current Logic high supply current ** All Typicals at T A = 5 C (I F = 0 ma, V O = V CC = 5.5 V) (T A =5 C) (I F = 0 ma, V O = V CC = 5 V) (T A =5 C) I OH All 0.00 0.5 0.005 (I F = 0 ma, V O = V CC = 5 V) All 50 (I F = ma, V O = Open) (V CC = 5 V) (I F = I F = ma, V O = Open) (V CC = 5 V) (I F = 0 ma, V O = Open, V CC = 5 V) (T A =5 C) (I F = 0 ma, V O = Open) (V CC = 5 V) (I F = 0 ma, V O = Open) (V CC = 5 V) I CCL I CCH 0 00 00 400 0.0 4 µa µa µa Page of
SINGLECHANNEL: TRANSFER CHARACTERISTICS (T A = 0 to 70 C Unless otherwise specified) Parameter Test Conditions Symbol Device Min Typ** Max Unit COUPLED Current transfer ratio (Note 5) Logic low output voltage output voltage (I F = ma, V CC = 4.5 V) (I F = ma, V O = 0.4 V) (V CC = 4.5 V, T A =5 C) (I F = ma, I O =. ma) (V CC = 4.5 V, T A =5 C) (I F = ma, I O = ma) (V CC = 4.5 V, T A =5 C) (I F = ma, I O = 0. ma) (V CC = 4.5 V) (I F = ma, I O =.4 ma) (V CC = 4.5 V) 7 50 % 9 7 50 % 7 % V OL =0.4V CTR V OL =0.5V 5 % V OL =0.4V 5 0 % V OL =0.5V V OL =0.4V 9 0 % V OL 0. 0.4 0. 0.5 0.5 0.4 0.5 0.5 0.5 0.5 V ** All Typicals at T A = 5 C Page 4 of
SINGLECHANNEL: SWITCHING CHARACTERISTICS (T A = 0 to 70 C unless otherwise specified., V CC = 5 V) Parameter Test Conditions Symbol Device Min Typ** Max Unit T A = 5 C, (R L = 4. kω, I F = ma) (Note ) (Fig. 7) 0.45.5 µs Propagation delay time to logic low (R L =.9 kω, I F = ma) (Note 7) (Fig. 7) T A = 5 C (R L = 4. kω, I F = ma) (Note ) (Fig. 7) T PHL 0.45 0. µs.0 µs (R L =.9 kω, I F = ma) (Note 7) (Fig. 7).0 µs T A = 5 C, (R L = 4. kω, I F = ma) (Note ) (Fig. 7) 0.5.5 µs Propagation delay time to logic high (R L =.9 kω, I F = ma) (Note 7) (Fig. 7) T A = 5 C (R L = 4. kω, I F = ma) (Note ) (Fig. 7) T PLH 0. 0. µs.0 µs (R L =.9 kω, I F = ma) (Note 7) (Fig. 7).0 µs Common mode transient immunity at logic high (I F = 0 ma, V CM = 0 V PP, R L = 4. kω) (Note ) (Fig. ) T A = 5 C (I F = 0 ma, V CM = 0 V PP ) T A = 5 C, (R L =.9 kω) (Note ) (Fig. ) CM H 0,000 V/µs 0,000 V/µs Common mode transient immunity at logic low (I F = ma, V CM = 0 V PP, R L = 4. kω) (Note ) (Fig. ) T A = 5 C (I F = ma, V CM = 0 V PP ) (R L =.9 kω) (Note ) (Fig. ) CM L 0,000 V/µs 0,000 V/µs ** All Typicals at T A = 5 C Page 5 of
SINGLECHANNEL: ISOLATION CHARACTERISTICS (T A = 0 to 70 C Unless otherwise specified) Characteristics Test Conditions Symbol Min Typ** Max Unit Inputoutput insulation leakage current Withstand insulation test voltage (Relative humidity = 45%) (T A = 5 C, t = 5 s) (V IO = 000 VDC) (Note 9) (RH 50%, T A = 5 C) (Note 9) ( t = min.) I IO.0 µa V ISO 500 V RMS Resistance (input to output) (Note 9) (V IO = 500 VDC) R IO 0 Ω Capacitance (input to output) (Note 9) (f = MHz) C IO 0. pf DC Current gain (I O = ma, V O = 5 V) HFE 50 InputInput Insulation leakage current InputInput Resistance InputInput Capacitance (RH 45%, V II = 500 VDC) (Note 0) t = 5 s, (/5 only) (V II = 500 VDC) (Note 0) (/5 only) (f = MHz) (Note 0) (/5 only) I II 0.005 µa R II 0 Ω C II 0.0 pf Notes. Derate linearly above 70 C freeair temperature at a rate of 0. ma/ C.. Derate linearly above 70 C freeair temperature at a rate of. ma/ C.. Derate linearly above 70 C freeair temperature at a rate of 0.9 mw/ C. 4. Derate linearly above 70 C freeair temperature at a rate of.0 mw/ C. 5. Current Transfer Ratio is defined as a ratio of output collector current, I O, to the forward LED input current, I F, times 00%.. The 4. kω load represents LSTTL unit load of 0. ma and.kω pullup resistor. 7. The.9 kω load represents TTL unit load of. ma and 5. kω pullup resistor.. Common mode transient immunity in logic high level is the maximum tolerable (positive) dv cm /dt on the leading edge of the common mode pulse signal V CM, to assure that the output will remain in a logic high state (i.e., V O >.0 V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dv cm /dt on the trailing edge of the common mode pulse signal, V CM, to assure that the output will remain in a logic low state (i.e., V O <0. V). 9. Device is considered a two terminal device: Pins,, and 4 are shorted together and Pins 5,, 7 and are shorted together. 0. Measured between pins and shorted together, and pins and 4 shorted together. I Page of
Tp PROPAGATION DELAY (ns) I O OUTPUT CURRENT (ma) NORMALIZED CTR NORMALIZED CTR HIGH SPEED SINGLECHANNEL: Fig. Normalized CTR vs. Forward Current Fig. Normalized CTR vs. Temperature...0.0 0. 0. 0. 0. 0.4 0. Normalized to: I F = ma V O = 0.4 V V CC = 5 V T A = 5 C 0.4 0. Normalized to: T A = 5 C I F = ma V CC = 5 V V O = 0.4 V 0.0 0. 0 00 0.0 0 40 0 0 0 40 0 0 00 I F FORWARD CURRENT (ma) T A TEMPERATURE ( C) Fig. Output Current vs. Output Voltage Fig. 4 Logic High Output Current vs. Temperature 4 0 4 T A = 5 C V CC = 5 V I F = 40 ma I F = 5 ma I F = 0 ma I F = 5 ma I F = 0 ma I F = 5 ma I F = 0 ma I F = 5 ma 0 0 4 0 4 0 IOH LOGIC HIGH OUTPUT CURRENT (na) 000 00 0 I F = 0 ma V CC = 5 V V O = 5 V 0. 0 40 0 0 0 40 0 0 00 V O OUTPUT LTAGE (V) T A TEMPERATURE ( C) Fig. 5 Propagation Delay vs. Temperature Fig. Propagation Delay vs. Load Resistance 00 0000 700 00 500 400 00 00 00 R = 4. K (TPLH) L R L =.9 K (TPHL) R L = 4. K (TPLH) R L =.9 K (TPLH) 0 0 40 0 0 0 40 0 0 00 T A TEMPERATURE ( C) I F = ma V CC = 5 V TP PROPAGATION DELAY (ns) 000 00 IF ma (TPLH) IF ma (TPHL) IF 0 ma (TPHL) IF 0 ma (TPLH) V CC = 5 V T A = 5 C 0 R L = LOAD RESISTANCE (kω) Page 7 of
SINGLECHANNEL: Pulse Generator I tr = 5ns F Z O= 50 Ω 0% D.C. I/f < 00µs I F Monitor R m + V F Noise Shield 4 7 V CC V B 5 GND R L 0. µf +5 V V O C L =.5 µf Pulse Generator tr = 5ns Z O = 50 Ω 0% DUTY CYCLE I/f < 00µS IF IF MONITOR R m + VF + VF Noise Shield 7 4 5 VCC V0 V0 GND RL 0. µf +5 V C L =.5 µf Test Circuit for,, and HCPL 450 Test Circuit for and I F 0 5 V.5 V.5 V V OL T PHL TPLH Fig. 7 Switching Time Test Circuit V FF B A I F + V F Noise Shield 4 7 V CC V B V O 5 GND +5 V R L 0. µf V FF I F A B + VF VF + Noise Shield 4 5 CC V RL V0 7 V0 GND 0. µf +5 V + V CM Pulse Gen V CM + Pulse Gen Test Circuit for,, and Test Circuit for and V CM 0 V 90% 90% 0% 0% 0 V t r t f Switch at A : I F = 0 ma 5 V Switch at A : I F = ma L Fig. Common Mode Immunity Test Circuit Page of
SINGLECHANNEL: Package Dimensions (Through Hole) Package Dimensions (Surface Mount) 0.90 (9.9) 0.70 (9.40) 4 PIN ID. 4 PIN ID. 5 7 0.70 (.) 0.50 (.5) 0.70 (.) 0.50 (.5) 0.90 (9.9) 0.70 (9.40) 5 7 SEATING PLANE 0.00 (5.0) 0.40 (.55) 0.070 (.7) 0.045 (.4) 0.00 (0.5) MIN 0.070 (.7) 0.045 (.4) 0.00 (0.5) MIN 0.00 (7.) TYP 0.0 (0.4) 0.00 (0.0) 0.54 (.90) 0.0 (.05) 0.0 (0.5) 0.0 (0.4) 0.0 (0.40) 0.00 (0.0) 0.00 (.54) TYP 5 MAX 0.00 (7.) TYP 0.00 (.54) TYP 0.0 (0.5) 0.0 (0.4) 0.045 [.4] 0.5 (.00) MIN 0.405 (0.0) MIN Lead Coplanarity : 0.004 (0.0) MAX Package Dimensions (0.4 Lead Spacing) 4 PIN ID. 0.70 (.) 0.50 (.5) 5 7 0.90 (9.9) 0.70 (9.40) SEATING PLANE 0.00 (5.0) 0.40 (.55) 0.070 (.7) 0.045 (.4) 0.004 (0.0) MIN 0.54 (.90) 0.0 (.05) NOTE All dimensions are in inches (millimeters) 0.0 (0.5) 0.0 (0.4) 0.0 (0.40) 0.00 (0.0) 0.00 (.54) TYP 0.400 (0.) TYP 0 to5 Page 9 of
SINGLECHANNEL: ORDERING INFORMATION Option Order Entry Identifier Description S.S Surface Mount Lead Bend SD.SR Surface Mount; Tape and reel W.T 0.4" Lead Spacing MARKING INFORMATION 50 V XX YY T 4 5 Definitions Fairchild logo Device number VDE mark (Note: Only appears on parts ordered with VDE option See order entry table) 4 Two digit year code, e.g., 0 5 Two digit work week ranging from 0 to 5 Assembly package code Page 0 of
SINGLECHANNEL: QT Carrier Tape Specifications ( D Taping Orientation) 4.90 ± 0.0 0.0 ± 0.05 4.0 ± 0..0 ± 0. 4.0 ± 0. Ø.55 ± 0.05.75 ± 0.0. ± 0. 7.5 ± 0..0 ± 0. 0.0 ± 0.0 0. MAX 0.0 ± 0.0 Ø. ± 0. User Direction of Feed Reflow Profile Temperature ( C) 00 50 00 50 00 50 0 0 5 C, 0 0 s 5 C peak Time above C, 0 50 sec Ramp up = C/sec 0.5.5.5.5 4 4.5 Time (Minute) Peak reflow temperature: 5C (package surface temperature) Time of temperature higher than C for 0 50 seconds One time soldering reflow is recommended Page of
SINGLECHANNEL: DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Page of