Switching Regulators MC33063A SOP

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MC0A Features Operation from.0 to 0 Input Low Standby Current Current Limiting Output oltage Adjustable Frequency Operation to 00 khz Pb Free Packages are Available Output Current to. A SOP- 0. 0.0-0.0.0 0. Unit:mm Emitter Timing Capacitor GND Driver Sense CC Comparator Inverting Input Absolute Maximum atings Ta = Parameter Symbol ating Unit Power Supply oltage CC 0 Comparator Input oltage ange I -0. to 0 oltage C(SWITCH 0 Emitter oltage (Pin = 0 E(SWITCH 0 to Emitter oltage CE(SWITCH 0 Driver oltage C(driver 0 Driver Current (Note (driver 00 ma Current ISW. A Power Dissipation and Thermal Characteristics PD mw Thermal esistance.junction- to-ambient θja 0 C/W Junction Temperature TJ 0 Operating Ambient Temperature ange TA -0 to Storage Temperature ange Tstg - to 0 Note.:Maximum package power dissipation limits must be observed.

MC0A Electrical Characteristics Ta = Parameter Symbol Test Conditions Min Typ Max Unit Threshold oltage th TA = C... TA = Tlow to Thigh..9 Threshold oltage Line egulation egline CC = to 0. m Current Limit Sense oltage ipk(sense Ichg = Idischg, TA = C 0 00 0 Off State Current (off CE = 0 0.0 00 ua Supply Current C CC = to 0, CT = nf, Pin = CC,Pin > th, Pin = GND, remaining pins open ma Input Bias Current IIB in = 0-0 -00 na Charge Current Ichg CC = to 0, TA = C ua Discharge Current Idischg CC = to 0, TA = C 0 0 0 Discharge to Charge Current atio Idischg/Ichg Pin to CC, TA = C... Saturation oltage, Darlington Connection CE(sat ISW =.0 A, Pins, connected. Saturation oltage CE(sat ISW = A, Pin = Ω to CC 0. 0. Forced 0 DC current gain hfe ISW = A, CE = 0 Transition frequency f Pin = 0, CT = nf MHz Marking Marking 0 Drive I pk Sense CC Comparator Inverting Input SQ Oscillator 00 Q Q Comparator. eference egulator Emitter Timing Capacitor GND This device contains active transistors. Figure. epresentative Schematic Diagram

MC0A 000 off µ 00 00 00 0 0 0.0.0 CC =.0 Pin = CC Pin = GND TA = C.0 0.0 0.0 0.0 0. 0. 0..0.0.0 0, ILLATO TIMING CAPACITO (nf, ILLATO OLTAGE ( CC =.0 Pin = CC Pin = GND Pins,, = Open CT =.0 nf TA = C 0 s/di 00 m/di Figure. Output On Off Time versus Oscillator Timing Capacitor Figure. Timing Capacitor Waveform, SATUATION OLTAGE ( CE(sat........ CC =.0 Pins,, = CC Pins, = GND TA = C.0 0 0. 0. 0. 0..0... I E, EMITTE CUENT (A CE(sat, SATUATION OLTAGE (..0 0.9 0. 0. 0. 0. 0. 0. 0. 0. 0 CC =.0 Pin = CC Pins,, = GND TA = C Darlington Connection Forced = 0 0 0. 0. 0. 0..0... I C, COLLECTO CUENT(A, CUENT LIMIT SENSE OLTAGE ( IPK(sense Figure. Emitter Follower Configuration Output Saturation oltage versus Emitter Current 00 0 0 CC =.0 I chg = I dischg 0 0 00 0 0 0 0 00 0 0 00 T A, AMBIENT TEMPEATUE ( C Figure. Current Limit Sense oltage versus Temperature CC, SUPPLY CUENT (ma I Figure. Common Emitter Configuration Output Saturation oltage versus Current.....0.. CT =.0 nf 0. Pin = CC 0. Pin = GND 0 0.0 0 0 0 0 CC, SUPPLY OLTAGE ( Figure. Standby Supply Current versus Supply oltage

MC0A 0 H L 0 S Q Q Q 0. 00 CC. Comp. ef eg 00 pf N9. k k.0 H / ma 0 C O 00 Optional Filter Test Conditions esults Line egulation =.0 to, I O = ma 0 m = ± 0.0% Load egulation =, I O = ma to ma 0 m = ± 0.0% Output ipple =, I O = ma 00 mpp Efficiency =, I O = ma.% Output ipple With Optional Filter =, I O = ma 0 mpp. Figure. Step Up Converter 0 for constant Figure 9. External Current Boost Connections for I C Peak Greater than. A 9a. External NPN 9b. External NPN Saturated

MC0A S Q Q Q 0. 00 CC Comp.. ef eg N9 C L T 0 pf 0 H. k. k 0 C O.0 /00 ma.0 H 00 Optional Filter Test Conditions esults Line egulation = to, I O = 00 ma m = ± 0.% Load egulation =, I O = 0 ma to 00 ma.0 m = ± 0.0% Output ipple =, I O = 00 ma 0 mpp Short Circuit Current =, L = 0.. A Efficiency =, I O = 00 ma.% Output ipple With Optional Filter =, I O = 00 ma 0 mpp Figure 0. Step Down Converter Figure. External Current Boost Connections for I C Peak Greater than. A a. External NPN b. External PNP Saturated

MC0A S Q Q Q 0. L H. to.0 00 CC Comp.. ef eg 00 pf N9. k 9 000 f C O /00 ma.0 H 00 Optional Filter Test Conditions esults Line egulation =. to.0, I O = 00 ma.0 m = ± 0.0% Load egulation =.0, I O = 0 ma to 00 ma 0.0 = ±0.09% Output ipple =.0, I O = 00 ma 00 mpp Short Circuit Current =.0, L = 0. 90 ma Efficiency =.0, I O = 00 ma.% Output ipple With Optional Filter =.0, I O = 00 ma 0 mpp Figure. oltage Inverting Converter Figure. External Current Boost Connections for I C Peak Greater than. A a. External NPN b. External PNP Saturated

MC0A Calculation Step Up Step Down oltage Inverting / F (min F out F (min sat in(min sat sat ( f f f ( ( (.0 x 0.0 x 0.0 x 0 I out(max I out(max I out(max 0./ 0./ 0./ L (min (in(min sat (max ((min sat (max ((min sat (max C O 9 I out ( 9 ripple(pp ripple(pp I out ripple(pp sat = Saturation voltage of the output switch. F = Forward voltage drop of the output rectifier. The following power supply characteristics must be chosen: Nominal input voltage. Desired output voltage, I out Desired output current. f min Minimum desired output switching frequency at the selected values of and I O. ripple(pp Desired peak to peak output ripple voltage. In practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. NOTE:. For further information refer to Application Note AN90A/D and AN9/D. Figure. Design Formula Table