1 / 12 Fst Feedbck Strtegies for Longitudinl Bem Stbiliztion IPAC 2012, New Orlens, USA S. Pfeiffer 1, C. Schmidt 1, M.K. Bock 1, H. Schlrb 1, W. Jlmuzn 2, G. Lichtenberg 3, H. Werner 3 1 DESY Hmburg 2 Technicl University Lodz Deprtment of Microelectronics nd Computer Science 3 Hmburg University of Technology Institute of Control Systems 21.05.2012
2 / 12 Contents 1 Motivtion 2 Optiml Field Control 3 Optiml Bem Control 4 Conclusion
3 / 12 FLASH (Free electron LASer Hmburg) Energy 1.25GeV, Wvelength down to 4.12nm Bsic Components RF Gun - genertes electrons, first pre-ccelertor Cryomodules - increses the energy of the electrons Bunch Compressor - reduces the bunch length sflash nd Undultors - excite the electrons to emit X-ry by SASE (Self-Amplified Spontneous Emission) process Pump-Probe Experiments
3 / 12 FLASH (Free electron LASer Hmburg) Energy 1.25GeV, Wvelength down to 4.12nm opticl lser probe pulse pump pulse Detector Bsic Components RF Gun - genertes electrons, first pre-ccelertor Cryomodules - increses the energy of the electrons Bunch Compressor - reduces the bunch length sflash nd Undultors - excite the electrons to emit X-ry by SASE (Self-Amplified Spontneous Emission) process Pump-Probe Experiments
3 / 12 FLASH (Free electron LASer Hmburg) Energy 1.25GeV, Wvelength down to 4.12nm opticl lser probe pulse pump pulse Detector Bsic Components RF Gun - genertes electrons, first pre-ccelertor Cryomodules - optiml ccelertion field control Bunch Compressor - control bem properties sflash nd Undultors - excite the electrons to emit X-ry by SASE (Self-Amplified Spontneous Emission) process Pump-Probe Experiments
4 / 12 Overview of RF - Sttion Vector- Mster modultor oscilltor 1.3GHz Feedforwrd FFI u I DAC u Q DAC Klystron Lerning Feedforwrd Wveguide 1.3 GHz +250kHz clock f=1mhz Cvity 8x 1.3GHz Fieldprobe 1.3 GHz +250kHz 250kHz ADC b -b Cryomodule clock f=1mhz Clibrtion G F (z) ADC b -b Indices I nd Q FPGA I - rel (in-phse) Q - imginry (qudrture) FFQ LLRF Controller Controller C(z) e I e Q y I y Q Reference ri rq
4 / 12 Overview of RF - Sttion Vector- Mster modultor oscilltor 1.3GHz Feedforwrd FFI u I DAC u Q DAC Klystron Lerning Feedforwrd Wveguide 1.3 GHz +250kHz clock f=1mhz Cvity 8x 1.3GHz Fieldprobe 1.3 GHz +250kHz 250kHz ADC b -b Cryomodule clock f=1mhz Clibrtion G F (z) ADC b -b Indices I nd Q I - rel (in-phse) Q - imginry (qudrture) MIMO system 2 inputs, 2 outputs FPGA FFQ LLRF Controller Controller C(z) e I e Q y I y Q Reference ri rq
5 / 12 Overview of RF - Sttion Vector- Mster modultor oscilltor 1.3GHz Feedforwrd FFI u I DAC u Q DAC Klystron Lerning Feedforwrd Wveguide 1.3 GHz +250kHz clock f=1mhz Cvity 8x 1.3GHz Fieldprobe 1.3 GHz +250kHz 250kHz ADC b -b Cryomodule clock f=1mhz Clibrtion G F (z) Approximtion of Field Behvior ADC b -b Pulsed Mode - 10 Hz 2400 bunches 3 MHz LLF - pulse to pulse C(z) - within pulse FPGA FFQ LLRF Controller Controller C(z) e I e Q y I y Q Reference ri rq
6 / 12 System Description Physics Equtions Engineering White Box Model Blck Box Model
6 / 12 System Description Physics Equtions Engineering White Box Model Blck Box Model Identifiction Methods
6 / 12 System Description Physics Engineering Equtions White Box Model Cvity Equtions to fix the structure to Vector-Modultor Importnt Equtions Grey Box Model Blck Box Model Identifiction Methods from Vector-Sum System Identifiction Prmeter Identifiction within minutes - XFEL (26 RF sttions) LTI (Liner Time-Invrint) Dynmic Model Bndwidth, sttic gin, pssbnd modes
System Identifiction - Result Amplitude in bit 1000 0 Cross Vlidtion Chnnel I 1000 U /10 2000 Excittion 0 100 200 300 400 500 600 Y 700 Mesured Amplitude in bit u I u Q 2000 1000 0 1000 Chnnel Q Y Simulted 0 100 200 300 400 500 600 700 Time in µs G F (z) y I 800 1000 y Q 1200 Zoom Chnnel I 1400 175 180 185 190 195 200 Time in µs 7 / 12
8 / 12 Model Bsed Controller Design MIMO System MIMO controller Modern optiml controller design methods (1) H -Fixed Order Optimiztion - discrete time (HIFOOd) (2) Shpe the desired closed loop system behvior Controller Requirements (1.1) Robust - system is stble for lrge prmeter rnges (1.2) Fixed controller order - FPGA (1.3)+(2) Optiml - fst response (1.3)+(2) Decoupling - necessry for bem bsed feedbck This would go beyond the scope of this tlk!... is necessry for optiml bem control!
8 / 12 Model Bsed Controller Design MIMO System MIMO controller Modern optiml controller design methods (1) H -Fixed Order Optimiztion - discrete time (HIFOOd) (2) Shpe the desired closed loop system behvior Controller Requirements (1.1) Robust - system is stble for lrge prmeter rnges (1.2) Fixed controller order - FPGA (1.3)+(2) Optiml - fst response (1.3)+(2) Decoupling - necessry for bem bsed feedbck This would go beyond the scope of this tlk!... is necessry for optiml bem control!
9 / 12 Overview of RF - Sttion Vector- Mster modultor oscilltor 1.3GHz DAC DAC u I u Q Feedforwrd FFI Klystron Lerning Feedforwrd Wveguide 1.3 GHz +250kHz clock f=1mhz Cvity 8x 1.3GHz Fieldprobe 1.3 GHz +250kHz 250kHz ADC b -b Cryomodule clock f=1mhz Clibrtion G F (z) ADC b -b BAM BCM t A C FPGA G B FFQ LLRF Controller Controller C(z) y I y Q Setpoint SPI SPQ
Motivtion Optiml Field Control Optiml Bem Control Conclusion Bunch Compressor RF GUN e v e c ACC1 BAM1 BC2 BAM2 BCM1 Bem control t A E E A A C φ LLRF controller LLRF controller V cc Low energy High energy x y φ t A z 10 / 12
Motivtion Optiml Field Control Optiml Bem Control Conclusion Bunch Compressor RF GUN e v e c ACC1 BAM1 BC2 BAM2 BCM1 Bem control t A E E A A C φ LLRF controller LLRF controller E E 0 V cc Low energy z A 1 Bunch High energy C x y φ 1 φ t A z 10 / 12
Motivtion Optiml Field Control Optiml Bem Control Conclusion Bunch Compressor RF GUN e v e c ACC1 BAM1 BC2 BAM2 BCM1 Bem control t A E E A A C φ LLRF controller LLRF controller ( ) ta = G C B ( A ) A φ E E 0 V cc Sttic Mtrix Low energy z A 1 Bunch High energy C x y φ 1 φ t A z 10 / 12
11 / 12 Fst Feedbck Strtegies Field Feedbck Loop No Bem Control Field stbility A A 0.01% t A fter 1st BC r F e F C(z) u C u FF u G F (z) G(z) I,Q A,φ Loop dely of field: t D,F 4µs G B t A, C e B y I,y Q y F FPGA
11 / 12 Fst Feedbck Strtegies Field Feedbck Loop No Bem Control Field stbility A A 0.01% t A fter 1st BC 75fs r F e F C(z) u FF u C u G F (z) G(z) Exmple 1 Mhz rep. rte: 1µs 2µs± t A 3µs I,Q A,φ t A < 30fs (desired by user) C t A, C e B G B y I,y Q y F FPGA
11 / 12 Fst Feedbck Strtegies Field Feedbck Loop Set-Point Chnge by Bem Field stbility A A 0.005% t A fter 1st BC 40fs r F e F C(z) u C u FF u G F (z) G(z) I,Q A,φ BBF = G 1 B G B Loop dely of field: t D,F 4µs A A, φ t A, C BBF y I,y Q e B y F FPGA
11 / 12 Fst Feedbck Strtegies Cscded FB Loop Field - nd Bem Weighting Field stbility A A? % t A fter 1st BC? fs r F e F FW 0...1 MOD ( A A, φ) 0...2 BW e F,B C(z) u C Loop dely of bem t D,B 2µs u FF u G F (z) I,Q A,φ G B G(z) Loop dely of field: t D,F 4µs A A, φ t A, C BBF y I,y Q e B y F FPGA
11 / 12 Fst Feedbck Strtegies Cscded FB Loop Field - nd Bem Weighting Field stbility A A? % t A fter 1st BC? fs r F FPGA e F FW 0...1 MOD ( A A, φ) 0...2 BW Loop dely of field: t D,F 4µs e F,B A A, φ C(z) u C Loop dely of bem t D,B 2µs u FF t A, C BBF y I,y Q u BW e B y F G F (z) I,Q A,φ G B G(z) Optimum??? FW
Fst Feedbck Strtegies Cscded FB Loop Field - nd Bem Weighting 2 Field stbility A A 0.003% Normlized Arrivl Time Improvement Comprision to Field Stbility of 75fs t A fter 1st BC 24fs 3 Optimum BW Bem Weighting 1.5 1 0.5 2.5 2 1.5 1 t A 40fs 75fs 0.5 0 0 0.2 0.4 0.6 0.8 1 t A > 75fs FW Field Weighting Mesurements tken t FLASH 04/2012 11 / 12
12 / 12 Conclusion & Outlook Model bsed design Usble for ll RF sttions - fst nd relible Necessry for optiml field nd bem control Fst feedbck strtegies for longitudinl bem stbiliztion Only field control t A 75fs Bem bsed setpoint dpttion t A 40fs Cscded field - bem controller t A 24fs Outlook... Updte sme structure before 2nd BC section utca Thnk you for your ttention...