EE 435 Lecture 3 Common Mode Feedback Data Converters
Review from last lecture Offset Voltage Distribution Pdf of zero-mean Gaussian distribution f(x) -kσ kσ x Percent between: ±σ 68.3% ±σ 95.5% ±3σ 99.73%
Review from last lecture Source of Random Offset Voltages The random offset voltage is almost entirely that of the input stage in most op amps V X M 3 M 4 V X M 3 M 4 V OUT V OUT V 1 M 1 M V S V V 1 M 1 M V V S I T I T (a) (b)
Review from last lecture Random Offset Voltages From a straightforward but tedious analysis it follows that: 1 1 1 1 + + μ μ COX + VTO n μ W L W L W L W L p L n V EB n σ + + VOS VTO p W nl n μ n W nl 4 p 1 1 1 1 + L + + w + W n L n W p L p L n W n L p W p n p n n p p n n p p where the terms VT0, μ, COX, L, and W are process parameters 1mV μ (n-ch) VT0 5mV μ (p-ch) μ+ C OX.016μ (n-ch).03μ (p-ch) V X M 3 M 4 V OUT L=W 0.017μ VTO n μ p L n VOS W VTO p n L n μ n W n L p σ + 3 Usually the VT0 terms are dominant, thus the variance simplifies to V 1 M 1 M V S I T V
Review from last lecture Correspondingly: V OS Wn L VTOn n p n Random Offset Voltages L n n p W L VTOp V EBn 4 1 Wn L n L n 1 Wn L n 1 W L p p 1 p W L p p COX w L 1 W L n 1 n W n n L 1 W L p 1 p W p p which again simplifies to VTO n μ p L n VOS W VTO p n L n μ n W n L p σ + V X M 3 M 4 V OUT V 1 M 1 M V V S Note these offset voltage expressions are identical! I T
Random Offset Voltages Review from last lecture Example: Determine the 3σ value of the input offset voltage for The MOS differential amplifier if a) M 1 and M 3 are minimum-sized and b) the area of M 1 and M 3 are 100 times minimum size V X a) VTO n μ p L n VOS W VTO p n L n μ n W n L p σ + μ p σ V + OS W VTO n VTO p n L n μ n 1 σ.01 +.05 OS 0.5 3 V σ V OS 7mV M 3 M 4 V 1 M 1 M V V S I T V OUT 3 σ 16mV V OS Note this is a very large offset voltage!
Review from last lecture Random Offset Voltages Example: Determine the 3σ value of the input offset voltage for The MOS differential amplifier is a) M 1 and M 3 are minimum-sized and b) the area of M 1 and M 3 are 100 times minimum size VTO n μ p L n VOS W VTO p n L n μ n W n L p μ p σ + VOS W VTO n VTO p n L n μ n σ + b) 1 σ.01 +.05 VOS 1000.5 3 V X M 3 M 4 V 1 M 1 M V V S I T V OUT σ V OS 7.mV 3 σ 1.6mV V OS Note this is much lower but still a large offset voltage! The area of M 1 and M 3 needs to be very large to achieve a low offset voltage
Review from last lecture Random Offset Voltages V CC V CC Q 3 V X Q 4 Q 3 V X Q 4 V 1 Q 1 Q V V 1 Q 1 Q V V E V E I T I T (a) (b) It can be shown that V OS where very approximately V + = = 0.1μ Jn Jp Jn t En Jp Ep
Review from last lecture Random Offset Voltages V CC Example: Determine the 3σ value of the offset voltage of a the bipolar input stage if E1 = E3 =10μ Q 3 V X Q 4 V OS V Jn t + En Jp Ep V 1 Q 1 V E I T Q V V OS V t J E 1 5mV 0.1μ 1.6mV V OS 10μ 3 4.7mV V OS Note this value is much smaller than that for the MOS input structure!
Review from last lecture Random Offset Voltages Typical offset voltages: MOS - 5mV to 50MV BJT - 0.5mV to 5mV These can be scaled with extreme device dimensions Often more practical to include offset-compensation circuitry
Review from last lecture Common Centroid of Multiple Segmented Geometries
Common-Mode Feedback V OUT M 3 M 4 V OXX V OUT C L V IN M 1 M V IN C L V B M 9 Needs CMFB Repeatedly throughout the course, we have added a footnote on fullydifferential circuits that a common-mode feedback circuit (CMFB) is needed The CMFB circuit is needed to establish or stabilize the operating point or operating points of the op amp
Common-Mode Feedback V OUT M 3 M 4 V B1 V OUT M 3 M 4 V FB V IN M 1 M V IN C L V OUT V OUT C L V IN M 1 M V IN C L CMFB Circuit V B M 9 C L V OXX V B M 9 On the reference op amp, the CMFB signal can be applied to either the p- channel biasing transistors or to the tail current transistor It is usually applied only to a small portion of the biasing transistors though often depicted as shown There is often considerable effort devoted to the design of the CMFB though little details are provided in most books and the basic concepts of the CMFB are seldom rigorously developed and often misunderstood
Common-Mode Feedback Partitioning biasing transistors for V FB insertion V FB (Nominal device matching assumed, all L s equal) V OUT M 3 M 4 V OUT C L V IN M 1 M V IN C L CMFB Circuit V OXX V B M 9 M 3 V B1 M 4 Ideal (Desired) biasing V B1 M 3 M 3B M 4B M 4 V B1 V FB M 3 V FB V FB insertion M 4 Partitioned V FB insertion W +W =W 3 3B 3 W <<W 3B 3
Basic Operation of CMFB Block V FB V O1 V O CMFB Circuit V FB V OUT C L M 3 M 4 V OUT V IN M 1 M V IN C L V OXX CMFB Circuit V B M 9 V OXX CMFB Block V O1 verager V VG V FB V O V +V V FB= 01 0 s V OXX V OXX is the desired quiescent voltage at the stabilization node (irrespective of where V FB goes)
Basic Operation of CMFB Block CMFB Block V O1 verager V VG V FB V O V OXX V +V V FB= 01 0 s Comprised of two fundamental blocks verager Differential amplifier Sometimes combined into single circuit block Compensation of the CMFB path often required!!
Mathematics behind CMFB (consider an example that needs a CMFB) M 5 V B1 M 4 V O1 V OXX V OXX V O C 1 C V 1 M 1 M V V YY M 3 Notice there are two capacitors and thus two poles in this circuit
Mathematics behind CMFB (consider an example that needs a CMFB) M 5 V B1 M 4 V O1 V OXX V OXX V O C 1 C V 1 M 1 M V V YY M 3 g 05 g 04 V O1 V V O 1 V g m1 V GS1 V GS1 g 01 C 1 C g 0 g m V GS V GS M 3 M 3 M 3 W 3 =W 3 g 03 / g 03 / Small-signal model showing axis of symmetry
Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 V O1 V V O 1 V gm1vgs1 gmvgs g 05 VGS1 g01 C 1 C g0 VGS g03/ g03/ V d g m1 V GS1 V GS1 g 01 V OD C Small-signal difference-mode half circuit d 0 V sc+g +g +g OD 01 05 m1 g - m1 DIFF= sc+g 01 +g 05 g +g p DIFF= - C 01 05 V Note there is a single-pole in this circuit What happened to the other pole?
Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g 05 V O1 V V O 1 V gm1vgs1 gmvgs VGS1 g01 C 1 C g0 VGS V COM V OC g03/ g03/ g m1 V GS1 V GS1 g 01 C V S g 03 / Standard small-signal common-mode half circuit VOC sc+g 01+g 05 +gm1 VCOM -VS 0 V g +g / -g V -V V g S 01 03 m1 COM S OC 01 -gm1 g 01+g 03 / g 01+g 03 / COM - sc+g +g g +g +g / -g g sc+g 01 05 m1 01 03 m1 01 05 p COM g C 05 Note there is a single-pole in this circuit nd this is different from the difference-mode pole But the common-mode gain tells little, if anything, about the CMFB
Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g +g / 01 03 COM - 05 p sc+g COM 05 C gm1 - g 01+g05 DIFF= p sc+g +g DIFF= - C 01 05 g V O1 V V O 1 V VGS1 gm1vgs1 g01 C 1 C g0 g03/ g03/ gmvgs VGS Difference-mode analysis completely hides all information about commonmode This also happens in simulations Common-mode analysis completely hides all information about differencemode This also happens in simulations Difference-mode poles may move into RHP with FB so compensation is required for stabilization (or proper operation) Common-mode poles may move into RHP with FB so compensation is required for stabilization (or proper operation) Difference-mode simulations tell nothing about compensation requirements for common-mode feedback Common-mode simulations tell nothing about compensation requirements for difference-mode feedback
Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g +g / 01 03 COM - 05 p sc+g COM 05 C gm1 - g 01+g05 DIFF= p sc+g +g DIFF= - C 01 05 g V O1 V V O 1 V VGS1 gm1vgs1 g01 C 1 C g0 g03/ g03/ gmvgs VGS Common-mode and difference-mode gain expressions often include same components though some may be completely absent in one or the other mode Compensation capacitors can be large for compensating either the common-mode or difference-mode circuits Highly desirable to have the same compensation capacitor serve as the compensation capacitor for both difference-mode and common-mode operation But tradeoffs may need to be made in phase margin for both modes if this is done Better understanding of common-mode feedback is needed to provide good solutions to the problem
Mathematics behind CMFB (consider an example that needs a CMFB) g05 g04 g 05 V O1 V V O 1 V gm1vgs1 gmvgs VGS1 g01 C 1 C g0 VGS V COM V OC g03/ g03/ g m1 V GS1 V GS1 g 01 C V S g 03 / Standard small-signal common-mode half circuit VOC sc+g 01+g 05 +gm1 VCOM -VS 0 V g +g / -g V -V V g S 01 03 m1 COM S OC 01 -gm1 g 01+g 03 / g 01+g 03 / COM - sc+g +g g +g +g / -g g sc+g 01 05 m1 01 03 m1 01 05 p COM g C 05 Note there is a single-pole in this circuit nd this is different from the difference-mode pole But the common-mode gain tells little, if anything, about the CMFB
Common-Mode and Difference-Mode Issues Overall poles are the union of the common-mode and difference mode poles Separate analysis generally require to determine common-mode and differencemode performance Some amplifiers will need more than one CMFB
Common-mode offset voltage M 5 M 4 V O1 V 0XX V COFF V 0XX V O C 1 V B1 C M 1 M V C1 V C1 V YY M 3 Definition: The common-mode offset voltage is the voltage that must be applied to the biasing node at the CMFB point to obtain the desired operating point at the stabilization node Note: Could alternately define common-mode offset relative to V YY input if CMFB to M 3
Common-mode offset voltage Consider again the Common-mode half circuit V O1 V 0XX M 5 M 4 V 0XX V COFF V O C 1 V B1 C M 1 M V C1 V C1 M 4 V COFF V O V YY M 3 V XX M V C1 C M 3 M 3 M 3 V YY M 3 There are three common-mode inputs to this circuit! The common-mode signal input is distinct from the input that is affected by V COFF The gain from the common-mode input where V FB is applied may be critical!
Common-mode gains M 5 M 4 V C M 4 V O1 C 1 V C1 V 0XX V 0XX V COFF V B1 M 1 M V C1 C V O V O V YY M 3 M V C1 M 3 V C3 V0 g 0+g 03 / COM - VC1 sc+g04 V0 gm4 COM - V sc+g V0 g m3 / COM3 - V sc+g C 04 C3 04 C g 0+g 03 / IT 1 COM0 - g I / g 04 m4 T EB4 COM0 - g 04 IT / VEB 4 T I / V 4 IT / g / V m3 EB3 COM30 = - g04 I T / VEB3 lthough the common-mode gain COM0 is very small, C0M0 is very large! Shift in V 0Q from V OXX is the product of the common-mode offset voltage and COM0
Effect of common-mode offset voltage VDD M5 M4 VO1 V0XX VCOFF V0XX VO V C C1 VC1 M1 VB1 M VC1 C M 4 VYY M3 V COFF V O V B1 M V C1 C COM0 4 V EB 5 V C3 M 3 V 0 = COM0V COFF How much change in V 0 is acceptable? (assume e.g. 50mV) How big is V COFF? How big is COM0? (similar random expressions for V OS, assume, e.g. 5mV) (that due to process variations even larger) (if λ=.01, V EB =., COM0 =000) If change in V 0 is too large, CMFB is needed (50mV <? 000x5mV)
How much gain is needed in the CMFB amplifier? VDD VFB M3 M4 VOUT VOUT VIN M1 M VIN CMFB Circuit CL CL VOXX VB M9 CMFB Block V O1 verager V VG V FB V O V OXX CMFB must compensate for V COFF Want to guarantee V0Q -V 0XX < ΔVOUT-CCEPTBLE This is essentially the small-signal output with a small-signal input of V COFF
How much gain is needed in the CMFB amplifier? VDD VFB M3 M4 VIN M1 M VIN CMFB Circuit VOUT VOUT CL CL V C1 M 4 VB M9 V COFF M V C1 V O C V VG V FB VOXX V OXX Want to guarantee V C3 M 3 V0Q -V 0XX < ΔVOUT-CCEPTBLE The CMFB Loop Do a small-signal analysis, only input is V COFF V = V +V 0 0 COFF COM V =V 0 COFF 1- COM COM V =V 0UT-CCEPTBLE COFF 1- COM COM
How much gain is needed in the CMFB amplifier? VDD VFB VOUT M3 M4 VOUT V C1 X V COFF V C3 M 4 M M 3 Y V C1 V O C V VG V OXX V FB VIN VIN M1 M CL VB M9 V =V 0UT-CCEPTBLE COFF CL VOXX 1- CMFB Circuit COM COM The CMFB Loop This does not require a particularly large gain This is the loop that must be compensated since and COMP will be frequency dependent Miller compensation capacitor for compensation of differential loop will often appear in shunt with C Can create this loop without CM inputs on fully differential structure for simulations Results extend readily to two-stage structures with no big surprises Capacitances on nodes X and Y create poles for CMFB circuit Reasonably high closed-loop CMFB bandwidth needed to minimize shifts in output due to high-frequency common-mode noise
CMFB Circuits Several (but not too many) CMFB circuits exist Can be classified as either continuous-time or discrete-time I B V OXX I B + V o - V o V 01 M 1 M M 3 M 4 V 0 N 1 N C S C 1 C 1 C S N N 1 V FB M 5 V 01 V 0 N 1 N N N 1 V SS V FB M 6 V SS
CMFB Circuits Several (but not too many) CMFB circuits exist Can be classified as either continuous-time or discrete-time I B I B V OXX I B + V o - V o V 01 M 1 M M 3 M 4 V 0 N 1 N C S C 1 C 1 C S N N 1 V FB M 5 V 01 V 0 N 1 N N N 1 V SS V FB M 7 M 6 V SS Circuit in blue can be added to double CMFB gain
End of Lecture 3