NTE74177 Integrated Circuit TTL 35Mhz Presettable Binary Counter/Latch

Similar documents
NTE74176 Integrated Circuit TTL 35Mhz Presettable Decade Counter/Latch

NTE74LS181 Integrated Circuit TTL Arithmetic Logic Unit/Function Generator

NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs

Synchronous 4 Bit Counters; Binary, Direct Reset

NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset

NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register

DM7490A Decade and Binary Counter

74LS393 Dual 4-Bit Binary Counter

NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output

MM54HCT193 MM74HCT193 Synchronous Binary Up Down Counters

DM74LS90/DM74LS93 Decade and Binary Counters

74LS195 SN74LS195AD LOW POWER SCHOTTKY

MM74HC161 MM74HC163 Synchronous Binary Counter with Asynchronous Clear Synchronous Binary Counter with Synchronous Clear

NTE4035B Integrated Circuit CMOS, 4 Bit Parallel In/Parallel Out Shift Register

NTE40160B, NTE40161B NTE40162B, NTE40163B Integrated Circuit CMOS, Synchronous Programmable 4 Bit Counters

MM74HC175 Quad D-Type Flip-Flop With Clear

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

DM5490 DM7490A DM7493A Decade and Binary Counters

74F193 Up/Down Binary Counter with Separate Up/Down Clocks

MM74HC74A Dual D-Type Flip-Flop with Preset and Clear

DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear

Presettable Counters High-Performance Silicon-Gate CMOS

NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

MM54HC73 MM74HC73 Dual J-K Flip-Flops with Clear

74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet

MM74HC157 Quad 2-Input Multiplexer

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register

Up/down binary counter with separate up/down clocks

Dual D Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS

CD4024BC 7-Stage Ripple Carry Binary Counter

74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state

74ACT825 8-Bit D-Type Flip-Flop

74LV393 Dual 4-bit binary ripple counter

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

MM74HC151 8-Channel Digital Multiplexer

MM74HC175 Quad D-Type Flip-Flop With Clear

UNISONIC TECHNOLOGIES CO., LTD U74HC164

INTEGRATED CIRCUITS. 74ALS11A Triple 3-Input AND gate. Product specification 1991 Feb 08 IC05 Data Handbook

74HC393; 74HCT393. Dual 4-bit binary ripple counter

74LS165 8-Bit Parallel In/Serial Output Shift Registers

MM74HC374 3-STATE Octal D-Type Flip-Flop

DM74LS90 DM74LS93 Decade and Binary Counters

MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

CD4013BC Dual D-Type Flip-Flop

Presettable 4-Bit Binary UP/DOWN Counter High-Performance Silicon-Gate CMOS

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

DM74S373 DM74S374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:

74AC169 4-Stage Synchronous Bidirectional Counter

INTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

CD4028BC BCD-to-Decimal Decoder

74LS75 Quad Latch. DM74LS75 Quad Latch. General Description. Ordering Code: Logic Diagram. Connection Diagram. Function Table (Each Latch)

MM74C90 MM74C93 4-Bit Decade Counter 4-Bit Binary Counter

MICROCIRCUITS, DIGITAL, TTL, FLIP-FLOPS, MONOLITHIC SILICON. Inactive for new design after 7 September 1995

NTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate

DM74LS373 DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

74ACT Bit D-Type Flip-Flop with 3-STATE Outputs

INTEGRATED CIRCUITS. 74LV stage binary ripple counter. Product specification 1998 Jun 23 IC24 Data Handbook


CD4029BM CD4029BC Presettable Binary Decade Up Down Counter

54AC174/54ACT174 Hex D Flip-Flop with Master Reset

DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

HCF4035B 4 STAGE PARALLEL IN/PARALLEL OUT SHIFT REGISTER

MM74HC373 3-STATE Octal D-Type Latch

MM74HC373 3-STATE Octal D-Type Latch

SN74LS153D 74LS153 LOW POWER SCHOTTKY

IL34C87 CMOS Quad TRISTATE Differential Line Driver.

CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders

MM74HC573 3-STATE Octal D-Type Latch

INTEGRATED CIRCUITS. For a complete data sheet, please also download:


74HC238; 74HCT to-8 line decoder/demultiplexer

INTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook.

onlinecomponents.com

MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, BIPOLAR, SCHOTTKY TTL, FLIP-FLOPS, CASCADABLE, MONOLITHIC SILICON

DM7473 Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

12-Stage Binary Ripple Counter High-Voltage Silicon-Gate CMOS

74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

MM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear

CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset

NTE40194B Integrated Circuit CMOS, 4 Bit Bidirectional Universal Shift Register

MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer


1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS

54LS160A DM74LS160A 54LS162A DM74LS162A Synchronous Presettable BCD Decade Counters

BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA

74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs

NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. *MR for LS160A and LS161A *SR for LS162A and LS163A

74LVQ174 Low Voltage Hex D-Type Flip-Flop with Master Reset

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

MM74HC259 8-Bit Addressable Latch/3-to-8 Line Decoder

UNISONIC TECHNOLOGIES CO., LTD L16B45 Preliminary CMOS IC

74LVC374 Octal D-type flip-flop; positive edge-trigger (3-State) INTEGRATED CIRCUITS

Transcription:

NTE74177 Integrated Circuit TTL 35Mhz Presettable Binary Counter/Latch Description: The NTE74177 is a high speed monolithic counter in a 14 Lead plastic DIP type package consisting of four DC coupled master slave flip flops which are internally interconnected to provide a divide by two and a divide by eight counter. This device is fully programmable; that is, the outputs may be preset to any state by placing a low on the count/load input and entering the desired data at the data inputs. The outputs will change to agree with the data inputs independent of the state of the clocks. The NTE74177 may also be used as a 4 bit latch bu using the count/load input as the strobe and entering data at the data inputs. The outputs will directly follow the data inputs when the count/load is low, but will remain unchanged when the count/load is high and the clock inputs are active. This high speed counter will accept count frequencies of 0 to 35Mhz at the clock 1 input and 0 to 17.5Mhz at the clock 2 input. During the count operation, transfer of information to the outputs occurs on the negative going edge of the clock pulse. The counter features a direct clear which, when taken low, sets all outputs low regardless of the state of the clocks. All inputs are diode clamped to minimize transmission line effects and simplify system design. The circuit is compatible with most TTL logic families and typical power dissipation is 150mW. Features: Reduced Power Version of the NTE74197 50Mhz Counter Performs BCD, Bi Quinary, or Binary Counting Fully Programmable Fully Independent Clear Input Guaranteed to Count at Input Frequencies from 0 to 35Mhz Input Clamping Diodes Simplify System Design Absolute Maximum Ratings: (Note 1) Supply Voltage, V CC... 7V Input Voltage, V IN... 5.5V Interemitter Voltage (Note 2)... 5.5V Operating Temperature Range, T A... 0 C to +70 C Storage Temperature Range, T stg... 65 C to +150 C Note 1. Voltage values are with respect to network ground terminal. Note 2. This is the voltage between two emitters of a multiple emitter transistor. For this circuit, this rating applies between the clear and count/load inputs.

Recommended Operating Conditions: Parameter Symbol Min Typ Max Unit Supply Voltage V CC 4.75 5.0 5.25 V High Level Output Current I OH 800 A Low Level Input Voltage V OL 0.8 V Count Frequency Clock 1 Input f max 0 35 MHz Clock 2 Input 0 17.5 MHz Pulse Width Clock 1 Input t w 14 ns Clock 2 Input 28 ns Clear 20 ns Load 25 ns Input Hold Time High Level Data t h t w(load) ns Low Level Data t w(load) ns Input Setup Time High Level Data t su 15 ns Low Level Data 20 ns Count Enable Time (Note 3) t enable 25 ns Operating Temperature Range T A 0 +70 C Note 3. Minimum count enable time is the interval immediately preceding the negative going edge of the clock pulse during which interval the count/load and clear inputs must both be high to ensure counting. Electrical Characteristics: (Note 4, Note 5) High Level Input Voltage V IH 2 V Low Level Input Voltage V IL 0.8 V Input Clamp Voltage V IK V CC = MIN, I I = 12mA 1.5 V High Level Output Voltage V OH V CC = MIN, V IH = 2V, V IL = 0.8V, I OH = -800 A 2.4 3.4 V Low Level Output Voltage V OL V CC = MIN, V IH = 2V, V IL = 0.8V, 0.2 0.4 V I OL = 16mA, Note 6 Input Current I I V CC = MAX, V I = 5.5V 1 ma High Level Input Current I IH Data, Count/Load V CC = MAX, V I = 2.4V 40 A Clear, Clock 1 80 A Clock 2 80 A Note 4..For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operation Conditions. Note 5. All typical values are at V CC = 5V, T A = +25 C. Note 6. Q A outputs are tested at I OL n = 16mA plus the limit value of I IL for the clock 2 input. This permits driving the clock 2 while fanning out to 10 Series 74 loads.

Electrical Characteristics (Cont d): (Note 4, Note 5) Low Level Input Current I IL Data, Count/Load V CC = MAX, V I = 0.4V 1.6 ma Clear 3.2 ma Clock 1 4.8 ma Clock 2 3.2 ma Short Circuit Output Current I CS V CC = MAX, Note 7 20 57 ma Supply Current I CC V CC = MAX, Note 8 30 48 ma Note 4..For conditions shown as MIN or MAX, use the appropriate value specified under Recommended Operation Conditions. Note 5. All typical values are at V CC = 5V, T A = +25 C. Note 7. Not more than one output should be shorted at a time. Note 8. I CC is measured with all inputs grounded and all outputs open. Switching Characteristics: (V CC = 5V, T A = +25 C unless otherwise specified) Maximum Count Frequency (From Clock 1 Input to Q A Output) f max R L = 400, C L = 15pF 35 50 MHz t PLH 8 13 ns (From Clock 1 Input to Q A Output) t PHL 11 17 ns t PLH 11 17 ns (From Clock 2 Input to Q B Output) t PHL 17 26 ns t PLH 27 41 ns (From Clock 2 Input to Q C Output) t PHL 34 51 ns t PLH 44 66 ns (From Clock 2 Input to Q D Output) t PHL 50 75 ns t PLH 19 29 ns (From A, B, C, D Input to Q A, Q B, Q C, Q D, Output) t PHL 31 46 ns t PLH 29 43 ns (From Load Input to Any Output) t PHL 32 48 ns (From Clear Input to Any Output) t PHL 32 48 ns Typical Count Configuration: The output of flip flop A is not internally connected to the succeeding flip flops; therefore, the counter may be operated in two independent modes: 1.When used as a high speed 4 bit ripple though counter, output Q A must be externally connected to the clock 2 input. The input count pulses are applied to the clock 1 input. Simultaneous divisions by 2, 4, 8, and 16 are performed at the Q A, Q B, Q C, and Q D outputs as shown in the function table. 2.When used as a 3 bit ripple though counter, the input count pulses are applied to the clock 2 input. Simultaneous frequency divisions by 2, 4, and 8 are available at the Q B, Q C, and Q D outputs. Independent use of flip flop A is available if the load and clear functions coincide with those of the 3 bit ripple through counter.

Count Function Tables: Outputs Q D Q C Q B Q A 0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L 9 H L L H 10 H L H L 11 H L H H 12 H H L L 13 H H L H 14 H H H L 15 H H H H H = High Level, L = Low Level NOTE: Output Q A connected to clock 2 input.

Pin Connection Diagram LOAD Q C C A Q A CLK2 GND 1 2 3 4 5 6 7 14 13 12 V CC CLR Q D 11 D 10 9 8 B Q B CLK1 14 8 1 7.785 (19.95) Max.300 (7.62).200 (5.08) Max.100 (2.45).099 (2.5) Min.600 (15.24)