Status of HICUM/L2 Model

Similar documents
Modeling high-speed SiGe-HBTs with HICUM/L2 v2.31

Accurate transit time determination and. transfer current parameter extraction

HICUM release status and development update L2 and L0

Working Group Bipolar (Tr..)

About Modeling the Reverse Early Effect in HICUM Level 0

HICUM / L2. A geometry scalable physics-based compact bipolar. transistor model

Runtime Analysis of 4 VA HiCuM Versions with and without Internal Solver

A Novel Method for Transit Time Parameter Extraction. Taking into Account the Coupling Between DC and AC Characteristics

Regional Approach Methods for SiGe HBT compact modeling

HICUM Parameter Extraction Methodology for a Single Transistor Geometry

Non-standard geometry scaling effects

Didier CELI, 22 nd Bipolar Arbeitskreis, Würzburg, October 2009

Charge-storage related parameter calculation for Si and SiGe bipolar transistors from device simulation

Breakdown mechanisms in advanced SiGe HBTs: scaling and TCAD calibration

Investigation of New Bipolar Geometry Scaling Laws

2 nd International HICUM user s meeting

A new transit time extraction algorithm based on matrix deembedding techniques

Nonlinear distortion in mm-wave SiGe HBTs: modeling and measurements

TCAD setup for an advanced SiGe HBT technology applied to the HS, MV and HV transistor versions

Digital Integrated CircuitDesign

Methodology for Bipolar Model Parameter Extraction. Tzung-Yin Lee and Michael Schröter February 5, TYL/MS 2/5/99, Page 1/34

BIPOLAR JUNCTION TRANSISTOR MODELING

Bipolar junction transistor operation and modeling

The Devices. Jan M. Rabaey

figure shows a pnp transistor biased to operate in the active mode

****** bjt model parameters tnom= temp= *****

13. Bipolar transistors

Lecture 19 - p-n Junction (cont.) October 18, Ideal p-n junction out of equilibrium (cont.) 2. pn junction diode: parasitics, dynamics

HICUM/L2 version 2.2: Summary of extensions and changes

MEXTRAM (level 504) the Philips model for bipolar transistors

Semiconductor Device Simulation

PCM- and Physics-Based Statistical BJT Modeling Using HICUM and TRADICA

Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes

Symbolic SPICE TM Circuit Analyzer and Approximator

Device Physics: The Bipolar Transistor

HICUM/L2 version 2.21: Release Notes

MP6901 MP6901. High Power Switching Applications. Hammer Drive, Pulse Motor Drive and Inductive Load Switching. Maximum Ratings (Ta = 25 C)

Bipolar Junction Transistor (BJT) - Introduction

University of Pittsburgh

Junction Bipolar Transistor. Characteristics Models Datasheet

Charge-Storage Elements: Base-Charging Capacitance C b

Revisiting the Charge Concept in HBT/BJT Models

Lecture 17 - The Bipolar Junction Transistor (I) Forward Active Regime. April 10, 2003

Lecture Notes for ECE 215: Digital Integrated Circuits

Thermal Capacitance cth its Determination and Influence on Transistor and Circuit Performance

TEMPERATURE DEPENDENCE SIMULATION OF THE EMISSION COEFFICIENT VIA EMITTER CAPACITANCE

Bipolar Junction Transistor (BJT) Model. Model Kind. Model Sub-Kind. SPICE Prefix. SPICE Netlist Template Format

ELEC 3908, Physical Electronics, Lecture 19. BJT Base Resistance and Small Signal Modelling

Institute of Solid State Physics. Technische Universität Graz. Exam. Feb 2, 10:00-11:00 P2

DC and AC modeling of minority carriers currents in ICs substrate

Bipolar Transistor WS 2011

Lecture 20 - p-n Junction (cont.) October 21, Non-ideal and second-order effects

Figure 1 Basic epitaxial planar structure of NPN. Figure 2 The 3 regions of NPN (left) and PNP (right) type of transistors

Chapter 13 Small-Signal Modeling and Linear Amplification

EE 230 Lecture 31. THE MOS TRANSISTOR Model Simplifcations THE Bipolar Junction TRANSISTOR

3D SELF HEATING MODELING FOR ELECTRO- THERMAL CHARACTERISATION OF SiGe HBTs

EE105 - Fall 2006 Microelectronic Devices and Circuits

ECE-305: Spring 2018 Final Exam Review

Review of Band Energy Diagrams MIS & MOS Capacitor MOS TRANSISTORS MOSFET Capacitances MOSFET Static Model

UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences

Spring Semester 2012 Final Exam

Lecture 35 - Bipolar Junction Transistor (cont.) November 27, Current-voltage characteristics of ideal BJT (cont.)

The PSP compact MOSFET model An update

The Mextram Bipolar Transistor Model

Semiconductor Device Modeling and Characterization EE5342, Lecture 15 -Sp 2002

Semiconductor Physics Problems 2015

The Mextram Bipolar Transistor Model

BJT - Mode of Operations

General Purpose Transistors

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices

Modeling of Devices for Power Amplifier Applications

Microelectronic Devices and Circuits Lecture 9 - MOS Capacitors I - Outline Announcements Problem set 5 -

Lecture 16 - The pn Junction Diode (II) Equivalent Circuit Model. April 8, 2003

Forward-Active Terminal Currents

EE105 Fall 2014 Microelectronic Devices and Circuits. NMOS Transistor Capacitances: Saturation Region

ECE 304: Bipolar Capacitances E B C. r b β I b r O

Transistor's self-und mutual heating and its impact on circuit performance


12. Memories / Bipolar transistors

Lecture 17 The Bipolar Junction Transistor (I) Forward Active Regime

ECE-342 Test 2 Solutions, Nov 4, :00-8:00pm, Closed Book (one page of notes allowed)

THERMAL EFFECTS ON ANALOG INTEGRATED CIRCUIT DESIGN MD MAHBUB HOSSAIN. Presented to the Faculty of the Graduate School of

EKV MOS Transistor Modelling & RF Application

Physics of Semiconductors 8 th

2SC3074 2SC3074. High Current Switching Applications. Maximum Ratings (Ta = 25 C)

Chapter 2 - DC Biasing - BJTs

Semiconductor Physics fall 2012 problems

Holes (10x larger). Diode currents proportional to minority carrier densities on each side of the depletion region: J n n p0 = n i 2

Session 6: Solid State Physics. Diode

2N3904 SMALL SIGNAL NPN TRANSISTOR

LOW TEMPERATURE MODELING OF I V CHARACTERISTICS AND RF SMALL SIGNAL PARAMETERS OF SIGE HBTS

Insulated Gate Bipolar Transistor (IGBT)

DC Biasing. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15-Mar / 59

4.5 (A4.3) - TEMPERATURE INDEPENDENT BIASING (BANDGAP)

Chapter 2. - DC Biasing - BJTs

EE 230 Lecture 33. Nonlinear Circuits and Nonlinear Devices. Diode BJT MOSFET

Linear Phase-Noise Model

Lecture 17. The Bipolar Junction Transistor (II) Regimes of Operation. Outline

Extraction of the substrate complex for HBT/BJT transistors

Lecture 38 - Bipolar Junction Transistor (cont.) May 9, 2007

Transcription:

Status of HICUM/L2 Model A. Pawlak 1), M. Schröter 1),2), A. Mukherjee 1) 1) CEDIC, University of Technology Dresden, Germany 2) Dept. of Electrical and Computer Engin., University of Calif. at San Diego, USA http://www.iee.et.tu-dresden.de/iee/eb/eb_homee.html andreas.pawlak@tu-dresden.de michael.schroeter@tu-dresden.de Bipolar Arbeitskreis 2014, Crolles AP, MS 1

Overview Overview Verisons of HICUM/L2 several changes in HICUM/L2 with version 2.30 version 2.31, 2.32 and 2.33 with minor changes Summary of changes/additions since HICUM/L2 version 2.30 simpification of lateral NQS modeling new model for correlated noise more flexible R th (T) formulation type flag for npn-transistors calculation of operating point values, added two new values named noise sources physical constants defined in model code bug-fixes / code corrections => details in VA-file header AP, MS 2

Overview Lateral NQS effect modeling Goal: improve computational efficiency by simplification AC analysis by using C RBi C RBi = f CRBi ( C jei + C jci + C dei + C dci ) Previous calculation of diffusion capacitances B* R Bi B V RBi C dei dq dei dq = -------------- and C jci dci = ------------- dv BE V BC dv BC V BE => were using ddx-operator Simplification avoiding ddx operator C dei dq dei -------------- -------------- di Tf i ------------ Tf dq i = = τ f0 ----- and C jci Tr dci = ------------- τ r -----. dv BE V BC dq dei di Tf dv BE V T dv BC V BE V T Use of τ f0 instead of τ f partially compensates for overestimation of g m by ideal value i Tf /V T AP, MS 3

Lateral NQS modeling (cont d) Lateral NQS modeling (cont d) Application of simplified model (SiGe HBT with f T = 350 GHz) V BE Strongly reduced code size (ADS): 2.3 MB (v2.30) vs. 0.3 MB(2.31) => Faster compilation and execution of code Note: this change is not backwards compatible AP, MS 4

Lateral NQS modeling (cont d) pnp transistor option switching between npn and pnp-type addition of type-flag: 1 => npn (default), -1 => pnp verified DC, AC, transient and noise characteristics AP, MS 5

Operating point values in HICUM Operating point variables Name defined in HICUM/L2 manual aligned with SPICE standard reference implementation in vacode Large computational effort in code -> flags available: `ifdef CALC_OP `ifdef OP_STATIC if (analysis("static")) begin: OPERATING_POINT `else begin: OPERATING_POINT `endif for best perfomance: undef. CALC_OP -> no calculations def. OP_STATIC -> no calculation during transient simulations IB IC IS IAVL VBE VBC VCE VSC BETADC GMi GMS RPIi RPIx RMUi RMUx ROi Lateral NQS modeling (cont d) Name CPIi CPIx CMUi CMUx CCS RBI RB RCX RE BETAAC CRBI TF FT TK DTSH AP, MS 6

Now operating point values Now operating point values TK: actual device temperature in Kelvin DTSH: temperature increase due to self-heating 450 400 Increase of ambient temperature 80 60 TK (K) 350 300 DTSH (K) 40 20 Increase of ambient temperature 250 0.6 0.7 0.8 0.9 1 1.1 V (V) BE 0 0.6 0.7 0.8 0.9 1 1.1 V BE (V) AP, MS 7

Physical constants Physical constants Request by simulator vendor to include values of physical constants in model code Advantage no dependence on different values in different simulators => same results of compact model results in all simulators Disadvantage possibly different results for same characteristics (e.g. base current) from different compact models with same formulation and parameters in same simulator due to different values of k B and q Will nevertheless be available in future releases AP, MS 8

Feature requests Feature requests Neutral base recombination request for implementation into HICUM/L2 physics-based model equation I NBRS = I NBRS0 [ 1 k b ( c 1) ] with c = C jci0 C jci and a constant k b 0.25 0.24 I B (μa) 0.23 0.22 0.21 meas model 0.2 0.5 0 0.5 V CB (V) AP, MS 9

Feature requests Improved substrate capacitance modeling Adding a perimeter related substrate capacitance without coupling network attached => directly between external C and S Allow junction (variable) and DTI (constant) capacitance Incorporation into HICUM/L2 no additional node required => simple addition requires bias and temperature dependent capacitances for perimeter junction related component b bl STI n + b.l. C jsb b bl STI n + b.l. b CS SiO 2 C jsp y jbl p - b DTI SiO 2 p + p + Also improves intra-device substate coupling (with proper network added) C jsb C jsp p + AP, MS 10

Feature requests Removing the internal HICUM/L2 loop Originally suggested and feasibility demonstrated in [1] Method Adding a volt. source with V=0 in I Tf branch => source current I Tp is a solution variable make Q pt a function of I Tp instead of I T => derivative dq pt /I Tp generated by compiler and present internal loop can be omitted MNA forces I Tp = I Tf => iteration for I Tp during MNA solution implementated in test code to be fully tested for production [1] Z. Huszka, E. Seebacher, "Removing the Internal Iteration Loop from Hicum/L2", 9 th HICUM Workshop, Germany, 2009. AP, MS 11

Feature requests Implementation results Note: no production implementation, removed ICH and TR Code reduction: 857 kb -> 527 kb (FORTRAN source code) Test case for forward gummel plots at different V BC, (- loop, o - no loop) 0.025 12 x 1011 0.02 10 I C, I B (A) 0.015 0.01 f T, f max (GHz) 8 6 4 0.005 2 0 0.7 0.8 0.9 1 1.1 V BE (V) 0 10 6 10 4 10 2 10 0 I C (A) iterations 6 5 4 3 2 operations 3 x 104 2.5 2 1.5 1 0.5 1 0.7 0.8 0.9 1 1.1 V (V) BE 0 0.7 0.8 0.9 1 1.1 V (V) BE AP, MS 12