Lecture 4 Slides Boolean Algebra Logic Functions Canonical Sums/Products
LOGIC FUNCTION REPRESENTATION
Logic Functions A logic function maps input combinations to an output value ( 1 or ) 3 possible representations of a function Equation Schematic Truth Table Can convert between representations Truth table is onl unique representation
Eample Convert the following description to a Boolean equation An automobile warning buer is activated if the headlights are on AND the door is open OR the ke is in the ignition and the door is open. B = HD + KD B = D(H+K) Mark Redekopp, All rights reserved Equation and circuit representations are not unique
Eample Convert the following description to a Boolean equation An automobile warning buer is activated if the headlights are on AND the door is open OR the ke is in the ignition and the door is open. B = HD + KD B = D(H+K) Mark Redekopp, All rights reserved Equation and circuit representations are not unique
Truth Tables to Equations/Circuits Given a circuit with n-inputs, 2 n possible combinations eist => 2 n rows in a T.T. A general approach to converting a T.T. to equation or circuit Build a checker/decoder circuit for each combination and include the combinations where the function should be 1
BOOLEAN ALGEBRA Mark Redekopp, All rights reserved
Boolean Algebra A set of theorems to help us manipulate logical epressions/equations Aioms = Basis / assumptions used Theorems = manipulations that we can use
Aioms Aioms are the basis for Boolean Algebra Notice that these aioms are simpl restating our definition of digital/binar logic A1/A1 = Binar variables (onl 2 values possible) A2/A2 = NOT operation A3,A4,A5 = AND operation A3,A4,A5 = OR operation (A1) X = if X 1 (A1 ) X = 1 if X (A2) If X =, then X = 1 (A2 ) If X = 1, then X = (A3) = (A3 ) 1 + 1 = 1 (A4) 1 1 = 1 (A4 ) + = (A5) 1 = 1 = (A5 ) + 1 = 1 + = 1
Dualit Ever truth statement can ields another truth statement I eercise if I have time and energ (original statement) I don t eercise if I don t have time or don t have energ (dual statement) To epress the dual, swap 1 s s +
Dualit The dual of an epression is not equal to the original 1 + 1 Original epression Taking the dual of both sides of an equation ields a new equation Dual X + 1 = 1 Original equation X = Dual
Single Variable Theorem (T1) X+ = X (T1) X 1 = X (T1 ) X Y Z 1 1 1 1 1 1 1 OR Hold Y constant X Y Z 1 1 1 1 1 AND Whenever a variable is OR ed with, the output will be the same as the variable OR Anthing equals that anthing Whenever a variable is AND ed with 1, the output will be the same as the variable 1 AND Anthing equals that anthing
Single Variable Theorem (T2) X+1 = 1 (T2) X = (T2 ) X Y Z 1 1 1 1 1 1 1 OR Hold Y constant X Y Z 1 1 1 1 1 AND Whenever a variable is OR ed with 1, the output will be 1 1 OR anthing equals 1 Whenever a variable is AND ed with, the output will be AND anthing equals
Single Variable Theorem (T3) X+X = X (T3) X X = X (T3 ) X Y Z 1 1 1 1 1 1 1 OR Whenever a variable is OR ed with itself, the result is just the value of the variable X Y Z 1 1 1 1 1 AND Whenever a variable is AND ed with itself, the result is just the value of the variable This theorem can be used to reduce two identical terms into one OR to replicate one term into two.
Single Variable Theorem (T4) (X ) = X (T4) (X) = X (T4) 1 Anthing inverted twice ields its original value
Single Variable Theorem (T5) X+X = 1 (T5) X X = (T5 ) X Y Z 1 1 1 1 1 1 1 OR Whenever a variable is OR ed with its complement, one value has to be 1 and thus the result is 1 X Y Z 1 1 1 1 1 AND Whenever a variable is AND ed with its complement, one value has to be and thus the result is This theorem can be used to simplif variables into a constant or to epand a constant into a variable.
ISEL ISEL1 ISEL2 ISEL3 OSEL OSEL1 OSEL2 OSEL3 Application: Channel Selector Given 4 input, digital music/sound channels and 4 output channels Given individual select inputs that select 1 input channel to be routed to 1 output channel 11111111 4 Input channels ICH OCH 11111111 111111111 ICH1 ICH2 Channel Selector OCH1 OCH2 4 Output channels 1111111 ICH3 OCH3 Input Channel Select Output Channel Select
OSEL OSEL1 OSEL2 Application: Steering Logic 4-input music channels (ICH) Select one input channel (use ISEL inputs) Route to one output channel (use OSEL inputs) 11111111 ICH 11111111 ICH 1 111111111 ICH 2 1111111 ICH 3 ISEL ISEL1 ISEL2 ISEL3 OSEL3 OCH OCH 1 OCH 2 OCH 3
OSEL OSEL1 OSEL2 OSEL3 Application: Steering Logic 1 st Level of AND gates act as barriers onl passing 1 channel OR gates combines 3 streams of s with the 1 channel that got passed (i.e. ICH1) 2 nd Level of AND gates passes the channel to onl the selected output ICH ICH 1 ICH 2 ICH 3 1 ICH1 Connection Point ICH1 ICH1 ICH1 ICH1 ICH1 1 OCH OCH 1 OCH 2 ICH1 OCH 3 AND: 1 AND ICH = ICH AND ICH = 1 ISEL ISEL1 ISEL2 ISEL3 OR: + ICH1 + + = ICH1 1 AND: 1 AND ICH1 = ICH1 AND ICH1 =
Your Turn Build a circuit that takes 3 inputs: S, IN, IN1 and outputs a single bit Y. It s functions should be: If S =, Y = IN (IN passes to Y) If S = 1, Y = IN1 (IN1 passes to Y) IN S Y IN1
DEFINITIONS Mark Redekopp, All rights reserved
Definitions of the Da X Z X Y Z X Y Z NOT (Inverter) AND OR Z X ' or X or ~X Z X Y Z X Y Literal: A literal is an instance of a single variable or its complement. Correct Eamples:,,, ALARM, (LON) Incorrect Eamples: +, (these are epressions) Product Term: A logical product (AND ing) of two or more literals or a single literal b itself Correct Eamples:, w, w a b, c Incorrect Eamples: (+) w, ( ) Onl evaluates to 1 for a single input combination Sum Term: A single literal or a logical sum (OR ing) of two or more literals. Correct Eamples: +w+, +, Incorrect Eamples: ab+c, ( + ) Onl evaluates to for a single input combination
Check Yourself Epression Sum Term / Product Term / Both / Neither w ( ) w ( ) w++ w+ (w++) w
Check Yourself Epression w ( ) w ( ) w++ w+ (w++) w Sum Term / Product Term / Both / Neither Neither (Can t have complements of sub-epressions onl literal) Product Term (AND is associative) Neither (Mied epression) Sum Term Neither (Can t have complements of sub-epressions) Both
CHECKERS Mark Redekopp, All rights reserved
Gates Gates can have more than 2 inputs but the functions sta the same AND = output = 1 if ALL inputs are 1 Outputs 1 for onl 1 input combination OR = output = 1 if ANY input is 1 Outputs for onl 1 input combination X Y Z F X Y Z F 1 1 1 F 1 1 1 F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3-input AND 3-input OR
Checkers / Decoders An AND gate onl outputs 1 for 1 combination That combination can be changed b adding inverters to the inputs We can think of the AND gate as checking or decoding a specific combination and outputting a 1 when it matches. X Y Z F X Y Z F 1 1 F 1 1 1 F 1 1 1 1 1 AND gate decoding (checking for) combination 11 1 1 1 1 1 1 1 AND gate decoding (checking for) combination 1 1 1 1 1 1 1
Checkers / Decoders An AND gate onl outputs 1 for 1 combination That combination can be changed b adding inverters to the inputs We can think of the AND gate as checking or decoding a specific combination and outputting a 1 when it matches. X Y Z F X Y Z F 1 1 1 F 1 1 1 F 1 1 1 1 1 AND gate decoding (checking for) combination 11 1 1 1 1 1 1 1 1 AND gate decoding (checking for) combination 1 1 1 1 1 1 1
Checkers / Decoders Place inverters at the input of the AND gates such that F produces 1 onl for input combination {,,} = {1} G produces 1 onl for input combination {,,} = {11} X Y Z F X Y Z G 1 1 F 1 1 1 1 G 1 1 1 1 1 AND gate decoding (checking for) combination 1 1 1 1 1 1 1 1 AND gate decoding (checking for) combination 11 1 1 1 1 1 1 1 1
Checkers / Decoders Place inverters at the input of the AND gates such that F produces 1 onl for input combination {,,} = {1} G produces 1 onl for input combination {,,} = {11} X Y Z F X Y Z G 1 1 F 1 1 1 1 G 1 1 1 1 1 AND gate decoding (checking for) combination 1 1 1 1 1 1 1 1 AND gate decoding (checking for) combination 11 1 1 1 1 1 1 1 1
Checkers / Decoders An OR gate onl outputs for 1 combination That combination can be changed b adding inverters to the inputs Add inverters to create an OR gate decoding (checking for) combination 1 F X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Add inverters to create an OR gate decoding (checking for) combination 11 F X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Checkers / Decoders An OR gate onl outputs for 1 combination That combination can be changed b adding inverters to the inputs We can think of the OR gate as checking or decoding a specific combination and outputting a when it matches. OR gate decoding (checking for) combination 1 F X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 OR gate decoding (checking for) combination 11 F X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Combining functions into others A LOGIC EXERCISE
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make G X Y Z F1 F2 G X Y Z F1 F2 G 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make G X Y Z F1 F2 G X Y Z F1 F2 G 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X Y Z F1 F2 F1 F2 F1*F2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 G = F1*F2
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make H X Y Z F1 F2 H X Y Z F1 F2 H 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make H X Y Z F1 F2 H X Y Z F1 F2 H 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X Y Z F1 F2 F1 F2 F1+F2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 H = F1 + F2
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make J X Y Z F1 F2 J X Y Z F1 F2 J 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Combining Functions Given intermediate functions F1 and F2, how could ou use AND, OR, NOT to make J X Y Z F1 F2 J X Y Z F1 F2 J 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 X Y Z F1 F2 F1 + F2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 J = F1 + F2
Combining Functions How I want to change J slightl to make K and I ll give ou an etra function F3 X Y Z F1 F2 K X Y Z F1 F2 J K 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 F3 1 X Y Z F1 F2 F3 F1 + F2 + F3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 K = F1 + F2 + F3
Question Is there a set of functions (F1, F2, etc.) that would allow ou to build ANY 3- variable function X Y Z F1 Fn?? Think simple, think man X Y Z F1 F2 Fn?? 1? 1? 1 1? 1? 1 1? 1 1? 1 1 1? X Y Z m m1 m2 m3 m4 m5 m6 m7? 1? 1 1? 1 1? 1 1 1? 1 1? 1 1 1? 1 1 1? 1 1 1 1? OR together an combination of m I s
Checkers / Decoders The m i functions on the previous slide are just AND gate checkers That combination can be changed b adding inverters to the inputs We can think of the AND gate as checking or decoding a specific combination and outputting a 1 when it matches. X Y Z F X Y Z F 1 1 1 m5 1 1 1 m 1 1 1 1 1 AND gate decoding (checking for) combination 11 1 1 1 1 1 1 1 1 AND gate decoding (checking for) combination 1 1 1 1 1 1 1
Minterm Definition Minterm: A product term where each input variable of a function appears as eactl one literal f(,,) => ++
Minterms A minterm can be generated for ever combination of inputs Each minterm is the AND ing of variables that will evaluate to 1 for onl that combination A minterm checks or decodes a specific input combination and outputs 1 when found Minterm 3 11 = = m 3 Minterm 5 11 = = m 5 To make the minterm, complement the variables that equal and leave the variables in their true form that equal 1. X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders/checkers X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 A X Y Z A 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 A X Y Z A B 1 1 1 1 1 1 1 B 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 A X Y Z A B C 1 1 1 1 1 1 1 B 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 A X Y Z A B C F 1 1 1 1 1 1 1 B F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 1 1 1 1 1 1 1 1 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 1 A X Y Z A B C F 1 1 1 1 1 1 1 1 B 1 F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 1 1 1 1 1 1 1 1 1 F(1,,) = 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 1 A 1 X Y Z A B C F 1 1 1 1 1 1 1 1 B F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 1 1 1 1 1 1 1 1 1 F(,1,) = 1
Using Decoders to Implement Functions Given an an logic function, it can be implemented with the superposition of decoders X Y Z F 1 1 1 A X Y Z A B C F 1 1 1 1 1 1 1 1 1 B F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 C 1 1 1 1 1 1 1 1 1 F(,1,1) =
Minterms Onl one minterm can evaluate to 1 at an time. m m 1 m 2 m 3 X Y F X Y X Y X Y X Y 1 1 1 1 1 1 1 1 1 1
Venn Diagram of Minterms Onl one region ON and all others OFF m m2 X=,Y= X Y X=1,Y= X Y m1 X=,Y=1 X Y m3 X=1,Y=1 X Y
Venn Diagram of Minterms To compose a function we can OR the minterms from the function s ON-Set X Y F 1 1 1 1 1 1 OR OR F= X=1,Y= X Y X=,Y=1 X Y = F = XY + X Y
Finding Equations/Circuits Given a function and checkers (called decoders) for each combination, we just need to OR together the checkers where F = 1 3-bit number {,,} Mark Redekopp, All rights reserved Checker for Checker for 1 Checker for 1 Checker for 11 Checker for 1 Checker for 11 Checker for 11 Checker for 111 Assume we use ANDgate decoders that output a 1 when the combination is found F X Y Z F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
BACKUP Mark Redekopp, All rights reserved
Unique Representations Arithmetic => f( 1, 2,, n ) Representations Graph Equation Logic => f( 1, 2,, n ) Representations Schematic No Boolean Equation No, unless ou convert to canonical sum (minterms) or canonical product (materms) form Truth Table Yes Binar Decision Diagram (BDD) Yes (if variables are ordered)
Boolean Algebra Terminolog Literal: A literal is an instance of a single variable or its complement. Correct Eamples:,,, ALARM, (LON) Incorrect Eamples: +, (these are epressions) Product Term: A single literal or a logical product (AND ing) of two or more literals. Correct Eamples:, w, w a b, c Incorrect Eamples: (+) w, ( ) Onl evaluates to 1 for a single input combination Sum Term: A single literal or a logical sum (OR ing) of two or more literals. Correct Eamples: +w+, +, Incorrect Eamples: ab+c, ( + ) Onl evaluates to for a single input combination SOP (Sum of Products) Form: An SOP epression is a logical sum (OR) of product terms. Correct Eamples: [ + w + a b c], [w + + ] Incorrect Eamples: [ +w (a+b) ], [ + ( ) ] POS (Product of Sums) Form: A POS epression is a logical product (AND) of sum terms. Correct Eamples: [(+ +) (w +) (a)], [ (+) (w +)] Incorrect Eamples: [( +) (+w)], [(+) (+) ]
Using Gates as Decoders (Checkers, Filters) White light Prism Polariing Filters White light X Y Z F X Y Z F 1 1 1 F 1 1 1 F 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 3-input AND 3-input OR
Making Colors An color can be made b re-combining certain wavelengths of visible light Polariing Filters White light Polariing Filters White light Polariing Filters White light