EE 330 Lecture 14 Devices in Semiconuctor Processes Dioes Capacitors MOSFETs
Reminer: Exam 1 Friay Feb 16 Stuents may bring one page of notes (front an back) but no electronic ata storage or remote access HW Assignment ue on We of next week at en of class perio (no late HW accepte) Review session: Thursay Feb 15 6:00 p.m. Rm 1016 Coover
Review from Last Lecture Basic Devices an Device Moels Resistor Dioe Capacitor MOSFET BJT
Review from Last Lecture Analysis of Nonlinear Circuits (Circuits with one or more nonlinear evices) What analysis tools or methos can be use? KCL? KVL? Superposition? Noal Analysis Mesh Analysis Two-Port Subcircuits Voltage Divier? Current Divier? Thevenin an Norton Equivalent Circuits?
Review from Last Lecture Dioe Moels I (amps) Dioe Characteristics 0.01 0.008 0.006 0.004 0.002 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 V (volts) I (amps) Dioe Characteristics 0.01 0.008 0.006 0.004 0.002 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 V (volts) Dioe Characteristics I D I (amps) 0.01 0.008 0.006 0.004 0.002 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 V (volts) V D Which moel shoul be use? The simplest moel that will give acceptable results in the analysis of a circuit
Review from Last Lecture Piecewise Linear Moels Dioe Moel Summary I = 0 if V < 0 V =0 if I > 0 I D V D Dioe Characteristics I = 0 if V < 0.6V V =0.6V if I > 0 I (amps) 0.01 0.008 0.006 0.004 0.002 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 V (volts) Dioe Equation I = 0 if V < 0.6 V =0.6+I R if I > 0 I (amps) Dioe Characteristics 0.01 0.008 0.006 0.004 0.002 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 V (volts) V Vt I = I e -1 S
Review from Last Lecture Piecewise Linear Moels I = 0 if V < 0 Dioe Moel Summary V =0 if I > 0 I = 0 if V < 0.6V V =0.6V if I > 0 I = 0 if V < 0.6 V =0.6+I R if I > 0 Dioe Equation V Vt I = IS e -1 When is the ieal moel aequate? When it oesn t make much ifference whether V =0V or V =0.6V When is the secon piecewise-linear moel aequate? When it oesn t make much ifference whether V =0.6V or V =0.7V
Valiate Moel Select Moel Example: Determine I OUT for the following circuit 10K I OUT 12V D 1 Solution: Strategy: 1. Assume PWL moel with V D =0.6V, R D =0 2. Guess state of ioe (ON) 3. Analyze circuit with moel 4. Valiate state of guess in step 2 (verify the if conition in moel) 5. Assume PWL with V D =0.7V 6. Guess state of ioe (ON) 7. Analyze circuit with moel 8. Valiate state of guess in step 6 (verify the if conition in moel) 9. Show ifference between results using these two moels is small 10. If ifference is not small, must use a ifferent moel
Solution: 1. Assume PWL moel with V D =0.6V, R D =0 2. Guess state of ioe (ON) 10K I OUT 12V 0.6V 3. Analyze circuit with moel 12V-0.6V I = 1. 14mA OUT 10K 4. Valiate state of guess in step 2 To valiate state, must show I D >0 I =I D OUT =1.14mA>0
Solution: 5. Assume PWL moel with V D =0.7V, R D =0 6. Guess state of ioe (ON) 10K I OUT 12V 0.7V 7. Analyze circuit with moel 12V-0.7V I = 1. 13mA OUT 10K 8. Valiate state of guess in step 6 To valiate state, must show I D >0 I =I D OUT =1.13mA>0
Solution: 9. Show ifference between results using these two moels is small I =1.14mA an I =1.13 ma are close OUT OUT Thus, can conclue IOUT 1.14mA
Example: Determine I OUT for the following circuit 10K 0.8V I OUT D 1 Solution: Strategy: 1. Assume PWL moel with V D =0.6V, R D =0 2. Guess state of ioe (ON) 3. Analyze circuit with moel 4. Valiate state of guess in step 2 5. Assume PWL with V D =0.7V 6. Guess state of ioe (ON) 7. Analyze circuit with moel 8. Valiate state of guess in step 6 9. Show ifference between results using these two moels is small 10. If ifference is not small, must use a ifferent moel
Solution: 1. Assume PWL moel with V D =0.6V, R D =0 2. Guess state of ioe (ON) 10K 0.8V I OUT 0.6V 3. Analyze circuit with moel 0.8-0.6V I = OUT 10K 20 A 4. Valiate state of guess in step 2 To valiate state, must show I D >0 I =I =20A>0 D OUT
Solution: 5. Assume PWL moel with V D =0.7V, R D =0 6. Guess state of ioe (ON) 10K 0.8V I OUT 0.7V 7. Analyze circuit with moel 0.8V-0.7V I = OUT 10K 10 A 8. Valiate state of guess in step 6 To valiate state, must show I D >0 I =I =10A>0 D OUT
Solution: 9. Show ifference between results using these two moels is small I =10A an I =20A are not close OUT OUT 10. If ifference is not small, must use a ifferent moel Thus must use ioe equation to moel the evice I I OUT OUT 0.8-V = 10K =I e S V V D t D 0.8V 10K V D I OUT 0.6V Solve simultaneously, assume V t =25mV, I S =1fA Solving these two equations by iteration, obtain V D = 0.6148V an I OUT =18.60μA
Use of Piecewise Moels for Nonlinear Devices when Analyzing Electronic Circuits Process: Observations: 1. Guess state of the evice 2. Analyze circuit 3. Verify State 4. Repeat steps 1 to 3 if verification fails 5. Verify moel (if necessary) o Analysis generally simplifie ramatically (particularly if piecewise moel is linear) o Approach applicable to wie variety of nonlinear evices o Close-form solutions give insight into performance of circuit o Usually much faster than solving the nonlinear circuit irectly o Wrong guesses in the state of the evice o not compromise solution (verification will fail) o Helps to guess right the first time o Moel is often not necessary with most nonlinear evices
Use of Piecewise Moels for Nonlinear Devices when Analyzing Electronic Circuits Process: 1. Guess state of the evice 2. Analyze circuit 3. Verify State 4. Repeat steps 1 to 3 if verification fails 5. Verify moel (if necessary) What about nonlinear circuits (using piecewise moels) with time-varying inputs? 1K V out 80Vsin500t D 1 1K Same process except state verification (step 3) may inclue a range where solution is vali
Example: Determine V OUT for V IN =80sin500t 1K 80Vsin500t V IN D 1 V out 1K Guess D 1 ON (will use ieal ioe moel) 1K V IN I D D 1 V out 1K V OUT =V IN =80sin(500t) Vali for I D >0 Thus vali for V IN > 0 I D VIN 1K
Example: Determine V OUT for V IN =80sin500t 1K 80Vsin500t V IN D 1 V out 1K Guess D 1 OFF (will use ieal ioe moel) 1K V IN V D D 1 V out 1K V OUT =V IN /2=40sin(500t) Vali for V D <0 V VD 2 Thus vali for V IN < 0 IN
Example: Determine V OUT for V IN =80sin500t 1K 80Vsin500t V IN D 1 V out 1K Thus overall solution V IN 80V V OUT 80sin 500t for VIN 0 40sin 500t forvin 0 t V OUT 80V t -40V
Use of Piecewise Moels for Nonlinear Devices when Analyzing Electronic Circuits Process: 1. Guess state of the evice 2. Analyze circuit 3. Verify State 4. Repeat steps 1 to 3 if verification fails 5. Verify moel (if necessary) What about circuits (using piecewise moels) with multiple nonlinear evices? 1K 20V V out 80V D 1 D 2 Guess state for each evice (multiple combinations possible) 4K
Example: Obtain V OUT 1K 20V V out 80V D 1 D 2 4K
Example: Obtain V OUT 1K 20V V out 80V D 1 D 2 Guess D 1 an D 2 on 4K 1K 20V V out 80V D I D1 1 I D2 D 2 I V OUT =-20V Vali for I D1 >0 an I D2 >0 D2 20V 5mA 0 4K 80V I D1 I D2 85mA 0 1K 4K Since valiates, solution is vali
Types of Dioes pn junction ioes I I I I I I V V V V V V Signal or Rectifier Pin or Photo Light Emitting LED Laser Dioe Metal-semiconuctor junction ioes Zener Varactor or Varicap V I V I V I Schottky Barrier
Basic Devices an Device Moels Resistor Dioe Capacitor MOSFET BJT
Capacitors Types Parallel Plate Fringe Junction
Parallel Plate Capacitors con 2 con 1 A 1 A 2 C insulator A = area of intersection of A 1 & A 2 One (top) plate intentionally C A size smaller to etermine C
Parallel Plate Capacitors If C Cap unit area where C C C ε A C ε A
Fringe Capacitors C C ε A A is the area where the two plates are parallel Only a single layer is neee to make fringe capacitors
Fringe Capacitors C
Junction Capacitor Capacitance C C 1 jo V φ p C A A D B n n for V FB φ 2 φ B 0.6V n ; 0.5 B C epletion region V D Note: is voltage epenent -capacitance is voltage epenent -usually parasitic caps -varicaps or varactor ioes exploit voltage ep. of C
Capacitance Junction Capacitor 1.6 1.4 1.2 C Cj0A 1 0.8 0.6 V D 0.4-4 -3-2 -1 0 1 0.2 0 V D C C 1 jo V φ A D B n for V FB φ B 0.6V n ; 0.5 φ 2 B Voltage epenence is substantial
Basic Devices an Device Moels Resistor Dioe Capacitor MOSFET BJT
n-channel MOSFET Poly n-active Gate oxie p-sub
n-channel MOSFET Source Gate L Drain W L EFF Bulk
n-channel MOSFET Poly Gate oxie n-active p-sub epletion region (electrically inuce)
n-channel MOSFET Operation an Moel V DS V GS I D V BS I B I G Apply small V GS (V DS an V BS assume to be small) Depletion region electrically inuce in channel Terme cutoff region of operation I D =0 I G =0 I B =0
n-channel MOSFET Operation an Moel V DS V GS I D V BS I B I G Increase V GS (V DS an V BS assume to be small) Depletion region in channel becomes larger I D =0 I G =0 I B =0
n-channel MOSFET Operation an Moel V DS V GS I D V BS I B I G I D =0 I G =0 I B =0 Moel in Cutoff Region
n-channel MOSFET Operation an Moel V DS Critical value of V GS that creates inversion layer terme threshol voltage, V T ) V BS I B V GS I G I D (V DS an V BS small) Increase V GS more Inversion layer forms in channel Inversion layer will support current flow from D to S Channel behaves as thin-film resistor I D R CH =V DS I G =0 I B =0
Trioe Region of Operation I D I G V DS R CH V DS V GS I B V BS = 0 For V DS small I I R D G CH L W W μcox L I 0 B 1 VGS VT COX V GS V T V DS Behaves as a resistor between rain an source Moel in Deep Trioe Region
Trioe Region of Operation I D I G R CH V GS I B V BS = 0 R CH For V DS small L W 1 VGS VT COX Resistor is controlle by the voltage V GS Terme a Voltage Controlle Resistor (VCR)
n-channel MOSFET Operation an Moel V DS V GS I D V BS I B I G (V DS an V BS small) Increase V GS more Inversion layer in channel thickens R CH will ecrease Terme ohmic or trioe region of operation I D R CH =V DS I G =0 I B =0
n-channel MOSFET Operation an Moel V DS V GS I D V BS I B I G (V BS small) Increase V DS Inversion layer thins near rain I D =? I I G =0 D no longer linearly epenent upon V DS Still terme ohmic or trioe region of operation I B =0
Trioe Region of Operation I D I G V DS V GS I B V BS = 0 R For V DS larger CH L W 1 VGS VT COX I I D G μc I B OX 0 W L V GS V T V 2 DS V DS Moel in Trioe Region
En of Lecture 14