INTEGRATED CIRCUITS -to-8 line decoder/demultiplexer; inverting 998 Apr 8
FEATURES Wide supply voltage range of. to. V In accordance with JEDEC standard no. 8-A Inputs accept voltages up to. V CMOS lower power consumption Direct interface with TTL levels Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs Output drive capability 0 transmission lines at 8 C DESCRIPTION The is a low-voltage, low-power, high-performance Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. The accepts three binary weighted address inputs (A 0, A, A ) and when enabled, provides 8 mutually exclusive active LOW outputs ( to Y ). The features three enable inputs: two active LOW (E and E ) and one active HIGH (E ). Every output will be HIGH unless E and E are LOW and E is HIGH. This multiple enable function allows easy parallel expansion of the LV8A to a -of- ( lines to lines) decoder with just four LV8A ICs and one inverter. The LV8A can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. QUICK REFERENCE DATA GND = 0 V; T amb = C; t r = t f. ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT t PHL /t PLH Propagation delay An to Yn, E to Yn, En to Yn C L = 0 pf; =. V.. C I Input capacitance.0 pf C PD Power dissipation capacitance per package NOTES:. C PD is used to determine the dynamic power dissipation (P D in µw) P D = C PD f i (C L f o ) where: f i = input frequency in MHz; C L = output load capacity in pf; f o = output frequency in MHz; = supply voltage in V; (C L f o ) = sum of the outputs.. The condition is V I = GND to =. V Notes and ns pf ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA PKG. DWG. # -Pin Plastic SO 0 C to +8 C D D SOT09- -Pin Plastic SSOP Type II 0 C to +8 C DB DB SOT8- -Pin Plastic TSSOP Type I 0 C to +8 C PW PW DH SOT0- PIN CONFIGURATION LOGIC DIAGRAM A 0 A A E A 0 A A Y Y Y E E Y GND 0 8 9 E E Y Y 0 E Y Y 9 SV00 SV00 998 Apr 8 8 9 908
PIN DESCRIPTION PIN NUMBER SYMBOL NAME AND FUNCTION,, A 0 to A Address inputs, E, E Enable inputs (active LOW) E Enable inputs (active HIGH),,,,, 0, 9, to Y Outputs 8 GND Ground (0 V) Positive supply voltage LOGIC SYMBOL (IEEE/IEC) DX 0 0 X/Y 0 FUNCTIONAL DIAGRAM A A A E E E -to-8 DECODER ENABLE EXITING Y Y Y Y Y 0 Y 9 Y SV00 & 0 & 0 9 EN 9 (a) (b) SV00 FUNCTION TABLE INPUTS OUTPUTS E E E A 0 A A Y Y Y Y Y Y Y H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L NOTES: H = HIGH voltage level L = LOW voltage level X = don t care 998 Apr 8
RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER CONDITIONS MIN MAX DC supply voltage (for max. speed performance).. DC supply voltage (for low-voltage applications).. UNIT V V I DC input voltage range 0. V DC output voltage range; output HIGH or LOW state 0 V I/O V DC input voltage range; output -State 0. T amb Operating free-air temperature range 0 +8 C t r, t f Input rise and fall times =. to.v =. to.v ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC ). Voltages are referenced to GND (ground = 0V). SYMBOL PARAMETER CONDITIONS RATING UNIT DC supply voltage 0. to +. V I IK DC input diode current V I 0 0 ma V I DC input voltage Note 0. to +. V I OK DC output diode current V O or V O 0 0 ma DC output voltage; output HIGH or LOW Note 0. to +0. V I/O DC input voltage; output -State Note 0. to. I O DC output source or sink current V O = 0 to 0 ma I GND, I CC DC or GND current 00 ma T stg Storage temperature range to +0 C Power dissipation per package P TOT plastic mini-pack (SO) above +0 C derate linearly with 8 mw/k 00 mw plastic shrink mini-pack (SSOP and TSSOP) above +0 C derate linearly with. mw/k 00 NOTES:. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 0 0 0 0 ns/v V 998 Apr 8
DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0V). LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -0 C to +8 C UNIT MIN TYP MAX V IH V IL HIGH level input voltage LOW level input voltage =.V =. to.v.0 V =.V GND =. to.v 0.8 V =.V; V I = V IH or V IL ; I O = ma 0. V OH HIGH level output voltage =.0V; V I = V IH or V IL ; I O = 00µA 0. V =.0V; V I = V IH or V IL; I O = ma 0. =.0V; V I = V IH or V IL; I O = ma.0 =.V; V I = V IH or V IL ; I O = ma 0.0 V OL LOW level output voltage =.0V; V I = V IH or V IL ; I O = 00µA GND 0.0 V =.0V; V I = V IH or V IL; I O = ma 0. I I Input leakage current =V;.V; V I =.V V or GND 0. µa I CC Quiescent supply current =.V; V I = or GND; I O = 0 0. 0 µa I CC Additional quiescent supply current per input pin NOTE:. All typical values are at =.V and T amb = C. AC CHARACTERISTICS GND = 0 V; t r = t f. ns; C L = 0 pf; R L = 00 ; T amb = 0 C to +8 C =.V to.v; V I = 0.V; I O = 0 00 µa LIMITS SYMBOL PARAMETER WAVEFORM =.V ±0.V =.V UNIT MIN TYP MAX MIN MAX t PHL /t PLH Propagation delay A n to Y n Figure,...8..8 ns t PHL /t PLH Propagation delay E to Y n Figure,...8..8 ns t PHL /t PLH Propagation delay E n to Y n Figure,...8..8 ns NOTE:. These typical values are at =.V and T amb = C. 998 Apr 8
AC WAVEFORMS V M =. V at. V V M = 0. at <. V V OL and V OH are the typical output voltage drop that occur with the output load. TEST CIRCUIT S * Open GND A n, E INPUT GND V M PULSE GENERATOR V I R T D.U.T. V O C L 0pF 00Ω 00Ω t PHL t PLH V OH Y n OUTPUT V M V OL SV00 Figure. Input (na) to output (ny) propagation delays. SWITCH POSITION TEST S t PLH/ t PHL Open V I <.V..V.V Figure. SV0090 Load circuitry for switching times. E, E INPUT V M GND t PHL t PLH V OH Y n OUTPUT V M V OL Figure. -State enable and disable times. SV008 998 Apr 8
SO: plastic small outline package; leads; body width.9 mm SOT09-998 Apr 8
SSOP: plastic shrink small outline package; leads; body width. mm SOT8-998 Apr 8 8
TSSOP: plastic thin shrink small outline package; leads; body width. mm SOT0-998 Apr 8 9
Data sheet status Data sheet status Product status Definition [] Objective specification Preliminary specification Product specification Development Qualification Production This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. [] Please consult the most recently issued datasheet before initiating or completing a design. Definitions Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC ). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 8 East Arques Avenue P.O. Box 09 Sunnyvale, California 9088 09 Telephone 800--8 Copyright Philips Electronics North America Corporation 998 All rights reserved. Printed in U.S.A. print code Date of release: 0-98 Document order number: 99-0-09 yyyy mmm dd 0