Graphene and new 2D materials: Opportunities for High Frequencies applications

Graphene and new 2D materials: Opportunities for High Frequencies applications April 21th, 2015 H. Happy, E. Pallecchi, B. Plaçais, D. Jiménez, R. Sordan, D. Neumaier Graphene Flagship WP4 HF electronic Henri.happy@iemn.univ-lille1.fr

Outline Graphene FET: State of the art GFET optimization Gate contact Current saturation exploring velocity saturation Ballistic devices Graphene flagship WP4 High frequency electronic: Some achievements Summary and outlook Henri.happy@iemn.univ-lille1.fr 2

3 Progress in fabrication process GFET on SiC substrate Devices on Substrate Optical Microscope Image Full Device SEM Image FIB cross section of the active part of device

Study of parametric variation of performances 8 7 30 25 20 15 Devices (Number) 6 5 4 3 2 1 Gains (db) 10 5 0 ft_intr ft_dut fmax 0 14 21 28 34 41 48 / (GHz) -5-10 -15 1 10 100 frequency (GHz) M.S. Khenissa et al.; EuMIC 2014 Roma Italy, doi: 10.1109/EuMIC.2014.6997796 (IEMN) Devices (Number) 8 7 6 5 4 3 2 1 0 9 12 15 18 21 24 27 f max (GHz) 4

GFET State of the art 5 Figures of merit: f t, f max f t,: Current gain cut-off frequency f max Maximum oscillation frequency (over this frequency, there is no power gain) F. Schwierz, Proceedings of the IEEE, vol. 101, no 7, 2013

How these figures of merit (FOM) are defined? Conventional GFET structure RF probes for measurements Top view of dual-gated graphene FET Device under test (DUT) How to extract performances of GFET? (De-embedding procedure) 6

Extraction of extrinsic/intrinsic performance 7 50 G R g V GS R GD R GS C GS C GD g m V GS 1 / g d R d C DS D Gains (db) 40 30 H 21 H 21 20 10 f max f t 0-10 f t _Probes_plan -20 Frequency (GHz) 0.1 1 10 100 R s S f t = 30 GHz f max = 20 GHz F t_probes = 12.5 GHz Pads structures are capacitive f max remains constant with capacitive transform

How to define figures of merit (FOM) 8 Small signal equivalent circuit of GFET without access lines c dsp c gdp Source c R g gsp c gdp Gate C gs C gd R s R gs g m V GS R gd Drain R d G c gsp R g V GS R GD R GS C GS C GD g m V GS 1/g d R d C DS D c dsp R s C ds 1 / g d S F t < F t < F t = F c = G m /(2 πc gs ) 17 < 30 < 80 (GHz) F max = F max < F max_intr 23 = 23 < 55 GHz

Some drawbacks of GFET o Contact and access resistance o No pinch-off o Lack of current saturation Compare to the typical HEMT devices A v g g m d Low Voltage gain High value of access resistance Main objective: F max # 100 GHz 9

Outline Graphene FET for High Frequency (HF): State of the art GFET optimization Gate contact Current saturation exploring velocity saturation Ballistic devices Graphene flagship WP4 High frequency electronic: Some achievements Summary and outlook Henri.happy@iemn.univ-lille1.fr 10

Metal-Graphene Contact Resistance - Modeling Device Components for contact resistance Electrostatics Specific contact resistivity (3Dà 2D) Lateral resistance 11

Metal-Graphene Contact Resistance Graphene etched below pure Au contacts R c < 90 Ωµm 1400 1200 1000 Au (100 nm) 500 nm R (Ω) 800 600 400 200 R at V 0 (Dirac point) R c W = 86 Ω µm R c W = 87 Ω µm 0 0 200 400 600 800 1000 1200 1400 L (µm) R. Sordan (WP4 Flagship) 12

Velocity saturation - Requirements Low contact resistance High mobilty graphene layer and low doping (phonon saturation) 50 Ωµm < R c < 150 Ωµm Ft extr = 20 GHz Fmax = 13 GHz (Wg = 2x50 µm, Lg = 1 µm). O. Habibpour et al.; EuMW 2014 Roma Italy (WP4 Flagship) 13

Velocity saturation impact of 2D materials 14 G-FET GoBN Y. Wu et al. / Nano Letters 12 (2012) 3062 L=0.6 µm I Meric et al. / IEDM (2011) I Meric et al. IEEE, Vol. 101, No. 7, (2013) " $%& ~34 ()*

Towards tunable contact and ballistic GFET 15 Artist view of device SEM picture (L=200 nm) Drain Drain contact gate 16 nm hbn Source SEM Source Channel gate Gated Pd-contacts, 20 nm thick W-gates Contact - - - - - - - + + + + + + Contacted graphene contact junctions Free graphene h-bn(20nm) Contacted graphene Contact gate (2) Contact gate (2) Channel gate (1) Contact gate (2) V g2 SiO 2 Si++ Contact - - - - - - - + + + + + + Q. Wilmart et al. (unpublished) WP4 Flagship

Towards tunable contact and ballistic GFET 16 V cont Drain G2 S D V ds Drain G1 ~ V ch SEM Sourc e 100µm Sourc e Differential resistance Pulsed contact gating RF-gain switching Q. Wilmart thesis High impact of BN good dielectric compared to Al 2 O 3

Towards tunable contact and ballistic GFET 17 L=500nm, W=1.5 µm Velocity saturation! Vg=-3...0V Vg=0...3V

Outline Graphene FET for High Frequency (HF): State of the art GFET optimization Gate contact Current saturation exploring velocity saturation Ballistic devices Graphene flagship WP4 High frequency electronic: Some achievements Summary and outlook Henri.happy@iemn.univ-lille1.fr 18

From devices to circuits 19 Graphene-based Inverters A v = - 11.3 High voltage gain Av = 11,3 with L = 2 µm

From devices to circuits Ring oscillator 20 V DD V DD V DD 1 2 3 4 L = 0.8 µm and W = 5 µm The highest oscillation frequency was f o = 4.3 GHz at the gate length L = 0.9 µm E. Guerriero et al., ACS Nano 7, 5588 (2013) WP4 Flagship

Summary and outlook 21 Progress in graphene processing is made H-BN show a great impact on the GFET performances Looking for large scale material Expertise already transfer also to WP8 (Flexible electronics) Recent results using CVD Graphene from Graphenea C. Sire et al, Nano Le0. 12, 1184 (2012) (CEA IEMN - Northwestern U.) f max = 7 GHz and f t = 20 GHz on flex substrate

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WP4 HF electronics 24 Nanostructuration of GFET channel (graphene nanoribbonds) SEM image of nanoribbons and nanomesh obtained by e-beam lithography Nanoribbonds width: from 10 nm to 50 nm

Nanostructuration of GFET channel GFET on SiC with Hydrogen intercalation Mobility: 2300 cm 2 /V.s 60 @ Vds = 300 mv U_ext, U_intr, H21_DUT, H21_ext, H21_intr (db) 50 40 30 20 10 0 F t_probes = 17 GHz -10 0.01 0.1 Frequency 1 (GHz) 10 100 Lg = 100 nm f max = 30 GHz f t = 50 GHz WP4 Flagship (IEMN) f max = 70 GHz f t = 140 GHz (Without access resistance) 25

De-embedding structures Measurement plan Metal Oxide Graphene FET [Y measured ] Pad Extrinsic performance [Y extr ] = [Y measured ] - [Y pad ] open structure «Intrinsic» performance [Y intr ] = [Y measured ] - [Y open ] Only parasitic capacitances are removed 26