Chapter 2 CMOS Transistor Theory. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

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Chapter 2 CMOS Transistor Theory Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Outline Introduction MOS Device Design Equation Pass Transistor Jin-Fu Li, EE, NCU 2

MOS Transistor MOS transistors conduct electrical current by using an applied voltage to move charge from the source side to the drain side of the device An MOS transistor is a majority-carrier device In an n-type MOS transistor, the majority carriers are electrons In a p-type MOS transistor, the majority carriers are holes Threshold voltage It is defined as the voltage at which an MOS device begins to conduct ( turn on ) Jin-Fu Li, EE, NCU 3

MOS Transistor So far, we have treated transistors as ideal switches An ON transistor passes a finite amount of current Depen on terminal voltages Derive current-voltage (I-V) relationships Transistor gate, source, drain all have capacitance I = C ( V/ t) -> t = (C/I) V Capacitance and current determine speed Jin-Fu Li, EE, NCU 4

Transistor Characteristics NMOS enhancement NMOS depletion I I Vtn V -Vtn V Jin-Fu Li, EE, NCU 5

Transistor Characteristics PMOS enhancement PMOS depletion V -V tp V tp V I I Jin-Fu Li, EE, NCU 6

Enhancement NMOS Transistor The structure for an n-channel enhancementtype transistor Source Gate Vdd Gate oxide n + channel n + Electron E Drain +V P-Substrate Substrate (usually Vss) Jin-Fu Li, EE, NCU 7

NMOS: V and Channel Accumulation mode Depletion mode Inversion mode V < V t Gate V = V t Gate V > V t Gate Depletion region Substrate Substrate Substrate In an inversion layer substrate junction, the n-type layer is induced by the electric field E applied to gate Thus this junction is a field-induced junction Jin-Fu Li, EE, NCU 8

NMOS: V and Channel V >V t ; V =0 The n-type inversion layer (channel) is formed V =0, no current flow in the channel GND V=0V n + n + n-type channel GND Depletion layer Jin-Fu Li, EE, NCU 9

NMOS: V and Channel V <V -V t The effective gate voltage (V -V t ) is greater than the drain voltage The channel becomes deeper as V is increased This is termed the linear, resistive, nonsaturated, or unstaturated region The channel current I is a function of both gate and drain voltages GND V n + n + n-type channel Depletion layer GND Jin-Fu Li, EE, NCU 10

NMOS: V and Channel V >V -V t V gd <V t, the channel becomes pinched off (the channel no longer reaches the drain) Conduction is brought by a drift mechanism of electrons under the influence of the positive drain voltage The voltage across the pinched-off channel ten to remain fixed (at V -V t ) This is termed saturated state (the channel current is almost independent of the drain voltage) V GND V -V t V n + n + Pinched off GND Jin-Fu Li, EE, NCU 11

Enhancement PMOS Transistor The structure for a p-channel enhancementtype transistor Gate Vss Source Gate oxide p + channel p + Electron E Drain -V n-substrate Substrate (usually Vdd) Jin-Fu Li, EE, NCU 12

I-V Characteristics In Linear region, I depen on How much charge is in the channel? How fast is the charge moving? Jin-Fu Li, EE, NCU 13

Channel Charge MOS structure looks like parallel plate capacitor while operating in inversion Gate oxide channel Q channel =CV C=C g =ε ox WL/t ox =C ox WL, where C ox =ε ox / t ox V=V gc V t = (V V /2) V t gate t ox L n+ n+ p-type body polysilicon gate W SiO2 gate oxide (good insulator, ε ox = 3.9) V g + + source V C g V gd drain - - channel n+ - + n+ V s V p-type body V d Jin-Fu Li, EE, NCU 14

Carrier Velocity Charge is carried by e- Carrier velocity v proportional to lateral E-field between source and drain v = µe, where µ is called mobility E = V /L Time for carrier to cross channel: t = L / v Jin-Fu Li, EE, NCU 15

NMOS Linear I-V Now we know How much charge Q channel is in the channel How much time t each carrier takes to cross I Qchannel = t W V = µ C V V V L V = β V V t V 2 ox t 2 W β = µcox L Jin-Fu Li, EE, NCU 16

NMOS Saturation I-V If V gd < V t, channel pinches off near drain When V > V at = V V t Now drain voltage no longer increases current V I at = β V V t V 2 at β = 2 ( V ) 2 Vt Jin-Fu Li, EE, NCU 17

NMOS I-V Summary 0 V < V V I = β V V V V V 2 < β ( V V ) 2 V > V 2 t at t at t cutoff linear saturation Jin-Fu Li, EE, NCU 18

Example Assume that the parameters of a technology are as follows t ox = 100 Å µ = 350 cm 2 /V*s V t = 0.7 V 2.5 2 1.5 V = 5 V = 4 Plot I vs. V V = 0, 1, 2, 3, 4, 5 Use W/L = 4/2 λ I (ma) 1 0.5 V = 3 V = 2 V = 1 0 0 1 2 3 4 5 V 14 W 3.9 8.85 10 W W β = µ Cox = ( 350) 120 µ A/ V 8 = L 100 10 L L 2 Jin-Fu Li, EE, NCU 19

Current-Voltage Relations of MOS When V = V V, the nmos is operated in Saturation region and we obtain I 1 W = µ 2 L C ox t ( V V t 2 ) Channel length modulation phenomenon: ' L = L L The corrected saturation current becomes I = W 2 1 W µ C ox ( V Vt ) = µ ' 2 L 2 L 1 C ox ( V Vt ) 2 L Assume that << 1, then we can rewrite the current as L I = 1 L 1 L 1 W 2 L 1 W µ C ( ) (1 ) ( ) 2 ox V Vt + = µ C ox V Vt (1 + λv 2 L L 2 L ) Jin-Fu Li, EE, NCU 20

Current-Voltage Relations of MOS Cutoff region V < = 0 I V t I V =V -V t Linear Saturation V 6 V 5 V 4 V 3 V 2 Linear region V I V t W = µ L > V C ox > 0 [( V V t ) V 1 2 V 2 ] V 1 V Saturation region V I V t < V < 0 1 W = µ C 2 L ox ( V V t ) 2 Jin-Fu Li, EE, NCU 21

Second Order Effect-Body Effect Body effect V t is a function of voltage between source and substrate 0.9 0.85 0.8 0.75 0.7 V T (V) 0.65 0.6 0.55 0.5 0.45 0.4-2.5-2 -1.5-1 -0.5 0 V BS (V) Low Degree High Jin-Fu Li, EE, NCU 22

Second Order Effect-Channel Modulation Channel modulation I Channel length is a function of V. When V is increased, the depletion region of the pinch off at drain shorten the channel length = 1 W 2 L 1 W µ C ( ) (1 ) ( ) 2 ox V Vt + = µ C ox V Vt (1 + λv 2 L L 2 L ) Gnd V V n + n + L L Jin-Fu Li, EE, NCU 23

Second Order Effect-Mobility Variation Mobility µ It describes the ease with which carriers drift in the substrate material It is defined by µ =(average carrier drift velocity, V)/(electrical field, E) Mobility varies according to the type of charge carrier Electrons have a higher mobility than holes Thus NMOS has higher current-producing capability than the corresponding PMOS Mobility decreases with increasing dopingconcentration and increasing temperature Jin-Fu Li, EE, NCU 24

Second Order Effects Drain punchthrough When the drain voltage is high enough, the depletion region around the drain may extend to source. Thus, causing current to flow irrespective of the gate voltage Hot electrons When the source-drain electric field is too large, the electron speed will be high enough to break the electron-hole pair. Moreover, the electrons will penetrate the gate oxide, causing a gate current Jin-Fu Li, EE, NCU 25

Second Order Effects Subthreshold region The cutoff region is also referred to as the subthreshold region, where I increases exponentially with V and V I V Jin-Fu Li, EE, NCU 26

MOS Small Signal Model (V sb =0) Gate C gd Drain g C db C +C gb g m V Source Linear region I g g m = ( V = const.) = µ dv Saturation region W 1 2 = µ C 1 W ox [( V V t ) V V ] I = µ C ox ( V V L 2 2 L di W = = µ C ox [( V Vt ) V ] g dv L = 0 di W W C oxv g ( ) m = µ C ox V Vt L L t ) 2 Jin-Fu Li, EE, NCU 27

Pass Transistor NMOS pass transistor C load is initially discharged, i.e., V out =V ss If V in =V dd and V S =V dd, the V out =V dd -V tn If V in =V ss and V S =V dd, the V out =V ss V in V out S C load PMOS pass transistor If V in =V dd and V -S =V ss, the V out =V dd If V in =V ss and V -S =V ss, the V out =V tp V in V out -S C load Jin-Fu Li, EE, NCU 28

Pass Transistor Circuits V DD V DD V DD V DD V DD V DD Vs = V DD -V tn VDD -Vtn VDD-Vtn V DD -V tn V s = V tp V DD V DD -V tn V SS V DD V DD -2V tn Jin-Fu Li, EE, NCU 29

Transmission Gate By combining behavior of the NMOS and PMOS, we can construct a transmission gate The transmission gate can transmit both logic one and logic zero without degradation -S V in V out S C load The transmission gate is a fundamental and ubiquitous component in MOS logic A multiplexer element A logic structure, A latch element, etc. Jin-Fu Li, EE, NCU 30