Lecture 18 Logistics HW7 is due on Monday (and topic included in midterm 2) Midterm 2 on Wednesday in lecture slot cover materials up to today s lecture Review session Tuesday 4:15pm in EEB125 Last lecture Finish counter design More complex finite-state machines Today More and machines 1 Generalized FSM model: and Combinational logic computes next state and ext state is a function of current state and inputs Outputs are functions of Current state ( machine) Current state and inputs ( machine) Inputs output logic ext-state logic ext State Outputs Current State 2
versus machines inputs combinational next state state feedback reg machine Outputs are a function of current state t Outputs change synchronously with state changes inputs combinational next state state feedback reg machine Outputs depend on state and on inputs Input changes can cause immediate output changes (asynchronous) 3 Example 1 -> 1: or? Circuits recognize AB=1 followed by AB=1 What kinds of machines are they? out A B clock A B clock out 4
Example 1/1 detector: a machine Output is a function of state only Specify output in the state bubble B/ 1 /1 reset A/ 1 1 1 C/ E/1 1 current next current reset input state state output 1 A A B 1 A C B B 1 B C E 1 C C E 1 1 C 1 E B 1 1 E 1 5 Example 1/1 detector: a machine Output is a function of state and inputs Specify on transition arcs reset/ / B / A /1 1/1 1/ C 1/ current next current reset input state state output 1 A A B 1 A C B B 1 B C 1 C B 1 1 C C 6
Comparing and machines machines + Safer to use because change at clock edge May take additional logic to decode state into machines + Typically have fewer states + React faster to inputs don't wait for clock Asynchronous can be dangerous We often design synchronous machines esign a machine Then register the 7 Synchronous (registered) machine Registered state and registered o glitches on o race conditions between communicating machines inputs reg combinational next state reg state feedback 8
Example -> 1: or? Recognize A,B =,1 or? A B clock out Registered (actually ) A out B clock 9 9 FSM design procedure reminder Counter-design procedure 1. State diagram 2. State-transition table 3. ext-state logic minimization 4. Implement the design FSM-design procedure 1. State diagram 2. state-transition table 3. State minimization 4. State encoding 5. ext-state logic minimization 6. Implement the design 1
Example: A parity checker Serial input string OUT=1 if odd # of 1s in input OUT= if even # of 1s in input Let s do this for and CSE37, Lecture 19, 2 18 11 Example: A parity checker 1. State diagram ay Even [] 1 1 Odd [1] / Even [] 1/11 11/ Odd [1] /1 12
Example: A parity checker 1. State-transition table Present Input ext Present State State Output Even Even Even 1 Odd Odd Odd 1 Odd 1 Even 1 Present Input ext Present State State Output Even Even Even 1 Odd 1 Odd Odd 1 Odd 1 Even 13 Example: A parity checker 3. State minimization: Already minimized eed both states (even and odd) Use one flip-flopflop CSE37, Lecture 19, 2 18 14
Example: A parity checker 4. State encoding Assignment Even Odd 1 Present Input ext Present State State Output 1 1 1 1 1 1 1 1 Present Input ext Present State State Output 1 1 1 1 1 15 Example: A parity checker 5. ext-state logic minimization Assume flip-flops ext state = (present state) XOR (present input) 6. Implement the design Output Input Output Input Current State CLK CLK 16
Example: A vending machine 15 cents for a cup of coffee oesn t take pennies or quarters Reset oesn t provide any change Last lecture Coin Sensor Vending Machine FSM Open Release Mechanism We had mix of and Clock 17 A vending machine: machine 5 Reset 1 + present inputs next output state state open 1 5 1 1 5 5 1 1 1 15 1 1 1 15 1 15 15 15 1 15 [open] symbolic state table 18
A vending machine: machine /1 Reset / / 5 / 1 + /1 15 present inputs next output state state open 1 5 1 1 5 5 1 1 1 15 1 1 1 1 15 1 1 15 1 15 15 1 symbolic state table 19 A vending machine: State encoding present state inputs next state output 1 1 open 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 present state inputs next state output 1 1 open 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2
A vending machine: Logic minimization 1 1 1 1 1 X X X X 1 1 1 1 1 1 1 X X X X 1 1 1 1 1 1 1 1 1 1 X X X X 1 1 1 1 1 1 X X X X Open Open 1 1 1 X X 1 X 1 1 1 1 1 X X 1 X 21 A vending machine: Implementation CSE37, Lecture 19, 2 18 22