Mathematics and Computers in Simulation 63 (2003) 281 295 Advanced control methods for power electronics systems J. Fernando A. da Silva a,,1, V. Fernão Pires b,1, Sónia Ferreira Pinto a,1, J. Dionísio Barros c,1 a Department of Electrical and Computer Engineering, IST, Technical University of isbon (UT), isbon, Portugal b Escola Superior Tecnologia de Setúbal, Instituo Politécnico de Setúbal, isbon, Portugal c Systems and Computers Department, Universidate da Madeira, isbon, Portugal Abstract The application of modeling methods suitable for control and simulation of power electronic systems is outlined as a self-contained approach to solve the simulation and control problems of novel structures of power electronics converters. The straightforward non-linear modeling for controller design and simulation uses switched state space models avoiding the averaging task, needs few linear control concepts, derives the stability study from geometric properties and leads to an integrated design of the control, modulators and simulation tasks. On-line sliding mode control techniques are well suited to power converters as they are inherently variable structure systems. Obtained controllers are robust concerning converter parameter variations, semiconductor non-ideal characteristics, load and line disturbances. Main modeling and design steps are summarized and some examples given. Results show fast dynamics, no steady-state errors and robustness against semiconductor non-idealities and dead times. 2003 IMACS. Published by Elsevier B.V. All rights reserved. Keywords: Converter control; DC/AC converters; Modeling; Simulation; Sliding mode control; Robust control; Multilevel converters; High power factor rectifiers 1. Introduction Computer simulation plays an important role in the design, analysis, and evaluation of novel power electronic converters and their controllers. Designing and developing new power electronics systems is time-consuming and expensive without suitable computer simulations and control methods. Existing software packages enable power converter simulation, but provide little help for controller synthesis. Therefore, it is essential to develop system level modeling approaches for power electronics systems, Corresponding author. E-mail addresses: fernandos@alfa.ist.utl.pt (J.F.A. da Silva), vpires@est.ips.pt (V. Fernão Pires), pcsoniafp@alfa.ist.ult.pt (S.F. Pinto), dbarros@uma.pt (J.D. Barros). 1 Researcher at Center of Automatics of UT (CAUT). 0378-4754/$30.00 2003 IMACS. Published by Elsevier B.V. All rights reserved. doi:10.1016/s0378-4754(03)00076-4
282 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 using a theoretical framework suited for controller design and development, but also capable for the numerical simulation of the electronic power converter dynamic behavior. Electronic power converters are non-linear, discrete and variable structure systems. Instead of averaged circuit models, valid only around an operating point, a systematic approach able to deal with the converter variable structure and non-linearity, should be used. Variable structure control (sliding mode) [1,2] is the technique of choice, since It uses discontinuous control actions, being appropriate to the ON OFF behavior of power switches; It ensures the converter stability; It can provide near zero steady-state error and zero overshoots; It provides the theoretical frame to synthesize the control law (regulator) and switching law (modulator), integrating the design of regulator and modulator electronics; It can provide insensitivity to non-linearity and robustness behavior concerning parameter variation and disturbances (invariance); It provides just-in-time switching, but can switch structures at constant frequency; It can reduce the system order, and show better tracking performances and faster dynamics than linear controllers. This paper presents the main steps to obtain models suitable for converter control and simulation and the design steps of sliding mode control, applied to power electronic systems. It will be shown that sliding mode provides a systematic approach to the control problem of power electronics systems, being the framework to gently obtain an integrated design of the controller and modulator. 2. Modeling and simulation steps To obtain switched state space non-linear models suited for simulation and control design, the electrical and semiconductor devices must be considered ideal components (zero parasitic elements, zero ON voltages, zero OFF currents, zero switching times). Then, binary variables can be used to determine the state of the switches. After, the knowledge of the power electronic system operation and Kirchhoff s laws can be used, in the following steps, to derive non-linear equations that describe the converter dynamic behavior. Determine the state variables of the power circuit; Assign discrete variables to the ON and OFF states of each switching cell (considering topological restrictions) and determine the conditions governing the states of the power semiconductors of each switching cell (consider both continuous and discontinuous operation); Apply Kirchhoff s laws and combine all the required stages into a switched state space model, which is the desired system level model; Write this model in the integral form, or rewrite the differential form to include the semiconductors discrete variables in the control vector; Translate the obtained model in SIMUINK blocks (or suitable software) and define the power semiconductor switching signals to perform open-loop simulations; Use the obtained switched space-state model to design sliding mode controllers for the power converter; Perform closed-loop simulations and evaluate converter performance.
3. Control design steps J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 283 3.1. Switched state space model and canonical form Consider the converter input output switched state space model ẋ = Ax + Bu, where x = [x i,...,x m 1,x m ] T is the state vector, ẋ = dx/, u the input or control vector, and A, B, respectively, the dynamics and the input matrices. From this model obtain one set of input output de-coupled or companion Eq. (1), for each controllable output x i. d [x i,...,x m 1,x m ] T = [x i+1,...,x m, f i (x) p i (t) + b i (x)u i (t)] T (1) The sub-system output is y 1 = x i, with f i (x), and b i (x) functions of x. The external disturbances are p i (t). The independent control input is u i (t). 3.2. Closed-loop control canonical form Consider now f i (e), p ei (t) and b ei (e) functions of the error vector e = [e xi,e xi+1,...,e xm ] T, between the variable x o (o {i,...,m 1,m}) and its reference value x or : e xo = x or x o (2) Using (2) in (1), sets of Eq. (3) are obtained: d [e x i,...,e xm 1,e xm ] T = [e xi+1,...,e xm, f i (e) + p ei (t) b ei (e)u i (t)] T (3) 3.3. Control law (sliding surface) Within sliding mode control theory [3,4], a suitable sliding surface to reduce the system order and to guarantee the dynamics de xm / = m 1 o=i k oe xo+1,is S(e,t)= m k o e xo = 0 (4) o=i To ensure stability, since e xo+1 (s) = se xo (s), the sliding surface S(e, t) must be a Routh Hurwitz polynomial. The binomial (or Bessel) approximations can be used, were ω o is the cut-off frequency of the system: S(e,s)= e xi (s + ω o ) m i 1 (5) This sliding mode surface provides the control law or the power converter controller and adds robustness (since the dynamics is independent of system parameters, disturbances or operating conditions). It guarantees the required reaching mode (as the dynamics depends only on the imposed values for the parameters k o ) and reduces the system order.
284 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 3.4. Stability 3.4.1. Sliding mode existence condition Sliding mode exists if S(e,t) = 0. Also, to stay in sliding mode, the controller should guarantee Ṡ(e,t)= 0. Therefore, the sliding mode invariance condition is S(e,t)Ṡ(e,t)<0 (6) 3.4.2. Reaching condition (reaching mode) If S(e,t)>0, from the Routh Hurwitz property of (4), then e xm > 0. Since, from (3): d e x m = f i (e) + p ei (t) b ei (e)u i (t) (7) To reach S(e,t) = 0, it is necessary to impose b ei (e)u i (t) = Uin (7), with U high enough to guarantee de xm / < 0, regardless of the disturbances. After some time, the dynamics will impose Ṡ(e,t) < 0, thus verifying (6). This same reasoning can be made for S(e,t) < 0, being now necessary to impose b ei (e)u i (t) =+U, with U high enough to guarantee de xm / >0. Therefore, calculating the maximum value of U, U eqmax, needed to ensure de xm / <0, the reaching mode condition must satisfy: U>U eqmax (8) 3.5. Two level switching law From the above considerations if S(e,t)>0, then Ṡ(e,t)<0. This implies, as seen, b ei (e)u i (t) = U (the sign of b e (e) must be known), with U>U eqmax imposing de xm / <0. Therefore, if S(e,t) < 0, then u i (t) =+U/( b ei (e)) in a two level converter. Switching between two structures then takes place at infinite frequency. As power semiconductors can switch only at finite frequency, a small enough error for S(e, t) must be allowed ( ε <S(e,t)<+ε). Therefore, the switching law will be { U/be (e), for S(e,t)>+ε u i (t) = U/b e (e), for S(e,t)< ε (9) This law provides the semiconductor just-in-time switching law, or the power converter modulator for two level converters. 3.6. Multilevel switching law Considering now a n (n >2) level converter u i (t) [u 1,..., u i,..., u n ], the application of (6) to the case S(e,t)>ε, when Ṡ(e, t)<0 is not taking place, implies an increase in the output level, at time t + 1, until Ṡ(e, t)<0 is satisfied. Therefore, the multilevel switching law is { ui+1 (t), if S(e,t)>+ε Ṡ(e,t)>+ε j<n u i (t + 1) = u i 1 (t), if S(e,t)< ε Ṡ(e,t)< ε j>1 (10)
J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 285 Fig. 1. (a and b) Auxiliary functions used to obtain constant switching frequency sliding mode modulators (comparator hysterisis wih 2ι much narrower than 2ε). 3.7. Constant frequency operation If fixed switching frequency is required, then auxiliary waveforms (triangular (Fig. 1a), sawtooth (Fig. 1b)) can be used. The resulting steady-state errors can be eliminated as described next. 3.8. Steady-state error elimination If limitations like continuous control input, constant frequency operation, semiconductor minimum ON or OFF times originate S(e,t) = ε 0 0, the steady-state error e xi = ε 0 /k i of the x i output, can be eliminated, increasing the system order (11): [ ] d T e xi, e xi,...,e xm 1,e xm = [e xi,e xi+1,...,e xm, f i (e 0 ) + p ei (t) b ei (e 0 )u i (t)] T (11) Indeed, the only non-null term of the new sliding surface S(e 0, t) (12) is the integral of the controlled output error. m S(e 0,t)= k 0 e xi + k o e xo (12) o=i 4. Example 1: AC current control in multilevel converters Three-phase n level converters (Fig. 2) [5,6] are suitable for low distortion DC/AC applications or to high-voltage, high-power applications, since the AC output voltages are stepped waveforms and Fig. 2. Three-phase, neutral-clamped three-level converter with IGBTs.
286 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 the controlled turn-off semiconductors must block only the fraction U dc /(n 1) of the total supply voltage U dc. Multilevel pulse wih modulation (PWM) for output voltage synthesis needs common mode components to overcome the drifting of the capacitor voltages (Fig. 2). Feedback linear controllers for the common mode component are slow and add extra harmonic components. Therefore, this example proposes a real time modulator for the control of the output AC currents and capacitor voltage equalization, based on the use of sliding mode and space vectors in the αβ frame. 4.1. Multilevel converter modeling Consider, as state variables, the AC side currents (i 1, i 2, i 3 = i 1 i 2 ) and the DC side capacitor voltages (U C1,U C2 ). The switching strategy for the switching cells of the k leg (k {1, 2, 3}) must ensure complementary states to switches S k1 and S k3 and to S k2, S k4. Assuming ideal switches and snubber networks, zero dead times, the discrete variables γ k (t), describe the leg output voltage u mk (Fig. 2) as u mk = 1 2 γ k(1 + γ k )U C1 + 1 2 γ k(1 γ k )U C2 = Γ 1k U C1 + Γ 2k U C2, with Γ 1k = 1 2 γ k(1 + γ k ), Γ 2k = 1 2 γ k(1 γ k ) and 1, if S k1 S k2 are ON S k3 S k4 are OFF γ k (t) = 0, if S k2 S k3 are ON S k1 S k4 are OFF 1, if S k3 S k4 are ON S k1 S k2 are OFF The converter DC capacitor voltages can be expressed: [ ] Γ 11 Γ 12 Γ 13 1 i 1 d UC1 = C 1 C 1 C 1 C 1 U C2 Γ 21 Γ 22 Γ i 2 23 1 i 3 C 2 C 2 C 2 C 2 i a (13) (14) The converter AC voltages U Sk of vector U S can be written U S = Ξ[U C1,U C2 ] T, where Ξ 11 Ξ 12 2Γ 11 Γ 12 Γ 13 2Γ 21 Γ 22 Γ 23 Ξ = Ξ 21 Ξ 22 = 1 3 Γ 11 + 2Γ 12 Γ 13 Γ 21 + 2Γ 22 Γ 23 (15) Ξ 31 Ξ 32 Γ 11 Γ 12 + 2Γ 13 Γ 21 Γ 22 + 2Γ 23 Supposing a standard inductive balanced load (R, ) with electromotive force (u) and isolated neutral, since U Sk = Ri k + (di k /) + u k, the converter switched state space model is:
d i 1 i 2 i 3 U C1 U C2 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 287 R Ξ 11 Ξ 12 0 R Ξ 21 Ξ 22 i 0 1 = R i Ξ 31 Ξ 32 2 i 3 Γ 11 Γ 12 Γ 13 U C1 C 1 C 1 C 1 U C2 Γ 21 Γ 22 Γ 23 C 2 C 2 C 2 1 0 0 1 u s1 + 1 0 u s2 1 u (16) s3 0 C i 1 a 1 0 C 2 This is a non-linear time-variant model that can be implemented in SIMUINK using the integral form of (16). 4.2. AC current control in the multilevel converter The Concordia transformation (17), applied to (16), gives (18). 1 1 0 i 1 2 2 i 2 = 3 1 i α 3 1 2 2 2 i β i 3 1 i 3 1 o 2 2 2 (17) R Γ 1α Γ 2α 0 1 i α d i β U C1 = 0 R Γ 1β Γ 2β i α i Γ 1α Γ β 1β U C1 + 0 1 0 u sα 1 u sβ U C2 C 1 C 1 Γ 2α Γ U C2 C 1 i a 2β 1 C 2 C 2 (18) C 2
288 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 Supposing that voltages U C1 and U C2 are being equalized as described next, then U C1 U C2 U dc /2, and (18) reduces to (19). [ ] R d iα = 0 [ ] 1 iα 0 [ ] 1 uα + 0 [ ] Usα (19) i β R i 0 β 1 u 0 β 1 U 0 sβ where the output voltage vector U sα,β in αβ co-ordinates is 2 [ ] Usα 2 1 1 1 U sα,β = = 2 2 U sβ 3 3 3 0 2 2 3 γ 1 1 3 γ 2 1 3 γ 3 2 3 γ 2 1 3 γ 1 1 3 γ 3 2 3 γ 3 1 3 γ 1 1 3 γ 2 U dc 2 = The canonic model (19) of this multiple input multiple output system (MIMO) with outputs i α, i β, shows the control inputs U sα, U sβ, dependent on the control variables γ k (t). From (19) and (4), the two sliding surfaces S(e α,β, t) are S(e α,β,t)= k α,β (i α,βref i α,β ) = k α,β e α,β = 0 (21) The first derivative of (21), denoted Ṡ(e α,β,t),is Ṡ(e α,β,t)= k α,β ( i α,βref i α,β ) = k α,β [ i α,βref + R 1 i α,β + u α,β 1 U sα,β 1] (22) Therefore, from (6) and (22) the switching laws are S(e α,β,t)>0 Ṡ(e α,β,t)<0 U sα,β > i α,βref + Ri α,β + u α,β S(e α,β,t)<0 Ṡ(e α,β,t)>0 U sα,β < i α,βref + Ri α,β + u α,β (23) This switching strategy must select the proper values of U sα,β from the available outputs. As each converter leg (Fig. 2) can deliver one of the three possible output voltages (U dc /2; 0; U dc /2), all the 27 possible output voltage vectors, listed in Table 1, can be represented in the αβ frame of Fig. 3 (in per units, 1 p.u. = U dc ). Considering any particular value of α (or β) component, there are only five levels [ Γα Γ β ] U dc 2 (20) Table 1 Switching table for current control and U C1 >U C2, in inverter mode, or U C1 <U C2 in rectifier mode, showing vector selection upon the variables λ α, λ β λ β λ α 2 1 0 1 2 2 25 25 12 7 7 1 24 13 13; 6 6 8 0 19 18 1; 14; 27 5 9 1 20 17 17; 2 2 4 2 21 21 16 3 3
J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 289 Fig. 3. Output voltage vectors (1 27) of three-phase, neutral-clamped three-level converters, in the αβ frame. available in the remaining ortogonal component. From the load viewpoint, the 27 space vectors of Table 1 define only 19 distinct space positions (Fig. 3). To select one of the 19 positions from the control law (21) and the switching laws (23), two five-level hysteretic comparators (Fig. 4) must be used (5 2 = 25). Their outputs are the integer variables λ α and λ β, denoted λ α,β (λ α, λ β { 2; 1; 0; 1; 2}) corresponding to the five selectable levels of Γ α and Γ β. Considering sliding mode stability (6) and (10), λ α,β, at time step j + 1, is given by (24), knowing their previous values at step j. This means that the output level is increased (decreased) if the error and its derivative are both positive (negative), except if the maximum (minimum) output level is exceeded. { (λα,β ) j+1 = (λ α,β ) j + 1, if S(e α,β,t)>ε Ṡ(e α,β,t)>ε (λ α,β ) j < 2 (24) (λ α,β ) j+1 = (λ α,β ) j 1, if S(e α,β,t)< ε Ṡ(e α,β,t)< ε (λ α,β ) j > 2 The available space vectors must be chosen, not only to reduce the mean output voltage errors, but also to guarantee transitions only between adjacent levels, to minimize the capacitor voltage unbalance, to minimize the switching frequency, to observe minimum ON or OFF times, if applicable, and to equally stress all the semiconductors. Using (24) and the switching laws S(e α,β, t), Tables 1 and 2 can be used to choose the correct voltage vector in order to ensure stability, current tracking and capacitor voltage equalization. The vector with α, β components, corresponding to the levels of the pair λ β, λ α, is selected, provided that adjacent transitions of converter leg are obtained. If there is no directly corresponding vector, then the nearest vector, guarantying Fig. 4. One of the two five-level comparators (β component).
290 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 Table 2 Switching table for current control and U C1 <U C2, in inverter mode, or U C1 >U C2 in rectifier mode, showing vector selection upon the variables λ α, λ β λ β λ α 2 1 0 1 2 2 25 25 12 7 7 1 24 26 26; 11 11 8 0 19 23 1; 14; 27 10 9 1 20 22 22; 15 15 4 2 21 21 16 3 3 adjacent transitions, is selected. If more than one vector is the nearest, one is selected to equalize the capacitor voltages. One of the three vectors (1, 14, 27) corresponding to the zero vector, is selected to minimize the switching frequency. 4.3. Equalization of the DC capacitor voltages The discrete values of λ α,β allow 25 different combinations. As only 19 are distinct from the load viewpoint, the extra ones can be used to select vectors able to equalize the capacitor voltages. From (14) and (4), a suitable sliding surface is S(e Uc,t) = k U (U C1 U C1 ) = 0. From circuit analysis, it can be seen that vectors {2, 5, 6, 13, 17, 18} result in the discharge of capacitor C 1, if the converter is operating in inverter mode, or in the discharge of C 1 if the converter is operating as a boost rectifier. A similar reasoning can be made for vectors {10, 11, 15, 22, 23, 26} and capacitor C 2. Therefore, from the vector [Υ 1,Υ 2 ] = [(γ 1 /2)(γ 1 + 1) (γ 3 /2)(γ 3 + 1), (γ 2 /2)(γ 2 + 1) (γ 3 /2)(γ 3 + 1)], if (U C1 U C2 )(Υ 1 i 1 + Υ 2 i 2 )>0, then accordingly to λ α,β, choose one of the vectors {2, 5, 6, 13, 17, 18} (Table 1). If (U C1 U C2 )(Υ 1 i 1 + Υ 2 i 2 )<0, then accordingly to λ α,β, choose one of the vectors {10, 11, 15, 22, 23, 26} (Table 2). For example consider the case where U C1 >U C2. Then the capacitor C 2 must be charged and Table 1 must be used, if the multilevel converter is operating in the inverter mode, or Table 2 for rectifier mode. If λ α = 1 and λ β = 1, in inverter mode, then, using Table 1, vector 13 should be used. 4.4. Multilevel converter simulation and experimental results Simulations were obtained using MATAB/SIMUINK. Experimental results were obtained with a low power, low voltage laboratory prototype (150 V, 3 kw) of a three level converter with DSP implemented algorithms and tables. Transistors IGBT (MG25Q2YS40) were used, switched at frequencies near 2 khz, with neutral clamp diodes 40HF, C 1 C 2 20 mf. The load was mainly inductive (3 10 mh, 2 ). Fig. 5 shows simulation and experimental results for step inputs (2 4 A) in the amplitude of the sinus current references with frequency near 13 Hz (U dc 150 V). Observe the tracking ability, the fast transient response and the balanced three-phase currents both on the simulation and on experimental results, which validates the modeling and control approach and also shows robustness against semiconductor non-ideal characteristics and dead times. The performance of the capacitor voltage equalizing strategy is shown in Fig. 6, where errors lower than 8% where obtained without increasing the switching frequency.
J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 291 Fig. 5. Step response of the current control method: step from 2 to 4 A and then back to 2 A in the amplitude of the reference 13 Hz current. Traces show, from top to bottom, the reference current for phase 2 and the three output currents with 150 V power supply. (a) Simulation (5 A per div., 50 ms per div.) and (b) experimental (5 A per div., 50 ms per div.). The converter number of levels (three for phase voltages and five for line to line voltages) are shown in Fig. 7. 5. Example 2: Sliding mode current controller for single-stage AC/DC Buck Boost converter Fig. 8 shows the single-phase, single-stage Buck Boost type AC/DC converter [7] with four switches with bipolar voltage blocking capability, used to obtain near unity power factor and near sinusoidal input currents. 5.1. Single-stage Buck Boost AC/DC converter modeling Using the displayed state variables of the circuit of Fig. 8, the following switched state space model is obtained: Fig. 6. Capacitor voltages showing the dynamics of the equalization strategy. (a) Simulation (10 V per div., 500 ms per div.) and (b) experimental (10 V per div., 500 ms per div.).
292 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 Fig. 7. Phase and line to line voltages showing, respectively, 3 and 5 V levels. (a) Simulation (50 V per div., 5 ms per div.) and (b) experimental (50 V per div., 5 ms per div.). where di s dv Cf di o = R f f i s 1 f v Cf + 1 f v s = 1 C f i s β C f i o = β v Cf o dv Co γ(1 β ) V Co o = 1 β C o i o 1 R o C o V o { 1, io > 0 γ = 0, i o 0 1, (switch 1 and 4 are ON) and (switch 2 and 3 are OFF) and β = 0, all the switches are OFF 1, (switch 2 and 3 are ON) and (switch 1 and 4 are OFF) (25) Fig. 8. High-power factor Buck Boost rectifier.
J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 293 This model can be used for simulation purposes, and written in the phase canonical form, for the control of the input current i s, and output voltage V Co. θ = v s R f i s v Cf f i s R f θ 1 i d θ V Co = s + ω V smax cos(ωt) β i o f f C f f f C f ϑ = (1 α)i o i o ϑ C o β(1 β )R f i s + β(1 β ) f γ(1 β )2 β(1 β ) θ V Co v s 1 di o o C o o C o o C o o C o C o (26) 5.2. Input current and output voltage control From these state space equations, it can be concluded that the i s current has a strong relative degree of two, since its second-time derivative contains the control variable β. Considering the i s current as the control input for V Co, this output also has a strong relative degree of two. Since, to obtain an input source current approximately sinusoidal and in phase with the line voltage, the output of the voltage controller must modulate the amplitude of a sinusoidal reference, it follows from (4) and (5): S is = 2 di sref k i e i = (i sref i s ) + β 1 i=1 S VCo = (V Co ref V Co ) + β 2 dv Co ref = (V Co ref V Co ) + β 2 dv Co ref β 1 f (v s R f i s v Cf ) = 0 (27) β 2 γ(1 α) C o i o + β 2 1 β 2 V smax The control laws can be obtained applying (6), (9), (10). { 1, Sis sign(ν Cf )<0 1, S is < 0 α = β = 0, S is = 0 0, S is sign(ν Cf )>0 1, S is > 0 C o 2V Co C o I smax + β 2 1 C o i o = 0 (28) These control laws can be implemented using, respectively, two- and three-level comparators (with hysterisis in order to limit the maximum switching frequency). 5.3. Buck Boost AC/DC converter simulation and experimental results Experimental results were obtained with a laboratory prototype with V smax = 60 V, R f = 0.1, f = 5 mh, C f = 15 F, o = 10 mh, C o = 5000 F. Computer simulations and experimental results for the input current and output voltage step response are shown in Figs. 9 and 10. The methods described here were also applied to thyristor rectifiers and matrix converters [8]. (29)
294 J.F.A. da Silva et al. / Mathematics and Computers in Simulation 63 (2003) 281 295 Fig. 9. Operation of the Buck Boost rectifier at unity power factor: (1) input source voltage (V s : 20 V per div.), (2) input line current (i s : 2 A per div.). (a) Simulation and (b) experimental. Fig. 10. Step response of the output voltage control of the Buck Boost rectifier at unity power factor: (1) output voltage reference (V s : 20 V per div.), (2) output voltage. (a) Simulation and (b) experimental. 6. Conclusion A methodology for modeling for the simulation and for the advanced control of power electronics systems was presented and illustrated. Switched state space models for power electronics systems were derived and used for computer simulations and to obtain non-linear and robust multilevel controllers. Advanced space-vector sliding mode control techniques were demonstrated to be effective to control of multilevel converters, high-power factor rectifiers or matrix converters. Acknowledgements This work was supported by FCT contract no. PCTI/1999/ESE/33648. References [1] V. Utkin, Discontinuous control systems: state of art in theory and applications, in: IFAC Proceedings, Munich, July 1987, pp. 75 94.
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