Problem Set 12 Solutions See handout "Part 4: Heterojunctions MOS Devices" (slides 9-18) Using the Boise State Energy Band Diagram program, build the following structure: Gate material: 5nm p + -Poly Si Gate Oxide: 5 nm SiO 2 Si substrate: Si, doping N = 1 17 cm -3 Using the Boise State Energy Band Diagram program, answer the following questions: Circle the correct answer: 1. Is the MOS device an (a) nmos or (b) pmos device? CORRECT NSWER=nMOS 2. t equilibrium, what mode is the device in? a. ccumulation (collecting majority carriers at Si/SiO 2 interface) CORRECT NSWER b. Depletion (depleting/ionizing dopant energy states) c. (collecting minority carriers at Si/SiO 2 interface) 3. pply a negative 5V bias. What mode is the device in? a. ccumulation (collecting majority carriers at Si/SiO 2 interface) CORRECT NSWER b. Depletion (depleting/ionizing dopant energy states) c. (collecting minority carriers at Si/SiO 2 interface) 4. pply a positive 5V bias. What mode is the device in? a. ccumulation (collecting majority carriers at Si/SiO 2 interface) b. Depletion (depleting/ionizing dopant energy states) c. (collecting minority carriers at Si/SiO 2 interface) CORRECT NSWER 5. pply a positive.5v bias. What mode is the device in? a. ccumulation (collecting majority carriers at Si/SiO 2 interface) b. Depletion (depleting/ionizing dopant energy states) CORRECT NSWER c. (collecting minority carriers at Si/SiO 2 interface) 1
nswer the following questions based on the figure below. You will need to use/move your cursor over each material to determine some of the values. dditional values are in the window panes at the top and on the left side of the program window. E e- or Φ S Oxide S/C E c E i Φ F Φ F E f & E E v Figure 1: SiO 2 /Si interface. 6. t equilibrium, what is the: (I do #6 with class pointing out aspects of the program) a. Electric field over the oxide region: -.343 MV/cm b. Voltage drop over the oxide region, V ox : -.172 V c. What is another name for the work function difference ( Φ m -Φ Si ): V FB or V built-in d. Work function difference (i.e., V FB = Φ m -Φ Si ) calculated by program: V FB =.25 V e. Surface potential, Φ s, at the Si/SiO 2 interface (i.e., V drop,si ): φ s =-.78 V f. dd the following equation for Φ s : V bias - V FB V ox -.25-(-.172) = -.78 g. Compare values (e) to (f): The same 7. Now bias your device to the Flat Band condition. What is: a. The bias you applied to obtain Flat Band: V FB =.25 V b. The Flat Band voltage, V FB, calculated by program:.25 V c. The work function difference ( Φ m -Φ Si ) in the Flat Band condition:.25v d. What integer value of Φ F is this bias? Φ F e. What value of the surface potential, Φ s, calculated by program? V! f. Compare Φ s in the Flat Band condition, to Φ m -Φ Si in the equilibrium condition? V, it is the same! 8. Calculate the intrinsic carrier concentration, n i, the program is using for Si. You will need to view the parameters used in the Si: Temp = 3K; 3.87x1 16 *T 3/2 xexp(-714/t) = 1.41x1 1 cm -3 2
Note: s you answer problems 9 and 1, fill out the table in problem 11. 9. Now bias your device to E f =E i at the Si/SiO 2 interface. What are: a. The bias needed to obtain E f = E : i.82 V b. What value of the surface potential, Φ s, calculated by program?:.47v c. Calculate E f,si which is equal to: kt ln.478 V d. dd the following equation for Φ s : V bias - V FB V ox.82-.2496-..163 =.474 e. Compare (d) to values for (b) & (c): The same f. What integer value of Φ F is this bias? 1 or 1Φ F 1. Now bias your device to E f =E D at the Si/SiO 2 interface. What are: a. The bias needed to obtain E f =E D : 1.3 V or V T = 1.33V b. What value of the surface potential, Φ s, calculated by program?:.815 c. Calculate E f,si at E D :which is equal to: 2 kt ln. 8156 V d. dd the following equation for Φ s : V bias - V FB V oxide 1.33-.25-.238 =.815V e. Compare (d) to values for (b) & (c) E i : Essentially the same! f. What integer value of Φ F is this bias? 2Φ F 11. Fill out the following table. Parameters: V gate Si Surface from Potential, program Φ s, from Program V ox from program Integer Value of Φ F which is the Si Surface Potential, Φ s Calculate Φ F =? kt ln Calculate Φ s = V gate V FB V ox Position of E f E f at Flat Band Condition.25V E f at intrinsic energy, E i.82v.47v.163v 1.478V.47V E f at 1.33V Threshold of.815v.238v 2.8156.815V E f at E c 2.1V.97V.88V 2.38 Φ s/ kt ln.97v E f at E v -.71V -.153 -.797V -.38 Φ s/ kt ln -.152V - Next page - 3
12. From the table, subtract the following voltages: a. Φ s ( E f at E c ) - Φ s ( E f at E v ): 1.123V b. V gate ( E f at E c ) - V gate ( E f at E v ): 2.81V c. Compare the voltages you determined in part a and b to the energy band gap of Si. Comment on what is equivalent to the Si band gap energy as the Fermi energy level is swept through the energy band gap of Si in the channel region by applying a gate voltage, V gate. Comment: Because of the voltage drop across not only the Si (Si surface potential) but also the oxide, it therefore takes more gate voltage to sweep E f through the band gap energy. It is essentially the difference between the Si surface potential at E c and E v that should be equivalent to the Si band gap energy. 13. Export data of various parameters including gate capacitance and gate charge as a function of gate voltage by sweeping the gate voltage from -1V to 2.2V using 2 steps. You will need to go to the Pull-down Menu called Structure and then click on Export Tool. window will pop up and then click Preview which will calculate various parameters shown in the window. This will take a few seconds. Then save the.cvs file. You can click on parameters in the window to see the plots of various parameters versus gate voltage. Note: If you are using Mathematica, Extra Credit 4 Two x-axes or Two y-axes (updated 11/21/14) may help. a. Plot the following on the same plot (i.e., create a single plot). Place vertical lines in the plot at the following voltages: Flat Band voltage (V FB = Õ F ), the voltage equivalent to the intrinsic Fermi energy (E i = 1Õ F ), the threshold voltage (V t = 2Õ F ), and the voltage at which E f = E c and E f = E v. Label thoroughly including the vertical lines, and modes of inversion including accumulation, depletion, inversion (both weak and strong) and slides 17-18. Include a figure caption for your plot. i. Gate charge versus the Si surface potential, Õ s. It should look very similar to 17 in MSE 31 4 Device Physics Powerpoint. ii. Gate capacitance versus the Si surface potential, Õ s. It should look somewhat similar to 19 in MSE 31 4 Device Physics Powerpoint. 4
Taur & Ning, Fundamentals of Modern VLSI Devices, (Cambridge, 1998) p..58-74 8x1-7 Strong 8x1-7 Gate Charge (C/cm 2 ) 7x1-7 6x1-7 5x1-7 4x1-7 3x1-7 ccumulation Depletion 7x1-7 -.3-.2-.1..1.2.3.4.5.6.7.8.9 1. 1.1 1.2 E v V FB =φ F E i =1φ F V t =2φ F E c Eg Gate Charge Gate Capacitance Weak Si Surface Potential, φ s (V) 6x1-7 5x1-7 4x1-7 3x1-7 Figure: Gate charge and capacitance as a function of the surface potential. Gate Capacitance (F/cm 2 ) 5
b. Plot the following on the same plot. Place vertical lines in the plot at the following voltages: Flat Band voltage (V FB = Õ F ), the voltage equivalent to the intrinsic Fermi energy (E i = 1Õ F ), the threshold voltage (V t = 2Õ F ), and the voltage at which E f = E c and E f = E v. Label thoroughly including the vertical lines, and modes of inversion including accumulation, depletion, inversion (both weak and strong) and slides 17-18. Include a figure caption for your plot. i. Plot gate charge versus gate voltage. It should look somewhat similar to slide 17 MSE 31 4 Device Physics Powerpoint. ii. Plot gate capacitance versus gate voltage. It should look very similar to 19 in MSE 31 4 Device Physics Powerpoint. 6
Streetman & Banerjee, Solid State Electronic Devices, 5th Ed (Prentice Hall, 2) p.263-275 8x1-7 8x1-7 Gate Charge (C/cm 2 ) 7x1-7 6x1-7 5x1-7 4x1-7 3x1-7 Gate Charge Gate Capacitance ccumulation -1. -.5..5 1. 1.5 2. V FB =φ F E i =1φ F V t =2φ F E v Weak Depletion Strong Gate Voltage (V) Figure: Gate charge and capacitance as a function of the gate voltage. Eg E c 7x1-7 6x1-7 5x1-7 4x1-7 3x1-7 Gate Capacitance (F/cm 2 ) 7