Chapter 0: Sinusoidal Steady-State Analysis Sinusoidal Sources If a circuit is driven by a sinusoidal source, after 5 tie constants, the circuit reaches a steady-state (reeber the RC lab with t τ). Consequently, the natural response is irrelevant so that the coplete response is given by x(t) x n + xf xsin( ω t +θ ) Clearly these functions are periodic: π x(t) x(t + T) sin( ω t) sin( ω t + ω T) ω π f T Since we will always know the shape of the forcing response, it akes sense to seek a technique that focuses on calculating the aplitude (x ) and the phase (θ) of the forcing response functions; the ethod is the phasor ethod, which is the focus of this chapter. Definition: if the current reaches its peak value before the voltage, one says that the current i leads the voltage v (i LEADS v) Exaple Suppose i 8sin(4t π )A and v 6sin(4t + π)v then we find that where 3 6 ( ) ( ) θ phase difference 4t + π 4t π π v LEADS i by π 90 6 3 Transition fro Chapter 8,9 techniques to Chapter 0 If one takes the approach fro Chapter 8 and 9 techniques to solve for the coplete response x(t) of a storage eleent, there is a way to rewrite the response such that there is a clear aplitude and phase. The way that it stands now, the techniques fro chapters 8 and 9 see to hide the details that we want to focus on. The goal is to rewrite the forced response in the for of vs Vcos( ω t) x(t) xn + xf Bcosω t + Bsinω t A cos( ωt θ ) aplitude To get the forced response into this for, we write the response using a triangle trick and a trigonoetry identity: B B x(t) Bcosω t + Bsinω t B + B cosω t + sinωt B B B B + + cosθcosω+ t sinθsinω t cos( ω θ t ) This leads to define a triangle where cosθ and sinθ are defined in ters of B and B : B B B cos, sin, tan + + θ θ θ B B B B B Note that if B /B < 0, one ust add 80 0 to the angle deterined. Exaple: suppose the forced response is x(t) 5cos5t + sin5t B + B cos(5t θ ) To write this into this new for, the aplitude and phase is B + B ( 5) + 3 x(t) 5cos5t + sin5t 3cos(5t 3 ) θ tan ( /5) 67 + 80 3 Suary: the transition of the force response fro Chapters (8, 9) to 0 is phase 0.
x(t) Bcosω t + Bsinω t B + Bcos( ωt θ) Chapters 8 and 9 transition into Chapter 0 Steady State AC Response of a First Order Circuit Let's apply the above techniques to a first order RL circuit. For AC steady state, we only focus on the on the forcing response. Here is where the lab is iportant. We now suarize the results of the lab even though one does not necessarily know the theory behind these results. What one knows is that the aplitude of the ipedance and current, and the phase are frequency dependent since V ωl Z R +ω L i L(t), θ tan R +ωl R To find the current of the inductor i L(t), we applied KVL dil KVL : vl + vr vs L + RiL Vcos( ω t) where the forced response is i B cosω t + B sinω t B + B cos( ωt θ ) L To deterine constants B and B, we substitute these into the first order equation di L L + RiL Vcos( ωt) il Bcosω+ t Bsinωt ( ) ( ) ωlb sinω t +ωlb cosω t + R B cosω t + B sinω t V cos( ωt) and set up two by two atrix to get the solutions: where ( ω LB + RB V ) cos( ωt) R ωl B V ( ω LB+ RB 0) sin( ωt) R ωl B 0 V ωl V ωl 0 ωl RV 0 ωl ωlv B, B R +ω L R +ω L R +ω L R +ωl Converting this forced response using a triangle, we get R +ωl V B ωl B + B V and θ tan tan R L B R +ω Finally, we have ( R +ωl ) V i L(t) cos( t ) where tan R +ωl ω θ θ ωl R Rearks. Why go through all the fuss to rewrite a good, respectable solution? To answer this question, let's copare the two solutions: Chapter 8 response: 0.
RV ωlv il Bcosω t + Bsinω t cosω t + sinωt R +ω L R +ωl Chapter 0 translational response: V ωl il B + B cos( ωt θ ) cos( ωt θ) where θ tan R L R +ω Fro lab, we know that the inductor current in an AC circuit is dependent on the frequency. Which response is easier to interpret the behavior of the inductor's current as the frequency changes? Clearly, the Chapter 0 response is uch easier to interpret! In lab, we found that as the frequency increased, the current decreased. And what was the functional for of this decrease? It behaved as il R +ωl This is really challenging to see in the language of chapter 8 techniques. If I take the sae approach to an AC source acting in an RC-circuit, but suarize the results, we will get the following. Apply KCL to this parallel circuit and solve for B and B : dvc vc KCL : ic + ir is L + Icos( ω t) R I/R ωci B, B /R +ω C /R +ωc Now to deterine the aplitude and phase angle: vc Bcosω+ t Bsinωt I B B ( ) B + B and θ tan tan ωrc /R +ωc We then get that V R i L(t) cos( ωt θ) where θ tan R / C ωc + ω I/R ωci vc cosω t + sinωt /R +ω C /R +ωc Coplex Exponential Approach The goal is to redefine the previous approach using coplex exponentials, which akes calculations considerably easier. Review of Coplex analysis There is a whole branch of atheatics that is dedicated to the iaginary nuber j that is enorously powerful (and interesting) in siplifying y applications in physics and engineering. Coplex nubers can be viewed as either in rectangular or polar for. Analogy. The circle can be paraeterized two different ways: f(x,y) x + y or f(r, θ ) r rectangular Rectangular Properties Re(c) Re(a + jb) a c a + jb I(c) I(a + jb) b coplex conjugate c a jb Multiplying and dividing coplex nubers: polar 0.3
Polar for a cc (a + jb)(a jb) a + b and jb a jb c a + jb a jb a + b c a jb Re jθ + θ Euler's relation: R a + b tan (b/a) e cosθ+ jsin θ where e e e jθ a b a+ b jπ j π e cos( π ) + jsin( π ) j j e Exaple: iportant! jπ jπ e cos( π ) + jsin( π ) e ulitplying by Phasor Concepts For a given ac circuit that reaches steady-state, the circuit always oscillates at the driving frequency of the source. Therefore, the angular frequency ω (or ωt) will not change. However, the phase and aplitude will change. There is a atheatical technique using coplex (phasor) vectors that allows one to solely focus on just calculating the phase and aplitude for ac steady state functions. To see how one writes a coplex function into a phasor or a coplex vector in polar for, we start with the function z Z e Z e e j( ω t +θ) jθ jωt e changing aplitude nonchanging and phase frequency Focusing only on the changing aplitude and phase part, this is called a phasor (or a coplex vector written in polar for) and written as jθ Z Z e Z θ Noenclature In ac circuits, it is standard to reference all ac functions relative to cosine functions not sine ones (although defining the in ters of sine functions is perfectly fine). Consider then the two coplex functions, one written in ters of cosine and the other as a sine; so these written in phasor for look like phasor for i(t) 4cos( ωt 80 ) I 4 80 v(t) 8sin( ωt 0 ) Sine this is not in cosine for, it ust be converted into a cosine using standard trig identities: sin( ωt 0 ) cos( ωt 0 90 ) cos( ωt 0 ) sinα cos( α 90 ) phasor for v(t) 8sin( ωt 0 ) V 8 0 Exaple 0. Deterine the polar for of the quantity 5 36.9 0 53. ( )( ) (4 + j3) + (6 j8) 0.4
This exaple is setup to show the iportance of your calculator and learning to use it to ake coplex algebra. In order to calculate this quantity, start with the nuerator and write it in exponential for: ( )( ) j ( 36.9 53. ) 5 36.9 0 53. 5e 0e 50e 50e j 36.9 j 53. j 6. Convert the denoinator into polar for: 0 + 5 (4 + j3) + (6 j8) 0 j5 e θ tan ( 0.5) 7 Putting it altogether, j 6. ( 5 36.9 )( 0 53. ) 50e 4.54e j 6.6 (4 + j3) + (6 j8) e j 0.4 j 7 PHASOR CIRCUITS & R, L, C RELATIONSHIPS Using the phasor ethod, we can convert an AC steady state circuit fro the tie doain (cos (wt + θ)) to the frequency doain (Z e jθ ). In order to ipleent this new technique to our advantage, the basic process is as follows: Step : Convert the circuit into a phasor circuit. That is, rewrite all the coponents into coplex for where the frequency ter exp(jωt) drops out fro the equations: jθ jωt Z Z e e Step : Solve the phasor circuit in the coplex plane (or frequency doain/space). Step 3: Convert the phasor solution into a tie doain for using Euler's relation. I want to analyze the three basic circuits using KVL to derive how the basic three eleents behave in ac circuits. The key point to realize here is that it is the ratio of voltage to current that define the resistive nature of a circuit (Oh s law). When these eleents are driven with ac sources, their behaviors change and our goal is to atheatically derive these. The way we look analyze these is to derive the relation RESISTORS INDUCTORS Proof: using KVL, we look at the voltage-current relationship: 0.5
di v v L V e L coplex jωt S L for I V I jωl e jωt ω L ω L j π/ j e jxl Inductive Reactance Rearks. The reactance aplitude X L acts as a resistive ter and has units of resistance. Physically, the inductor sees the changing current through it and produces a back ef that ipedes the flow of current. That is, the higher the frequency of the ac source, the higher the ipedance of the inductor. Therefore, at higher frequencies the inductor acts like an open while at low frequencies it acts like a short (just as we saw in the lab).. Soething really interesting happens when an inductor is in the circuit it causes the phase shift between the voltage and current. That is, just as a wave hits a fixed end and undergoes a phase change of π, as the current enters the inductor there is a phase change between the voltage and the current of π/ according to voltage-current relationship. The reason for this is that the inductor does not flow Oh s law and the derivative ter introduces the iaginary nuber j: dil j π / vl j e voltage LEADS current by 90 ELI CAPACITORS The phasor circuit for the capacitor is Proof: using KVL, we look at the voltage-current relationship: dvc coplex jωt j t is ic C I for e V jωc e ω V j e π j / jx I ωc ωc Capacitive Reactance Rearks. The reactance aplitude X C acts as a resistive ter. Physically, the capacitor sees the changing current as adding and pulling charge fro its plates. If the frequency of the source is low enough, the capacitor has tie to get fully charged and act like an open. However, if the frequency changes quickly, the charge on the capacitor is put on as quickly as it is taken off and has no net charge is on the capacitor (v C 0), so it acts like a short. That is, the higher the frequency of the ac source, the lower the ipedance of the capacitor while the lower frequencies it increases to really large values (just as we saw in the lab).. When an capacitor is in the circuit it will also cause a phase shift between the voltage and current of π/. The reason for this is that the capacitor introduces a derivative ter into oh s law and the iaginary nuber j appears: C 0.6
dv j ICE C π j / ic e current LEADS voltage by 90 Suary: if one replaces the inductance L and capacitance C with their phasor equivalents (ipedance) in an ac circuit, all of the dc techniques learned fro chapters -6 can be readily applied. That is, for siple circuits one can use all of the standard series and parallel type of coputational tools: KVL, KCL, divider rules and equivalent ipedances. If the circuits becoe ore coplicated, then Node, Mesh, and Thévenin- Norton techniques can be applied. No ore differential equations are required.. Ipedance Z R + X Z R + jx Z θ θ tan (X/R) Series: ZS Z+ Z +. Oh's Law for Phasors: V Z I 3. Series: ZS Z+ Z + + Zn KVL and VDR Parallel: + + + KCL and CDR ZP Z Z Zn 4. Node/Mesh 5. Thévenin-Norton equivalents However, there is a cost - the phasor algebra can be unbearable to do by hand. If the circuits becoe ore coplicated, then Node, Mesh, and Thévenin-Norton techniques can be applied with the idea that calculators/coputers will help one with the nuerical crunching. The nice things is that no ore differential equations are required. Exaple 0. Find Z eq for the circuit operating at 0 khz. Convert all the coponents into phasor for. The angular frequency is ω π 0 4 and the phasor for for the inductor and capacitor are 6 ZL jω L j(6830)(60 0 ) j0.053 j0 Ω j j ZC j5.95 j 6 C (6830)( 0 6 Ω ω ) Here is what the phasor circuit looks like: Using standard techniques fro Chapter 3, the ipedance reduction goes as follows: (i) the capacitor and inductor are in parallel and reduce to ZLZC (j0 Ω )( j 6 Ω ) 60 j j6.7ω Z + Z j0 Ω j6 Ω j6 j L C Now I repeat this parallel reduction process with the 36Ω resistor: j90 j90 36 j6.7 j96 96e 96e j36.6 36 + j6.7 44.8e 36+ j6.7 36+ 6.7 tan (6.7/0).5 53.4 Z eq 0.7
The circuit is ore inductive than resistive or capacitive. Why? Note that the sallest ipedance is along the inductive branch since X L j0 Ω. Furtherore, the phase is positive, which akes it ore inductive as well. Exaple 0.3 Deterine the current i(t). First, we convert this circuit into a phasor circuit. The capacitive and inductive ipedances read X C 4 and X L L 3 ωc 3 Ω ω Ω So that the phasor circuit looks like the one on the right. To deterine the current, we apply Oh s law thinking and copute the equivalent ipedance, and divide it into the voltage source to get the current. That is, V V V V V I Z j4 j3 eq + j4 j3 + + j tan j4 + j3 83 85. A I To convert this back into the tie doain, we take the real back of the phasor expression: j85. j3t Real part j(3t 85. ) I 83 85. A 83e e i(t) Re 83e ( ) add by hand Exaple 0.4 Deterine v L(t) across the 5H-inductor. First convert all coponents into phasor for and redraw the into the phasor circuit. 0cos(4t + 60 ) 0 60 83cos(3t 85. )A i(t) 0F 5 Ω 5F 50Ω 3 3 4 0 0 4 5 0.5H 4.5 0 Ω 5H 4 5 0Ω This phasor circuit has two blocks in series where the first block is defined Z j0 Ω (0 j5) Ω and the second block is Z j0ω (40 j50) Ω. The voltage of inductor j0 is equivalent to Z since both branches are in parallel. I will use VDR to deterine this voltage across Z. I first start by coputing the ipedance of each of these blocks. The first ipedance Z is ( 0 j5) j0 50 j00 Z ( 0 j5) j0.8 75.5 Ω 0 j5 + j0 0 j5 and ipedance Z is j0 ( 40 j50) 000 + j800 Z j0 ( j50 + 40) 5.6 75.5 Ω j0 + 40 j50 40 j30 0.8
Now applying VDR to get the voltage across Z gives Z 5.6 75.5 V 0 60 0 60 6.67 60 V V Z + Z.8 75.5 + 5.6 75.5 coputed this in a calculator Now to transfor this back into the tie doain, ust take the real part of the phasor voltage: ( ) ( ) Re( V ) Re 6.67 (cos60 + jsin60) 6.67cos 4t + 60 V v (t) L Exaple 0.5 Deterine the phasor voltage V C using Node analysis. Since there are only two nodes (defined V C and V A), we have two equations. Writing these out, we have Node A: + VA VC 0 j5 j5 Node C: + VC VA 45 + j j4 j5 j5 Siplifying these equations in order to ake the algebra easier, I ultiple these equations by factors of 0 and 0 as shown: 0 + VA VC ( + j) VA j VC 0 0 j5 j5 0 + VC VA + j j4va + jvc 0 + j0 j4 j5 j5 Solving for V C using Craer s rule: j 0 j j VA 0 j4 0+ j0 60 j00 Vc j4 j VC 0 + j0 j j 0+ j j4 j 6.6 59 0 5.7 Exaple 0.6 Deterine V L and V C using Mesh analysis..6 64.7 V Vc There are two loops, which I define as I and I. Writing out these two loop equations gives (4 + j6) I j6i + j 3 j6 I + (8 + j) I 0 Or in atrix for 0.9
4 + j6 j6 I + j 3 j j64 8 + j I 0 Using Craer s rule yields the following currents: and I + j 3 j6 0 8+ j 4+ j6 j6 j j64 8+ j.5 9 (. + j.) A I I 4+ j6 + j 3 j j64 0 4+ j6 j6 j j64 8+ j.8 05 A I The voltage of the inductor is VL j6( I I) (6 90 )(.5 9.8 05 ) (6 90 )(.7.3 ) 6.3 78.7 and the voltage of the capacitor is V j4 I (4 90 )(.8 05 ) 7.8 5 V V c Exaple 0.7 Find the Thévenin equivalent circuit for the circuit shown. V VL c Converting this into a phasor circuit, the Thévenin equivalent is deterining V OC and Z Th. We first deterine the open circuit voltage V OC. Using loop analysis. Since there are two loops, I and I, I will use Loop to deterine V OC 300I. The loop equations are Loop : (600 j300) I + j300i 9 600 j300 j300 0 I 9 Loop : j300 I + (300 j300) I 0 j300 300 j300 0 I 0 DC: V ( I I X j300 ) j300 j300 VX 0 Substituting these into the calculator, the current I and V OC are I 0.04 6 A 300I 3.7 6 V V oc Next, we deterine I sc using Loop again. However, there are two iportant things to note. () The short circuit at the load kills off the 300Ω resistor, which leaves us with two loops again. () The dependent voltage source value reads as follows: V V 0 V 0 x x x So, there is no dependent source and the short at the load kills of the capacitor j300ω. In other words, there is only one straight forward loop (loop I ) that is also equal to I I sc. By inspection, a nice KVL around the left ost loop gives us the I sc current reading of 9 0 Isc 0.05 0 A I 600 sc The Thévenin ipedance is 0.0
Z Voc 3.545 6 Th Isc 0.05 0 The Thévenin equivalent is 47 6 Ω Z Th 0.