DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver

Similar documents
DM74LS240 DM74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver

74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver

74LS240 / 74LS241 Octal 3-STATE Buffer/Line Driver/Line Receiver

DM74LS373 DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

DM74LS02 Quad 2-Input NOR Gate

DM74LS08 Quad 2-Input AND Gates

DM74S373 DM74S374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops

74F240 74F241 74F244 Octal Buffers/Line Drivers with 3-STATE Outputs

DM74LS670 3-STATE 4-by-4 Register File

DM74LS05 Hex Inverters with Open-Collector Outputs


DM7404 Hex Inverting Gates

DM Quad 2-Input NAND Buffers with Open-Collector Outputs

MM74HC244 Octal 3-STATE Buffer

DM7417 Hex Buffers with High Voltage Open-Collector Outputs

74FR244 Octal Buffer/Line Driver with 3-STATE Outputs

DM74LS75 Quad Latch. DM74LS75 Quad Latch. General Description. Ordering Code: Connection Diagram. Logic Diagram. Function Table (Each Latch)

MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

DM74LS09 Quad 2-Input AND Gates with Open-Collector Outputs

74F537 1-of-10 Decoder with 3-STATE Outputs

DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer

MM74HC573 3-STATE Octal D-Type Latch

MM74HC373 3-STATE Octal D-Type Latch

MM74HC373 3-STATE Octal D-Type Latch

MM74HC374 3-STATE Octal D-Type Flip-Flop

CD4028BC BCD-to-Decimal Decoder

74F Bit Random Access Memory with 3-STATE Outputs

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

74F539 Dual 1-of-4 Decoder with 3-STATE Outputs

74F153 Dual 4-Input Multiplexer

MM74HC251 8-Channel 3-STATE Multiplexer

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

Excellent Integrated System Limited

74F30 8-Input NAND Gate

MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

DM74ALS109A Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear

CD4028BC BCD-to-Decimal Decoder

MM74HC00 Quad 2-Input NAND Gate

74VHC244 Octal Buffer/Line Driver with 3-STATE Outputs

MM74HC08 Quad 2-Input AND Gate

MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop

74F Bit D-Type Flip-Flop

MM74HC32 Quad 2-Input OR Gate

74ACT825 8-Bit D-Type Flip-Flop

MM74HC139 Dual 2-To-4 Line Decoder

DM Bit Addressable Latch

CD4024BC 7-Stage Ripple Carry Binary Counter

MM74C906 Hex Open Drain N-Channel Buffers

74F175 Quad D-Type Flip-Flop

74F139 Dual 1-of-4 Decoder/Demultiplexer

74F109 Dual JK Positive Edge-Triggered Flip-Flop

CD4013BC Dual D-Type Flip-Flop

CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate

MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter

74AC08 74ACT08 Quad 2-Input AND Gate

MM74HC138 3-to-8 Line Decoder

MM74HCT138 3-to-8 Line Decoder

74F174 Hex D-Type Flip-Flop with Master Reset


CD4049UBC CD4050BC Hex Inverting Buffer Hex Non-Inverting Buffer

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter

MM74HCT08 Quad 2-Input AND Gate

DM74LS154 4-Line to 16-Line Decoder/Demultiplexer

MM74C14 Hex Schmitt Trigger

74F379 Quad Parallel Register with Enable

MM74HC74A Dual D-Type Flip-Flop with Preset and Clear

MM74HC154 4-to-16 Line Decoder

74F579 8-Bit Bidirectional Binary Counter with 3-STATE Outputs

CD40106BC Hex Schmitt Trigger

MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop

CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders

DM7490A Decade and Binary Counter

MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter

MM74HC175 Quad D-Type Flip-Flop With Clear

CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop

MM74C14 Hex Schmitt Trigger

CD4093BC Quad 2-Input NAND Schmitt Trigger

74LVX374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

74F652 Transceivers/Registers

74ACT Bit D-Type Flip-Flop with 3-STATE Outputs

74AC153 74ACT153 Dual 4-Input Multiplexer

74LCX760 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Open Drain Outputs

74VHC541 Octal Buffer/Line Driver with 3-STATE Outputs

74F194 4-Bit Bidirectional Universal Shift Register

CD4021BC 8-Stage Static Shift Register

CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset

DM74ALS240A, DM74ALS241A Octal 3-STATE Bus Driver

74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs

Low Power Quint Exclusive OR/NOR Gate

74VHC00 Quad 2-Input NAND Gate

CD4528BC Dual Monostable Multivibrator

MM74HC259 8-Bit Addressable Latch/3-to-8 Line Decoder

74VHC573 Octal D-Type Latch with 3-STATE Outputs

74LS393 Dual 4-Bit Binary Counter

MM74HC164 8-Bit Serial-in/Parallel-out Shift Register

74LCX16374 Low Voltage 16-Bit D-Type Flip-Flop with 5V Tolerant Inputs and Outputs

74LVQ138 Low Voltage 1-of-8 Decoder/Demultiplexer

74AC138 74ACT138 1-of-8 Decoder/Demultiplexer

74VHC373 Octal D-Type Latch with 3-STATE Outputs

Transcription:

DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver General Description These buffers/line drivers are designed to improve both the performance and PC board density of 3-STATE buffers/ drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400 mv of hysteresis at each low current PNP data line input, they provide improved noise rejection and high fanout outputs and can be used to drive terminated lines down to 133Ω. Ordering Code: Features August 1986 Revised March 2000 3-STATE outputs drive bus lines directly PNP inputs reduce DC loading on bus lines Hysteresis at data inputs improves noise margins Typical I OL (sink current) 24 ma Typical I OH (source current) 15 ma Typical propagation delay times Inverting 10.5 ns Noninverting 12 ns Typical enable/disable time 18 ns Typical power dissipation (enabled) Inverting 130 mw Noninverting 135 mw Order Number Package Number Package Description DM74LS244WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver Connection Diagram Function Table Inputs Output G A Y L L L L H H H X Z L = LOW Logic Level H = HIGH Logic Level X = Either LOW or HIGH Logic Level Z = High Impedance 2000 Fairchild Semiconductor Corporation DS008442 www.fairchildsemi.com

DM74LS244 Absolute Maximum Ratings(Note 1) Supply Voltage 7V Input Voltage 7V Operating Free Air Temperature Range 0 C to +70 C Storage Temperature Range 65 C to +150 C Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. Recommended Operating Conditions Symbol Parameter Min Nom Max Units V CC Supply Voltage 4.75 5 5.25 V V IH HIGH Level Input Voltage 2 V V IL LOW Level Input Voltage 0.8 V I OH HIGH Level Output Current 15 ma I OL LOW Level Output Current 24 ma T A Free Air Operating Temperature 0 70 C Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions Min Typ Max (Note 2) Units V I Input Clamp Voltage V CC = Min, I I = 18 ma 1.5 V HYS Hysteresis (V T+ V T ) V CC = Min 0.2 0.4 V Data Inputs Only V OH HIGH Level Output Voltage V CC = Min, V IH = Min V IL = Max, I OH = 1 ma 2.7 V CC = Min, V IH = Min V IL = Max, I OH = 3 ma 2.4 3.4 V V CC = Min, V IH = Min V IL = 0.5V, I OH = Max 2 V OL LOW Level Output Voltage V CC = Min I OL = 12 ma 0.4 V IL = Max I OL = Max 0.5 V V IH = Min I OZH Off-State Output Current, V CC = Max V O = 2.7V 20 µa HIGH Level Voltage Applied V IL = Max I OZL Off-State Output Current, V IH = Min V O = 0.4V 20 µa LOW Level Voltage Applied I I Input Current at Maximum V CC = Max V I = 7V 0.1 ma Input Voltage I IH HIGH Level Input Current V CC = Max V I = 2.7V 20 µa I IL LOW Level Input Current V CC = Max V I = 0.4V 0.5 200 µa I OS Short Circuit Output Current V CC = Max (Note 3) 40 225 ma I CC Supply Current V CC = Max, Outputs HIGH 13 23 Outputs Open Outputs LOW 27 46 ma Outputs Disabled 32 54 Note 2: All typicals are at V CC = 5V, T A = 25 C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second. www.fairchildsemi.com 2

Switching Characteristics at V CC = 5V, T A = 25 C Symbol Parameter Conditions Max Units t PLH Propagation Delay Time C L = 45 pf LOW-to-HIGH Level Output 18 ns t PHL Propagation Delay Time C L = 45 pf HIGH-to-LOW Level Output 18 ns t PZL Output Enable Time to C L = 45 pf LOW Level 30 ns t PZH Output Enable Time to C L = 45 pf HIGH Level 23 ns t PLZ Output Disable Time C L = 5 pf from LOW Level 25 ns t PHZ Output Disable Time C L = 5 pf from HIGH Level 18 ns t PLH Propagation Delay Time C L = 150 pf LOW-to-HIGH Level Output 21 ns t PHL Propagation Delay Time C L = 150 pf HIGH-to-LOW Level Output 22 ns t PZL Output Enable Time to C L = 150 pf LOW Level 33 ns t PZH Output Enable Time to C L = 150 pf HIGH Level 26 ns DM74LS244 3 www.fairchildsemi.com

DM74LS244 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) DM74LS244 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com

DM74LS244 Octal 3-STATE Buffer/Line Driver/Line Receiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com