19-132; Rev 2; 6/6 Dual High-Speed 1.A MOSFET Drivers General Description The are dual monolithic MOSFET drivers designed to tralate TTL/CMOS inputs to high voltage/current outputs. The MAX4426 is a dual inverting power MOSFET driver. The MAX4427 is a dual noninverting power MOSFET driver, and the MAX4428 contai one inverting section and one noninverting section. Delay times are nearly independent of VDD (see Typical Operating Characteristics). High-current output drivers rapidly charge and discharge the gate capacitance of even the largest power MOSFETs to within millivolts of the supply rails. This produces the power MOSFETs' minimum on resistance. The MAX4426/ MAX4427/MAX4428's high speed minimizes power losses in switching power supplies and DC-DC converters. Switching Power Supplies DC-DC Converters Motor Controllers Pin-Diode Drivers Charge-Pump Voltage Inverters N.C. 1 8 Applicatio Pin Configuratio N.C. INA 2 7 OUTA MAX4426 GND 3 6 V DD INB 4 OUTB TOP VIEW 2, 4 7, INVERTING S Upgrade for TSC4426/TSC4427/TSC4428 S Lower On Resistance: 4Ω vs. 7Ω S Shorter Delay Times: td1 - vs. 3 td2-2 vs. S 1.A Peak Output Current Features S Fast Rise and Fall Times: Typically 2 with pf Load S Wide Operating Range: 4.V to 18V S Low Power Coumption: 1.8mA with Logic 1 Input 2µA with Logic Input S TTL/CMOS Compatible S Latchup Protected-Withstand > ma Reverse Current S ESD Protected Ordering Information PART TEMP RANGE PIN-PACKAGE MAX4426CPA NC to +7NC 8 Plastic DIP MAX4426CSA NC to +7NC 8 SO MAX4426C/D NC to +7NC Dice* MAX4426EPA -4NC to +8NC 8 Plastic DIP MAX4426ESA -4NC to +8NC 8 SO MAX4426EJA -4NC to +8NC 8 CERDIP MAX4426MJA -NC to +12NC 8 CERDIP** Ordering Information continued on end of data sheet. *Dice are tested at. **Contact factory for availability and processing to MIL-STD-883. DIP/SO Typical Operating Circuit N.C. 1 8 N.C. INA 2 7 OUTA MAX4427 GND 3 6 V DD 2, 4 7, 4.7µF.1µF INB 4 OUTB NONINVERTING DIP/SO MAX4426 N.C. 1 8 INA 2 7 MAX4428 N.C. OUTA GND 3 6 V DD INB 4 OUTB 2 7 4 A B * * DIP/SO Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim s website at www.maxim-ic.com.
ABSOLUTE MAXIMUM RATINGS Supply Voltage V DD to GND... +2V Time V IL < V IN_ < V IH... Input Voltage...V DD +.3V to GND -.3V Continuous Power Dissipation (T A = +7 C) Plastic DIP (derate 9.9mW/ C above +7 C)...727mW SO (derate.88mw/ C above +7 C)...471mW CERDIP (derate 8.mW/ C above +7 C)...64mW ELECTRICAL CHARACTERISTICS (V DD = +4.V to +18V, T A = T MIN to T MAX, unless otherwise specified.) Operating Temperature Ranges: MAX442_C... C to +7 C MAX442_E... -4 C to +8 C MAX442_MJA... - C to +12 C Storage Temperature Range... - C to +16 C Maximum Chip Temperature...+1 C Lead Temperature (soldering, sec)...+3 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Logic 1 Input Voltage V IH 2.4 V Logic Input Voltage V IL.8 V Input Current I IN V IN = V to 18V -1 1 µa Output High Voltage V OH No load Output Low Voltage V OL No load 2 mv Output Resistance R OUT I LOAD = V DD = 18V, ma V IN =.8V for inverting stages, V IN = 2.4V for noninverting stages V IN = 2.4V for inverting stages, V IN =.8V for noninverting stages V DD - 2 T A = +2NC 4 T A = T MIN to T MAX 12 T A = +2NC 4 T A = T MIN to T MAX 12 mv ω Peak Output Current I PK V DD = 18V 1. A Power-Supply Current I SUPP V IN = +3V for both inputs V IN = V for both inputs T A = +2NC 1.8 4. T A = T MIN to T MAX 2. 8. T A = +2NC.2.4 T A = T MIN to T MAX.3.6 T A = +2NC 2 3 Rise Time (Note 1) t R T A = T MIN to T MAX 2 4 T A = +2NC 2 3 Fall Time (Note 1) t F T A = T MIN to T MAX 2 4 Delay Time (Note 1) T A = +2NC 3 T A = T MIN to T MAX 1 4 T A = +2NC 2 T A = T MIN to T MAX 3 6 Note 1: Switching times guaranteed by design, not tested. See Figure 1 for timing measurement circuit. ma 2
7 6 4 3 2 3 3 2 2 1 MAX4426 RISE AND FALL TIME vs. SUPPLY VOLTAGE C L = pf C L = pf 1 SUPPLY VOLTAGE (V) MAX4426 DELAY TIME vs. TEMPERATURE t F t R MAX4426/27/28t oc1 2 MAX4426/27/28 toc4 SUPPLY CURRENT (ma) 7 6 4 3 2 8 7 6 4 3 2 C L = pf MAX4426 SUPPLY CURRENT vs. CAPACITIVE LOAD V DD = +16V MAX4426 DELAY TIME vs. SUPPLY VOLTAGE Typical Operating Characteristics 1 SUPPLY VOLTAGE (V) 2kHz 4kHz MAX4426/27/28 toc2 2 MAX4426/27/28 toc 4 3 2 1k MAX4426 RISE AND FALL TIME vs. TEMPERATURE C L = pf - -2 2 7 MAX4426 RISE AND FALL TIME vs. CAPACITIVE LOAD t R, t F TEMPERATURE ( C) t R, t F MAX4426/27/28 toc3 12 MAX4426/27/28 toc6 2kHz - -2 2 7 TEMPERATURE ( C) 12, CAPACITIVE LOAD (pf), CAPACITIVE LOAD (pf) SUPPLY CURRENT (ma) 3 2 MAX4426 SUPPLY CURRENT vs. FREQUENCY C L = pf V DD = +V V DD = +V MAX4426/27/28 toc7 (VDD - VOUT) (V).6.3 MAX4426 HIGH VOLTAGE vs. SOURCE CURRENT V DD = +8V V DD = +13V MAX4426/27/28 toc8 OUPUT VOLTAGE (V).6.3 MAX4426 LOW VOLTAGE vs. SOURCE CURRENT V DD = +8V V DD = +13V MAX4426/27/28 toc9 1 FERQUENCY (khz) 2 3 4 6 7 8 9 SOURCE CURRENT (ma) 2 3 4 6 7 8 9 SOURCE CURRENT (ma) 3
Applicatio Information The have easy-to-drive inputs. However, these inputs must never be allowed to stay between VIH and VIL for more than. Unused inputs should always be connected to ground to minimize supply current. Drivers can be paralleled on the MAX4426 or MAX4427 by tying both Inputs together and both outputs together. Supply bypassing and grounding are extremely important with the, as the peak supply current can be as high as 3A, which is twice the peak output current. Ground drops are a form of negative feedback with inverters, and hence will degrade the delay and traition time of the MAX4426/MAX4428. Suggested bypass capacitors are a 4.7µF (low ESR) capacitor in parallel with a.1µf ceramic capacitor, mounted as close as possible to the MAX4426/ MAX4427/MAX4428. Use a ground plane if possible or separate ground retur for inputs and outputs. Output voltage ringing can be minimized with a Ω to 2Ω resistor in series with the output, but this will degrade output traition time. Ringing may be undesirable due to the large current that flows through capacitive loads when the voltage across these loads traitio quickly. Operation at the upper end of the supply voltage range (> 1V) requires that a capacitance of at least pf be present at the outputs. This prevents the supply voltage provided to the die (which can be different from that seen at the supply pin) from exceeding the 2V absolute maximum rating, due to overshoot. Since at least pf of gate capacitance is present in all higher power FETs, this requirement is easily met. Power Dissipation The power dissipation coists of input inverter losses, crowbar current through the output devices, and output current (either capacitive or resistive). The sum of these must be kept below the maximum power dissipation limit. The DC input inverter supply current is.2ma when both inputs are low and 2mA when both inputs are high. The crowbar current through an output device making a traition is approximately ma for a few nanoseconds. This is a small portion of the total supply current, except for high switching frequencies or a small load capacitance (pf). The power dissipation when driving a ground-referenced resistive load is: P = (D) (ron(max)) (ILOAD 2 ) where D is the percentage of time the MAX4426/ MAX4427/MAX4428 output pulls high, ron(max) is the maximum on resistance, and ILOAD is the MAX4426/MAX4427/ MAX4428 load current. For capacitive loads. the power dissipation is: P = (CLOAD) (VDD 2 ) (FREQ) where CLOAD is the capacitive load. VDD is the MAX4426/ MAX4427/MAX4428 supply voltage, and FREQ is the toggle frequency. 4
RISE AND FALL TIMES = INVERTING NONINVERTING +V +.4V +18V V +18V V MAX4428 % t F t R 4.7µF pf pf Figure 1. Inverting and Noninverting Test Circuit 9% % % 9% 9% 9% t R %.1µF % 9% t F Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE MAX4427CPA NC to +7NC 8 Plastic DIP MAX4427CSA NC to +7NC 8 SO MAX4427C/D NC to +7NC Dice* MAX4427EPA -4NC to +8NC 8 Plastic DIP MAX4427ESA -4NC to +8NC 8 SO MAX4427EJA -4NC to +8NC 8 CERDIP MAX4427MJA -NC to +12NC 8 CERDIP** MAX4428CPA NC to +7NC 8 Plastic DIP MAX4428CSA NC to +7NC 8 SO MAX4428C/D NC to +7NC Dice* MAX4428EPA -4NC to +8NC 8 Plastic DIP MAX4428ESA -4NC to +8NC 8 SO MAX4428EJA -4NC to +8NC 8 CERDIP MAX4428MJA -NC to +12NC 8 CERDIP** *Dice are tested at. **Contact factory for availability and processing to MIL-STD-883. Chip Topography SUBSTRATE CONNECTED TO VDD; TRANSISTOR COUNT: 26. MAX4427/MAX4428
Package Information (The package drawing(s) in this data sheet may not reflect the most current specificatio. For the latest package outline information go to www.maxim-ic.com/packages.) 6
REVISION NUMBER REVISION DATE DESCRIPTION Revision History PAGES CHANGED 2 6/6 To clarify and illuminate an input logic level restriction Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA 9486 48-737-76 7 26 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.