CSE4: Components and Design Techniques for Digital Systems Introduction Prof. Tajana Simunic Rosing
Welcome to CSE 4! Instructor: Tajana Simunic Rosing Email: tajana.teach.ucsd@gmail.com; please put CSE4 in the subject line Office Hours: Tu :2-2:2pm, Th 5-6pm; CSE 28 TAs and Tutors Shared between the two sections, office hrs will be listed on cse4 website Instructor s Assistant: Kathleen Au Office: CSE 2272 Phone: (858) 822-56; Email: k6au@eng.ucsd.edu Discussion sessions: Fridays 2:p-2:5p PCYNH 9 Grades: http://ted.ucsd.edu Announcements and online discussion: https://piazza.com/ucsd/winter27/cse4
Class website https://cseweb.ucsd.edu/classes/wi7/cse4-bcd/ Syllabus TA/Tutor office hours and locations Class policies Course schedule: required online ZyBook exercises prior to class HWs & exams
Textbooks and Recommended Readings Required online book: Online digital design by F. Vahid Exercises to complete prior to class Student access instructions:. Sign up at ZyBooks.com 2. Enter ZyBook code: UCSDCSE4RosingWinter27 3. Select appropriate section (A or B) if available 4. Click 'Subscribe Recommended textbooks: Digital Design by F. Vahid Digital Design & Computer Arch. by David & Sarah Harris Contemporary Logic Design by R. Katz & G. Borriello Lecture slides are derived from the slides designed for all three books
In Class We Will Use Clickers! Vote on multiple choice questions in real time! Make sure to register yours with TED prior to our first Quiz, otherwise your grade for the quiz will be zero! freq: BB Lets try it out: A) Please speak louder B) A bit quieter please C) It is just perfect! D) Too sleepy to know E) None of the above
Standard grading scale: 9- = A-/A/A+; 8-89.9=B-/B/B+, 7-79.9=C-/C/C+, 6-69.9=D Less than 6=F. Grading Plusses and minuses given at the instructor's discretion. Grading Class participation 5% To get the full participation grade each session you have to respond to at least 75% of iclicker questions in class ZyBook questions 5% (grades start with Chap 2) Due before class, %completed correctly counts toward your grade Homework % Midterm # 25%: Saturday, /28, :p-2:2p; PETER 8 Midterm #2 25%: Saturday, 2/8, :p-2:2p; PETER 8 Exam#3/Final 3%: Saturday, 3/8, :3-2:5; Location TBD
Academic Honesty Some Class Policies Studying together in groups is encouraged Turned-in work must be completely your own. Both giver and receiver are equally culpable Cheating on HW/ exams: F in the course. Any instance of cheating will be referred to Academic Integrity Office Late: No makeup for missed exams or zybook; exceptions must be documented e.g. proof of the death in the family, a letter from a doctor justifying why you had to miss an exam and a permission to speak directly to your doctor HWs are due at the beginning of the class up to day late HWs get % lower grade More than day late get no points Regrades Request online within 24hrs of grades being posted. TAs/Tutors will review and add/subtract points as appropriate. If you are still not satisfied, contact the professor.
focus of this course CSE4 & other CSE classes Application Software Layers of abstraction programs Operating Systems device drivers CSE 3 CSE 4 Architecture Microarchitecture instructions registers datapaths controllers CSE 4 Logic adders memories Digital Circuits AND gates NOT gates Abstraction: A way to simplify by hiding details from other layers Analog Circuits Devices Physics amplifiers filters transistors diodes electrons
Why Study Digital Design? Look under the hood of your processors You become a better programmer when you understand hardware your code runs on Nvidia Tegra 2 die photo
What s next? CSE4 more complex CPU architectures The Scope of CSE4 We start with Boolean algebra Y = A and B We end with a hardware design of a simple CPU PC READ ADDRESS INSTRUCTION MEMORY INSTRUCTION [3-] 4 INSTRUCTION[3-26] INSTRUCTION[25-2] INSTRUCTION[2-6] INST[5-] RESULT ADDER I[25-] << 2 JMP ADDRESS [25-] REGIST REGISTERS ER WRITE 2 MUX READ REGIST ER WRI DATA MUX INSTRUCTION[5-] READ REGIST ER READ TE DAT A PC+4 [3-28] JMP ADDRESS [3-] REG_DST Sign Extend INSTRUCTION[5-] << 2 CON TROL RESULT ADDER ZERO ALU RESULT ALU CONTROL MUX BRANCH REG_WRITE ALU_SRC ALU_OP MEM_READ,MEM_WRITE READ DATA 2 ADDRESS READ DATA DATA MEMORY WRITE DATA MUX JUMP MUX MEM_TO_REG
Lets get started! Number representations Analog vs. Digital Digital representations: Binary, Hexadecimal, Octal Switches, MOS transistors, Logic gates What is a switch How a transistor operates Logic gates Building larger functions from logic gates Universal gates Boolean algebra Properties How Boolean algebra can be used to design logic circuits Books references: Online text chap
value value What Does Digital Mean? Analog signal Infinite possible values Ex: voltage on a wire created by microphone Digital signal Finite possible values Ex: button pressed on a keypad analog signal Possible values:.,., 2.9,... infinite possibilities Which is analog? A) Wind speed B) Radio Signal C) Clicker response D) A) & B) E) All of the above 4 3 2 2 3 4 2 digital signal Possible values:,, 2, 3, or 4. That s it. time time
Encoding Numbers Base & 2 Each position represents a quantity; symbol in position means how many of that quantity Base ten (decimal) Ten symbols:,, 2,..., 8, and 9 More than 9 -- next position So each position power of Nothing special about base -- used because we have fingers Base two (binary) Two symbols: and More than -- next position So each position power of 2 5 2 3 4 3 2 2 4 2 3 2 2 2 2
Bases Sixteen & Eight hex 2 3 4 5 6 7 6 4 6 3 6 2 bina ry 8 A F 8 6 6 A F hex 8 9 A B C D E F bina ry Base sixteen Used as compact way to write binary numbers Basic digits: -9, A-F Known as hexadecimal, or just hex Base eight Basic digits: -7 Known as octal octal 2 3 4 5 6 7 8 4 8 3 8 2 bina ry 4 2 7 4 8 8 2 7
Combinational circuit building blocks: Switches & CMOS transistors CSE4 Prof. Tajana Simunic Rosing
Welcome to CSE 4! What we covered last time: Intro to the class Analog vs. digital, number representations Where we are going today: Switches and logic gates Deadlines: HW assigned, due next Thursday We will use gradescope for grading HW and exams You should have gotten email, but if you did not, use 98WK4M code to sign up and specify section (C or D) for cse4 in winter 27 Note: wherever we refer to sections cse4a/b, they correspond to cse4c/d respectively Prof. office hrs None today but I m available to meet Friday or Monday next week, please email to setup a time or come to my next office hours Discussion session: This Friday at 2pm! Final exam: 3/8/7 :3 A 2:5 in CENTR
Switches Electronic switches are the basis of binary digital circuits Electrical terminology Voltage: Difference in electric potential between two points 4.5 A 9V + 4.5 A Analogous to water pressure Current: Flow of charged particles 2 ohms Analogous to water flow Resistance: Tendency of wire to resist current flow Analogous to water pipe diameter V 4.5 A 9 V V = I * R (Ohm s Law)
CMOS circuit CMOS Switches Consists of N and PMOS transistors Both N and PMOS are similar to basic switches nmos gate conducts does not conduct pmos gate Silicon -- not quite a conductor or insulator: Semiconductor does not conduct conducts
Transistor Circuit Design nmos: Turns on when gate is connected to When turned on, nmos passes zeros well, but not ones, so connect source to GND nmos forms a pull-down network pmos: Turns on when gate is connected to When turned on, pmos passes ones well, but not zeros, so connect source to V DD pmos forms a pull-up network Note: Vahid s textbook shows some circuits with pmos connected to GND and nmos to Vdd: this is NOT normally done in practice! inputs V DD pmos pull-up network nmos pull-down network output
CMOS Switches The following is true for CMOS switches: A. nmos turns on when gate is connected to logic B. pmos is an open switch when gate is connect to logic C. All of the above D. None of the above nmos gate pmos gate
Logic gates: CMOS NOT Gate NOT V DD A Y = A Y A P Y N A Y GND A P N Y
CMOS Two Input NAND Gate A B NAND Y = AB Y A B Y V DD P2 P Y A B N N2 GND A B P P2 N N2 Y
What logic gate is this? V DD V DD A P2 P C AY N P3 Y N3 B N2 GND GND A B P P2 N N2 C P3 N3 Y
Common Logic Gates a b AND a b a b OR a+b a NOT a a BUF a (a b) (a+b) ab + a b ab + a b A B Y N2 N P2 P V DD A Y GND N P a b NAND a b NOR a b XNOR a b XOR
B = {, } Variables represent or only Operators return or only Basic operators Boolean algebra Intersection: is logical AND: a AND b returns only when a= & b= Union: + is logical OR: a OR b returns if either a= or b= (or both) Complement: is logical NOT: NOT a returns the opposite of a AND OR NOT BUFFER a b a b AND Derived operators: a+b a b OR NAND NOR XOR XNOR a b NAND (a b) (a+b) a b NOR a a a b NOT XOR a a a b BUF XNOR
Boolean Algebra X and Y are Boolean variables with X=, Y= What is X+X+Y? A. B. C. 2 D. None of the above
Universal Gate: NAND Any logic function can be implemented using just NAND gates. Boolean algebra s basic operators are AND, OR and NOT
Universal Gate: NOR Any logic function can be implemented using just NOR gates. Boolean algebra needs AND, OR and NOT
Boolean Axioms & Theorems
Boolean theorems of multiple variables
Boolean Duality Derived by replacing by +, + by, by, and by & leaving variables unchanged Generalized duality: X + Y +... X Y... f (X,X 2,...,X n,,,+, ) f(x,x 2,...,X n,,,,+) Any theorem that can be proven is also proven for its dual! Note: this is NOT demorgan s Law
Covering Theorem Explained Covering Theorem: A*(A+B) = A+A*B = A Venn Diagrams
Combining Theorem Explained Combining Theorem: AB+AB = (A+B)*(A+B ) = A
Proving theorems with Boolean Algebra Using the axioms of Boolean algebra: e.g., prove the consensus theorem: X Y + X Y = X distributivity X Y + X Y = X (Y + Y ) complementarity X (Y + Y ) = X () identity X () = X e.g., prove the covering theorem: X + X Y = X identity X + X Y = X + X Y distributivity X + X Y = X ( + Y) identity X ( + Y) = X () identity X () = X
Consensus Theorem of 3 Variables Consensus Theorem: AB+B C+AC = AB+B C
Proof of Consensus Theorem with Boolean Algebra Consensus Theorem: (X Y) + (Y Z) + (X Z) = X Y + X Z (X Y) + (Y Z) + (X Z) identity (X Y) + () (Y Z) + (X Z) complementarity (X Y) + (X + X) (Y Z) + (X Z) distributivity (X Y) + (X Y Z) + (X Y Z) + (X Z) commutativity (X Y) + (X Y Z) + (X Y Z) + (X Z) factoring (X Y) ( + Z) + (X Z) ( + Y) null (X Y) () + (X Z) () identity (X Y) + (X Z)
Applying Boolean Algebra Theorems Which of the following is CB+BA+C A equal to? A. AB+AC B. BC+AC C. AB+BC D. None of the above
DeMorgan s Theorem (Bubble Pushing) Y = AB = A + B A B A B Y Y Y = A + B = A B A B A B Y Y
Example of Transforming Circuits with Bubble Pushing 39
Implement using only NORs Hint: DeMorgan s Theorem F = X Y + Z
Proving Theorems with Perfect Induction Using perfect induction = complete the truth table: e.g., de Morgan s: (X + Y) = X Y NOR is equivalent to AND with inputs complemented X Y X Y (X + Y) X Y (X Y) = X + Y NAND is equivalent to OR with inputs complemented X Y X Y (X Y) X + Y
What we reviewed thus far: Summary Number representations Switches, logic gates Boolean algebra Using Boolean algebra to simplify Boolean equations There is an easier way! What is next: Combinational logic: Minimization the easier way Designs of common combinational circuits Adders, comparators, subtractors, multipliers, etc.
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