h Dtrmiatio of th Bipolar rasistor ommutatio im ompots by Usig a Virtual ircuit Floara BAIU, Nicola POPOVIIU Hyprio Uivrsity of Bucharst, Faculty of Mathmatics-Iformatics 169, ălăraşilor Strt, Bucharst, ROMANIA Abstract. h papr dscribs a sris of thortical aspcts rfrrig to th bipolar trasistor commutatio mod, th physical paramtrs havig ifluc ovr th valu of th commutatio tim ad proposs a masurig mthod for th dlay, storag, fallig ad hoistig tims. h commutatio tim of bipolar trasistor compots rprsts th dtrmiat of th mmoris procssig spd. h proposd mthod is o at th disposal of studts who study th smicoductors, allowig th dtrmiatio of th commutatio tim compots i ordr to corrlat th microscopic physical paramtrs of th bipolar trasistor (.g.τ ) with th macroscopic os. Ky-words. commutatio tim, carrirs liftim, virtual laboratory. 1 Itroductio. Problm statmt For th maufacturrs of mmoris, th icras of th computrs procssig spd implis th cratio of mmoris that iclud compots commutatorig quickly from stat 1 to stat ad vic-vrsa, rplyig as fast as possibl to th rcivd ordrs. h rsarch o th lvl of smicoductor mmoris is achivd o th lvl of th mmoris basic cll, ralizd o trasistors basis, whthr thy ar bipolar or MOS trasistors. h rductio of th commutatio tim from th activ stat to th lockd stat of trasistor rprsts th bas of th rsarch rfrrig to th procssig spd of smicoductor mmoris. For improvig th trasistors commutatio tim it is rquird to study th commutatio tim of th bipolar or uipolar trasistor, from lockd stat to saturatd stat, stats which ar associatd to th logical lvls 1 ad. h tmporal paramtrs rlatd for xampl to th writig opratios withi a static RAM ar prstd i figur 1 (SRAM). h sigificac of th rprstatio lmts is th followig [5]: t AS tim of prparig th addrsss bfor writig. All th addrsss iputs should b stabl with this tim itrval bfor cofirmig th ad WE iputs. Othrwis, th data stord i trasit locatios may b altrd; t AH tim of maitaiig th addrsss aftr writig. Aalog with t AS, all th addrsss iputs should b maitaid stabl with this tim itrval aftr dyig o of or WE sigals; t W tim of prparig for th chip slctio bfor closig th writig opratio. should b cofirmd withi at last this tim itrval bfor closig th writig cycl so that a crtai mmory cll ca b slctd; t WP width of writig pulss. WE should b cofirmd withi at last this tim itrval so that th storag of data i th slctd clls latch circuits should b rliabl; t DS tim of prparig th data of writig opratio closig. All th data iputs should b stabl with this tim itrval bfor closig th writig cycl. Othrwis, it is possibl that data will ot b stord i th latch circuits; t DH tim of maitaiig th data aftr closig th writig opratio. Figur 1. mporal paramtrs for th writig opratios withi a static RAM (SRAM). h commutatio tim is rlatd to th dvic spcific physical paramtrs such as liftim of majority ad miority carrirs, thir mobility ad obviously to th sizs of th activ zos ad chos maufacturig tchologis. h xprssio of lctros currt dsity i a typ smicoductor udr th ifluc of a applid lctric fild E is giv by th formula: ISSN: 179-2769 455 ISBN: 978-96-474-19-2
3/ 2 2 W E = m j W τ ( W ) 3/ 2 / k / k, whr: τ (W ) - liftim of lctros; lctro charg; umbr of lctros participatig i carry; E applid lctric fild; W - lctro rgy; k - Boltzma costat; variatio of lctro rgy. By rplacig th ratio of th two itgrals with τ rprstig th mdiat valu of th lctros liftim, (1) saturatd-lockd wh a pulss form sigal is applid o its log i. Udr lockig stat both bipolar trasistor juctios (bas-mittr juctio ad th bas-collctor o) ar rvrsly polarizd ad oly mittr-bas ad collctorbas (I E ad I B ) rsidual currts ar flowig through trasistor; ths ar vry low ad didactically ca b glctd. Udr coductibility stat, th trasistor has dirct polarizd mittr-bas juctio whil th collctor-bas juctio is ithr lockd (i cas of opratig i th activ ara) or dirct polarizd (i cas of opratig o saturatio). Figur 2 shows th diagram of a E coctio commutator i cratd with a bipolar trasistor p. τ ( W ) W τ =, (2) W 3 / 2 3 / 2 / k / k th xprssio of lctros currt dsity may b writt: 2 τ E j =. (3) m whr m is th ffctivss mass of lctros [1]. h abov rlatios ar valid if it is cosidrd that th isorgtic aras ar sphrical. For usig th formulas obtaid for j it is cssary to stablish th dpdcy of τ to rgy ad to mak th corrspodig avragig accordig to th smicoductor disprsal mchaisms, but ths ar aspcts ot covrd by this papr [1]. O macroscopic lvl, i discrt smicoductor dvics th currt dsity is ot masurd, but dtrmid basd o masurig som macroscopic paramtrs, such as collctor, basic or mittr currts, rsidual currts i a bipolar trasistor. 2 Prstatio bipolar trasistor commutatio mod h trasistor commutatio mod mas a dyamic mod i which th trasistor is workig altrativly Figur 2. Diagram of E coctio commutator with a trasistor p h powr failurs o ach juctio ad th currts ar rprstd i th figur. Figur 3 prsts th family of output charactristics ad th load li of this commutator, of which ds ar charactrizd by: V S : VE = I = R (4) B : I = V = V. E osidrig th circuit from figur 2, th supply voltag V is dividd o R ad o trasistor, btw collctor ad mittr, accordig to rlatio: V = R I + V (5) E. h trasistor lockig is charactrizd by th load li i opratig poit B, whr th collctor currt has valu (I = ) ad V E = V, whil a static opratig ISSN: 179-2769 456 ISBN: 978-96-474-19-2
poit S corrspods to th trasistor saturatio. h trasistor saturatio is obtaid by ifusig a miimum bas currt I BS mi, calld Bas currt o icipit saturatio. A proportioal currt to this saturatio currt is obtaid i collctor, I : I = β I mi. BS (6) A currt I BS > I BS mi is applid i practic, whil th collctor currt ca ot icras ad th: I < β I BS. (6 ) Figur 4. h applid iput voltag puls (a), th currt puls o trasistor i commutatio mod (b), variatio way of currt I by rlivig th commutatio tims (dirct ad rvrs) (c) 3 h compots of commutatio tim Figur 3. Family of output charactristics ad rlivig th commutatio of th opratig static poit btw lockd ad saturatd It is cosidrd that th trasistor is a fficit commutator if a puls (voltag) is applid o bas, makig th rapid passig of th opratig poit from B (th logical stat ) up to S (logical stat 1), without trasistor maitaiig i th activ zo (of amplificatio). I figur 4, thr ar rprstd th applid iput voltag puls (a) ad rspctivly th currt o (b) as wll as th tim variatio mod of th collctor I by rlivig th commutatio tims (dirct ad rvrs) (c). It is kow that th trasistor commutatio tim is dtrmid by th trasitio procsss rlatd to th displacmts of th basic carrirs ad accumulatio of loads ifusd i bas. It is cosidrd that bfor momt t th trasistor is lockd by th valu V 1 of th iput sigal V i applid o bas. A trasitio of iput voltag taks plac from valu V 1 to positiv valu V 2, followd promptly by th trasitio of th bas currt from to I B1 > I BS. Du to th fact that th carrirs, ifusd rapidly by mittr i bas, d tim to rach th collctor, th currt I will b maitaid at valu for a dlay tim, otd t d, aftr which is icrasig to th statioary valu I. h tim i which th currt icrass from,1 I to,9 I is calld hoistig tim ad is otd with t h (or ris tim). h tim which passd from th momt wh th saturatio ordr has b applid (t ) util th collctor currt rachd,9 of th maximum valu is calld dirct commutatio tim t dc ad is formd by th dlay tim ad th hoistig tim accordig to rlatio: t dc = td + th. (7) h dlay tim (t d ) is usually isigificat i rgard with th hoistig tim, so that th rlatio 4.2.3 may b writt: ISSN: 179-2769 457 ISBN: 978-96-474-19-2
1 tdc = th = 2,3τ = τ l, (8),9I 1 I B1 whr τ is th liftim of lctros i th trasistor bas. Still, if th iput sigal dcrass rapidly o th momt t 3 from th positiv valu V 2 to th gativ valu V 1, th bas currt will td to rapid dcrasig as wll from valu I B1 to I B2, chagig its dirctio. h rol of th rsistac R B is to limit th bas currt to th valu I B2 ad to protct i this way th bas-mittr juctio. h xcss of th load stord i bas will mak I to b furthr maitaid for a tim calld storag tim, otd t s, aftr which this starts to dcras. h storag tim is giv by rlatio: I B1 + I B2 ts =τ s l, (9) I + I B2 whr τ s is th storag tim costat of th lctros i bas. At momt t 4 th trasistor is outgoig from saturatio stat ad th opratig poit will mov from S to B, i a tim calld fallig tim, otd t f. his tim is dfid as th tim i which th collctor currt dcrass from valu I to,1 I ad is xprssd by: I = l 1 + t f τ. (1) I B2 h rvrs commutatio tim (t rc ) is th tim itrval from th momt of applyig th lockig ordr util wh th collctor currt dcrass from,1 of its maximum valu ad is formd by th storag tim ad th fallig tim: t rc = ts + t f. (11) If it is cosidrd that τ = τ s, th rvrs commutatio tim ca b writt: I 1 = l 1 + B trc τ. (12) I B2 h total commutatio tim of trasistor is giv by th sum btw th dirct commutatio tim ad th rvrs commutatio o: t = t + t = t + t + t + t. (13) dc rc d h s I gral, th rvrs commutatio tim is highr tha th dirct commutatio o, th sstial diffrc big giv by th storag tim, which has th highst f valu amog all th compots of th commutatio tim. I ordr to crat trasistors with low commutatio tims utilizd i smicoductor mmoris it is sarchig to rduc th storag tim by avoidig th igrss of th dvic udr dp saturatio mod; trasistors p ar prfrrd, i which th opratig carrirs ar th lctros havig highr mobility tha th o-loads ad commutatio acclratio diagrams ar usd. 4. Masurmt of commutatio tim by usig a virtual circuit h rquird circuit is cratd by usig th program ircuit Makr. h ircuit Makr program, Studt variat, is availabl fr of charg o th Itrt ad ca b utilizd by studts for study i a virtual laboratory [2,3,4] for cratig a lctroic circuit with passiv, activ (aalogical or digital) lmts, sigal sourcs (cotiuous, altrativ, various forms pulss tc.), for modifyig a xistt circuit, aalyzig som output sigals (or i crtai poits of th complx circuits), accordig to th iput sigals or othr circuit paramtrs, of tim ad dirct captur of imags o th moitor scr tc. A masurig circuit is prstd i figur 5 as xmplificatio, which allows th masurmt of th commutatio tim for a bipolar trasistor p. his trasistor may b of ay typ ad comparativ dtrmiatios ca b do o svral typs of trasistors. Figur 5. Laboratory circuit for masurig th commutatio tim of a bipolar trasistor h proposd workig mthod was th followig [2] a) Supplyig th circuit with V = 1 V. Applyig o iput positiv voltag pulss V g = 5 V with priod of 1 μs ordr. ISSN: 179-2769 458 ISBN: 978-96-474-19-2
b) Visualizig th collctor currt accordig to tim I = f (t ) by positioig th masurig tstr i th trasistor s collctor util sig A appars o tstr. Adjustig th tim ad collctor currt variatio rags util a sigificat diffrc (of tim) ca b oticd for th passig of currt from valu to maximum valu ad vic-vrsa. Such charactristic is prstd i figur 6. A similar circuit ca b ralizd also for rlivig th commutatio of flip-flop circuits ralizd with trasistors (bipolar or MOS) formig part of smicoductor mmoris. Output sigals obtaid i laboratory for a flip-flop circuits ar prstd i figur 7. Both ovrlappd outputs for th studid circuit ar rprstd ad th prfct balac of both sigals ca b oticd. Figur 6. Dpdcy of tim output currt: dtail for masurmt of commutatio tims c) Masurig th currt valu at saturatio o th obtaid charactristic. alculatig th th valus corrspodig to,1 I ad rspctivly,9 I. Positioig th two cursors, c ad d, o th two calculatd valus as show i figur 6. Positioig th o of th vrtical cursors (cursor b i figur) o th miimum valu of th collctor currt, masurig th tim valus o th OX axis corrspodigly, ad th othr vrtical cursor, i poit corrspodig to,9 I, o th charactristic ascdig icliatio. Radig th valu of th dirct commutatio. c) Procdig similarly for masurig th fallig (fallig) tim, of rvrs commutatio, accordig to th thigs prstd i th thortical part of this papr, by masurig th diffrc btw th tim corrspodig to th collctor currt maximum valu ad th valu,1 I, o th dscdig icliatio. h valu of th avrag liftim of carrirs i bas ca b calculatd by usig th rlatio 7. h circuit ca b modifid for aothr typ of trasistor which is slctd from th library of program compots. A sris of small adjustmts of th xistt circuit ar rquird ad th dirct ad rvrs commutatio tims ca b masurd similarly. Figur 7. Output sigals obtaid i virtual laboratory for a flip-flop circuit Rfrcs [1]. Floara, BAIU, Microlctroic omplmts, Ecyclopdic Publishig Hous, Bucharst 27. [2]. Floara BAIU, Elctroics omplmts Guidli for Virtual Applicatios, Victor Publishig Hous, Bucharst 25. [3]. ircuit Makr Program, Itrt. [4]. VLADIMIRESU, A., SPIE, raslatio ito Romaia, chical Publishig Hous, Bucharst, 1999. [5]. WAKERLY, J., Digital ircuits Pricipls ad Practics usd i Dsig, raslatio ito Romaia, ora Publishig Hous, Bucharst, 22. ISSN: 179-2769 459 ISBN: 978-96-474-19-2