TTC-1001 Thermal Test Chip Application Information

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TTC-1001 Thermal Test Chip Application Information Thermal Engineeringa Associates 3287 Kifer Road Santa Clara, CA 95051 Tel: 650-961-5900 Email: info@thermenger.com www.thermengr.com Rev. 4 160125

TTC-1001 Unit Cell The TTC-1001 Thermal Test Chip Unit Cell has the following attributes: Size: 1mm X 1 mm Thickness: Available in 200µm to 800µm range # of Heating Resistors: 1 Resistor value: 10.5Ω nominal Current per resistor: 0.55A max continuous Power per resistor: 3W max continuous # of Temp Sensor Diodes: 1 Diode V F : 0.720V nominal Diode K Factor: 0.5598 ºC/mV typical Unit Cell Electrical Representation (viewed looking down onto contact pads) Unit Cell Layout (viewed looking down onto contact pads) Pad # Connection Pad # Connection 1 K1 6 K3 2 R1 7 R3 3 A1 8 A2 4 R2 9 R4 5 K2 10 K4 Resistor has two contact pads per side one pad can be used for voltage/current force and the other for measurement sense. Diode also has multiple contact pad per side one set can be used for application of measurement current and the other for voltage measurement. TEA TTC-1001 Application Information Page 2 of 14

TTC-1001 Unit Cell Viewing The TTC-1001 Unit Cell is symmetrical in the horizontal and vertical planes. Unit Cell layout viewed down at connection pads Unit Cell layout viewed chip backside TEA TTC-1001 Application Information Page 3 of 14

TTC-1001 Unit Cell Viewing Wire Bond Version (TTC-1001-0100) Flip Chip Version (TTC-1001-020X) Cell-to-Cell Interconnects on wafer Diode Anode Diode Cathode Resistor Wire Bond Version has interconnects between Unit Cells on the wafer. Flip Chip Version has only isolated Unit Cells. Viewed looking down at contact pads. TEA TTC-1001 Application Information Page 4 of 14

TTC-1001 Unit Cell Array Dimensions TEA TTC-1001 Application Information Page 5 of 14

850µ 200µ Pad Diameter = 100µ 276µ TTC-1001 Unit Cell Array Dimensions 425µm 1,000µm 425µm 226µ Images shown looking down at contact pads TEA TTC-1001 Application Information Page 6 of 14

TTC-1001 Array Configuration 4 3 4 3 Defined as 3X4 Array (0304) Defined as 4X3 Array (0403) TEA TTC-1001 Application Information Page 7 of 14

TTC-1001 Wafer Sawing The scribe lanes (or streets) on the TTC-1001 wafers are 76µm (0.003inch) wide. This small width is necessary to maximize the Heating Resistor area in the Unit Cell structure. To saw the wafer into chips requires a special saw blade and great care. A typical wafer sawing blade is shown at right. The key elements of the blade are the thickness and the exposure. To properly saw the TTC-1001 wafer, TEA recommends a blade thickness of 20µm (0.0008inch). Further, care must be taken to ensure saw blade and cut parameters limit the kerf width to a maximum of 65µm (0.00256inch). This requirement results in TEA s internal saw lab using special precautions when sawing the wafers.. The blade exposure must be greater than the thickness of the wafer to avoid damage to the Unit Cell structure. The exposure has to be greater than 625µm (~0.025inch) for as processed TTC-1001 wafers plus the dicing tape penetration. If the wafers are thinned before sawing, then the exposure can be less, but always slightly greater (~10%) than the wafer thickness plus the dicing tape penetration. TEA has the ability to properly saw thinned TTC-1001 wafers and optionally offers sawing services to its wafer customers. An example of this ability is shown below. TEA TTC-1001 Application Information Page 8 of 14

TTC-1001 Array Configuration Single Cell measurement circuit with minimal connections TEA TTC-1001 Application Information Page 9 of 14

TTC-1001 Array Configuration Single Cell measurement circuit with Kelvin (4-wire) connections TEA TTC-1001 Application Information Page 10 of 14

TTC-1001 5X5 Array Measurement Circuit Uniform heating connection configuration with single diode temperature sensor TEA TTC-1001 Application Information Page 11 of 14

TTC-1001 Chip Thermal Resistance Chip Thickness The affect on chip thermal resistance due to thickness for a Unit Cell is shown in the Table and Figure below. These results were calculated assuming 62% Heating Resistor coverage area on the top chip surface and a spreading angle of 45º until columnar flow occurs. The 45º spreading angle is approximation of the actual spreading. Similar calculations can be done on arrays larger than 1X1. The percentage of Heating Resistor coverage area will be less than that of the Unit Cell because of the additional chip area associated with the scribe lanes around each unit cell. Thus the heating will not be as uniform as on a Unit Cell. If rough thermal resistance values are not sufficient, then a detailed thermal model at chip level will need to be constructed. Thermal Resistance Unit Cell Thermal Resistance vs. Chip Thickness 5.00 4.50 4.00 3.50 3.00 2.50 2.00 1.50 1.00 0.50 0.00 0 100 200 300 400 500 600 700 Chip Thickness (µm) Unit Cell Θ versus Chip Thickness Chip Thickness (µm) A eff (mm 2 ) Θ (ºC/W) 50 0.663 0.506 100 0.705 0.952 150 0.748 1.347 200 0.820 1.638 250 0.856 1.961 300 0.880 2.289 350 0.897 2.619 400 0.910 2.951 450 0.920 3.284 500 0.928 3.617 550 0.934 3.951 600 0.940 4.285 625 0.942 4.452 Unit Cell Θ versus Chip Thickness TEA TTC-1001 Application Information Page 12 of 14

TTC-1001 Wafer Orientation Unit Cell Orientation Wafer Orientation Flat 150mm (6") diameter wafer Fabrication Process Control Structures Applies to both Wire Bond and Flip Chip (Bumped) wafer versions TEA TTC-1001 Application Information Page 13 of 14

TTC-1001 Product Numbering TEA TTC-1001 Application Information Page 14 of 14